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SIMD. resolve imports
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@ -9,19 +9,6 @@
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#include "Python.h"
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/* Microsoft compiler doesn't limit intrinsics for an architecture.
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This macro is set only on x86 and means SSE2 and above including AVX2. */
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#if defined(_M_X64) || _M_IX86_FP == 2
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#define __SSE4_2__
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#endif
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#if defined(__SSE4_2__)
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#include <emmintrin.h>
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#include <mmintrin.h>
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#include <smmintrin.h>
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#endif
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#if defined(__AVX2__)
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#include <immintrin.h>
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#endif
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/* Check that we have an ANSI compliant compiler */
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#ifndef HAVE_PROTOTYPES
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@ -98,3 +85,5 @@ typedef signed __int64 int64_t;
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#ifdef __GNUC__
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#define GCC_VERSION (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
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#endif
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#include "ImagingSIMD.h"
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27
src/libImaging/ImagingSIMD.h
Normal file
27
src/libImaging/ImagingSIMD.h
Normal file
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@ -0,0 +1,27 @@
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/* Microsoft compiler doesn't limit intrinsics for an architecture.
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This macro is set only on x86 and means SSE2 and above including AVX2. */
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#if defined(_M_X64) || _M_IX86_FP == 2
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#define __SSE4_2__
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#endif
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#if defined(__SSE4_2__)
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#include <emmintrin.h>
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#include <mmintrin.h>
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#include <smmintrin.h>
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#endif
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#if defined(__AVX2__)
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#include <immintrin.h>
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#endif
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#if defined(__SSE4_2__)
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static __m128i inline
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mm_cvtepu8_epi32(void *ptr) {
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return _mm_cvtepu8_epi32(_mm_cvtsi32_si128(*(INT32 *) ptr));
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}
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#endif
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#if defined(__AVX2__)
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static __m256i inline
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mm256_cvtepu8_epi32(void *ptr) {
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return _mm256_cvtepu8_epi32(_mm_loadl_epi64((__m128i *) ptr));
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}
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#endif
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@ -40,18 +40,3 @@ static float __attribute__((always_inline)) inline _i2f(int v) {
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#else
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static float inline _i2f(int v) { return (float)v; }
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#endif
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#if defined(__SSE4_2__)
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static __m128i inline
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mm_cvtepu8_epi32(void *ptr) {
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return _mm_cvtepu8_epi32(_mm_cvtsi32_si128(*(INT32 *) ptr));
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}
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#endif
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#if defined(__AVX2__)
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static __m256i inline
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mm256_cvtepu8_epi32(void *ptr) {
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return _mm256_cvtepu8_epi32(_mm_loadl_epi64((__m128i *) ptr));
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}
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#endif
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