11492 lines
456 KiB
Plaintext
11492 lines
456 KiB
Plaintext
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SDK_Keyboard.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 00000188 08000000 08000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 00005518 08000190 08000190 00001190 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00002d54 080056a8 080056a8 000066a8 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM 00000008 080083fc 080083fc 000093fc 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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4 .init_array 00000004 08008404 08008404 00009404 2**2
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CONTENTS, ALLOC, LOAD, DATA
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5 .fini_array 00000004 08008408 08008408 00009408 2**2
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CONTENTS, ALLOC, LOAD, DATA
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6 .data 0000007c 20000000 0800840c 0000a000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .ccmram 00000000 10000000 10000000 0000a07c 2**0
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CONTENTS
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8 .bss 00004694 2000007c 2000007c 0000a07c 2**2
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ALLOC
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9 ._user_heap_stack 00000600 20004710 20004710 0000a07c 2**0
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ALLOC
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10 .ARM.attributes 00000030 00000000 00000000 0000a07c 2**0
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CONTENTS, READONLY
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11 .debug_info 00016a14 00000000 00000000 0000a0ac 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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12 .debug_abbrev 00003695 00000000 00000000 00020ac0 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_loclists 0000a58a 00000000 00000000 00024155 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000fe8 00000000 00000000 0002e6e0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_rnglists 00000cff 00000000 00000000 0002f6c8 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 000237e4 00000000 00000000 000303c7 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 00019b16 00000000 00000000 00053bab 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 000ce9d1 00000000 00000000 0006d6c1 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000043 00000000 00000000 0013c092 2**0
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CONTENTS, READONLY
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20 .debug_frame 000033a8 00000000 00000000 0013c0d8 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_line_str 00000054 00000000 00000000 0013f480 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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08000190 <__do_global_dtors_aux>:
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8000190: b510 push {r4, lr}
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8000192: 4c05 ldr r4, [pc, #20] @ (80001a8 <__do_global_dtors_aux+0x18>)
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8000194: 7823 ldrb r3, [r4, #0]
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8000196: b933 cbnz r3, 80001a6 <__do_global_dtors_aux+0x16>
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8000198: 4b04 ldr r3, [pc, #16] @ (80001ac <__do_global_dtors_aux+0x1c>)
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800019a: b113 cbz r3, 80001a2 <__do_global_dtors_aux+0x12>
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800019c: 4804 ldr r0, [pc, #16] @ (80001b0 <__do_global_dtors_aux+0x20>)
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800019e: f3af 8000 nop.w
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80001a2: 2301 movs r3, #1
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80001a4: 7023 strb r3, [r4, #0]
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80001a6: bd10 pop {r4, pc}
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80001a8: 2000007c .word 0x2000007c
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80001ac: 00000000 .word 0x00000000
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80001b0: 08005690 .word 0x08005690
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080001b4 <frame_dummy>:
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80001b4: b508 push {r3, lr}
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80001b6: 4b03 ldr r3, [pc, #12] @ (80001c4 <frame_dummy+0x10>)
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80001b8: b11b cbz r3, 80001c2 <frame_dummy+0xe>
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80001ba: 4903 ldr r1, [pc, #12] @ (80001c8 <frame_dummy+0x14>)
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80001bc: 4803 ldr r0, [pc, #12] @ (80001cc <frame_dummy+0x18>)
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80001be: f3af 8000 nop.w
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80001c2: bd08 pop {r3, pc}
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80001c4: 00000000 .word 0x00000000
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80001c8: 20000080 .word 0x20000080
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80001cc: 08005690 .word 0x08005690
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080001d0 <strlen>:
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80001d0: 4603 mov r3, r0
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80001d2: f813 2b01 ldrb.w r2, [r3], #1
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80001d6: 2a00 cmp r2, #0
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80001d8: d1fb bne.n 80001d2 <strlen+0x2>
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80001da: 1a18 subs r0, r3, r0
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80001dc: 3801 subs r0, #1
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80001de: 4770 bx lr
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080001e0 <memchr>:
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80001e0: f001 01ff and.w r1, r1, #255 @ 0xff
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80001e4: 2a10 cmp r2, #16
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80001e6: db2b blt.n 8000240 <memchr+0x60>
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80001e8: f010 0f07 tst.w r0, #7
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80001ec: d008 beq.n 8000200 <memchr+0x20>
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80001ee: f810 3b01 ldrb.w r3, [r0], #1
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80001f2: 3a01 subs r2, #1
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80001f4: 428b cmp r3, r1
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80001f6: d02d beq.n 8000254 <memchr+0x74>
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80001f8: f010 0f07 tst.w r0, #7
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80001fc: b342 cbz r2, 8000250 <memchr+0x70>
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80001fe: d1f6 bne.n 80001ee <memchr+0xe>
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8000200: b4f0 push {r4, r5, r6, r7}
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8000202: ea41 2101 orr.w r1, r1, r1, lsl #8
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8000206: ea41 4101 orr.w r1, r1, r1, lsl #16
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800020a: f022 0407 bic.w r4, r2, #7
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800020e: f07f 0700 mvns.w r7, #0
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8000212: 2300 movs r3, #0
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8000214: e8f0 5602 ldrd r5, r6, [r0], #8
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8000218: 3c08 subs r4, #8
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800021a: ea85 0501 eor.w r5, r5, r1
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800021e: ea86 0601 eor.w r6, r6, r1
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8000222: fa85 f547 uadd8 r5, r5, r7
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8000226: faa3 f587 sel r5, r3, r7
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800022a: fa86 f647 uadd8 r6, r6, r7
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800022e: faa5 f687 sel r6, r5, r7
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8000232: b98e cbnz r6, 8000258 <memchr+0x78>
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8000234: d1ee bne.n 8000214 <memchr+0x34>
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8000236: bcf0 pop {r4, r5, r6, r7}
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8000238: f001 01ff and.w r1, r1, #255 @ 0xff
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800023c: f002 0207 and.w r2, r2, #7
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8000240: b132 cbz r2, 8000250 <memchr+0x70>
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8000242: f810 3b01 ldrb.w r3, [r0], #1
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8000246: 3a01 subs r2, #1
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8000248: ea83 0301 eor.w r3, r3, r1
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800024c: b113 cbz r3, 8000254 <memchr+0x74>
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800024e: d1f8 bne.n 8000242 <memchr+0x62>
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8000250: 2000 movs r0, #0
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8000252: 4770 bx lr
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8000254: 3801 subs r0, #1
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8000256: 4770 bx lr
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8000258: 2d00 cmp r5, #0
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800025a: bf06 itte eq
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800025c: 4635 moveq r5, r6
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800025e: 3803 subeq r0, #3
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8000260: 3807 subne r0, #7
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8000262: f015 0f01 tst.w r5, #1
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8000266: d107 bne.n 8000278 <memchr+0x98>
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8000268: 3001 adds r0, #1
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800026a: f415 7f80 tst.w r5, #256 @ 0x100
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800026e: bf02 ittt eq
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8000270: 3001 addeq r0, #1
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8000272: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
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8000276: 3001 addeq r0, #1
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8000278: bcf0 pop {r4, r5, r6, r7}
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800027a: 3801 subs r0, #1
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800027c: 4770 bx lr
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800027e: bf00 nop
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08000280 <__aeabi_uldivmod>:
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8000280: b953 cbnz r3, 8000298 <__aeabi_uldivmod+0x18>
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8000282: b94a cbnz r2, 8000298 <__aeabi_uldivmod+0x18>
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8000284: 2900 cmp r1, #0
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8000286: bf08 it eq
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8000288: 2800 cmpeq r0, #0
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800028a: bf1c itt ne
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800028c: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
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8000290: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
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8000294: f000 b988 b.w 80005a8 <__aeabi_idiv0>
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8000298: f1ad 0c08 sub.w ip, sp, #8
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800029c: e96d ce04 strd ip, lr, [sp, #-16]!
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80002a0: f000 f806 bl 80002b0 <__udivmoddi4>
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80002a4: f8dd e004 ldr.w lr, [sp, #4]
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80002a8: e9dd 2302 ldrd r2, r3, [sp, #8]
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80002ac: b004 add sp, #16
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80002ae: 4770 bx lr
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080002b0 <__udivmoddi4>:
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80002b0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
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80002b4: 9d08 ldr r5, [sp, #32]
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80002b6: 468e mov lr, r1
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80002b8: 4604 mov r4, r0
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80002ba: 4688 mov r8, r1
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80002bc: 2b00 cmp r3, #0
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80002be: d14a bne.n 8000356 <__udivmoddi4+0xa6>
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80002c0: 428a cmp r2, r1
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80002c2: 4617 mov r7, r2
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80002c4: d962 bls.n 800038c <__udivmoddi4+0xdc>
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80002c6: fab2 f682 clz r6, r2
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80002ca: b14e cbz r6, 80002e0 <__udivmoddi4+0x30>
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80002cc: f1c6 0320 rsb r3, r6, #32
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80002d0: fa01 f806 lsl.w r8, r1, r6
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80002d4: fa20 f303 lsr.w r3, r0, r3
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80002d8: 40b7 lsls r7, r6
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80002da: ea43 0808 orr.w r8, r3, r8
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80002de: 40b4 lsls r4, r6
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80002e0: ea4f 4e17 mov.w lr, r7, lsr #16
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80002e4: fa1f fc87 uxth.w ip, r7
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80002e8: fbb8 f1fe udiv r1, r8, lr
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80002ec: 0c23 lsrs r3, r4, #16
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80002ee: fb0e 8811 mls r8, lr, r1, r8
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80002f2: ea43 4308 orr.w r3, r3, r8, lsl #16
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80002f6: fb01 f20c mul.w r2, r1, ip
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80002fa: 429a cmp r2, r3
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80002fc: d909 bls.n 8000312 <__udivmoddi4+0x62>
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80002fe: 18fb adds r3, r7, r3
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8000300: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff
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8000304: f080 80ea bcs.w 80004dc <__udivmoddi4+0x22c>
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8000308: 429a cmp r2, r3
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800030a: f240 80e7 bls.w 80004dc <__udivmoddi4+0x22c>
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800030e: 3902 subs r1, #2
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8000310: 443b add r3, r7
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8000312: 1a9a subs r2, r3, r2
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8000314: b2a3 uxth r3, r4
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8000316: fbb2 f0fe udiv r0, r2, lr
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800031a: fb0e 2210 mls r2, lr, r0, r2
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800031e: ea43 4302 orr.w r3, r3, r2, lsl #16
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8000322: fb00 fc0c mul.w ip, r0, ip
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8000326: 459c cmp ip, r3
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8000328: d909 bls.n 800033e <__udivmoddi4+0x8e>
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800032a: 18fb adds r3, r7, r3
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800032c: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff
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8000330: f080 80d6 bcs.w 80004e0 <__udivmoddi4+0x230>
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8000334: 459c cmp ip, r3
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8000336: f240 80d3 bls.w 80004e0 <__udivmoddi4+0x230>
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800033a: 443b add r3, r7
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800033c: 3802 subs r0, #2
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800033e: ea40 4001 orr.w r0, r0, r1, lsl #16
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8000342: eba3 030c sub.w r3, r3, ip
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8000346: 2100 movs r1, #0
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8000348: b11d cbz r5, 8000352 <__udivmoddi4+0xa2>
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800034a: 40f3 lsrs r3, r6
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800034c: 2200 movs r2, #0
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800034e: e9c5 3200 strd r3, r2, [r5]
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8000352: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
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8000356: 428b cmp r3, r1
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8000358: d905 bls.n 8000366 <__udivmoddi4+0xb6>
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800035a: b10d cbz r5, 8000360 <__udivmoddi4+0xb0>
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800035c: e9c5 0100 strd r0, r1, [r5]
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8000360: 2100 movs r1, #0
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8000362: 4608 mov r0, r1
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8000364: e7f5 b.n 8000352 <__udivmoddi4+0xa2>
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8000366: fab3 f183 clz r1, r3
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800036a: 2900 cmp r1, #0
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800036c: d146 bne.n 80003fc <__udivmoddi4+0x14c>
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800036e: 4573 cmp r3, lr
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8000370: d302 bcc.n 8000378 <__udivmoddi4+0xc8>
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8000372: 4282 cmp r2, r0
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8000374: f200 8105 bhi.w 8000582 <__udivmoddi4+0x2d2>
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8000378: 1a84 subs r4, r0, r2
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800037a: eb6e 0203 sbc.w r2, lr, r3
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800037e: 2001 movs r0, #1
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8000380: 4690 mov r8, r2
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8000382: 2d00 cmp r5, #0
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8000384: d0e5 beq.n 8000352 <__udivmoddi4+0xa2>
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8000386: e9c5 4800 strd r4, r8, [r5]
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800038a: e7e2 b.n 8000352 <__udivmoddi4+0xa2>
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800038c: 2a00 cmp r2, #0
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800038e: f000 8090 beq.w 80004b2 <__udivmoddi4+0x202>
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8000392: fab2 f682 clz r6, r2
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8000396: 2e00 cmp r6, #0
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8000398: f040 80a4 bne.w 80004e4 <__udivmoddi4+0x234>
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800039c: 1a8a subs r2, r1, r2
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800039e: 0c03 lsrs r3, r0, #16
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80003a0: ea4f 4e17 mov.w lr, r7, lsr #16
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80003a4: b280 uxth r0, r0
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80003a6: b2bc uxth r4, r7
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80003a8: 2101 movs r1, #1
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80003aa: fbb2 fcfe udiv ip, r2, lr
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80003ae: fb0e 221c mls r2, lr, ip, r2
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80003b2: ea43 4302 orr.w r3, r3, r2, lsl #16
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80003b6: fb04 f20c mul.w r2, r4, ip
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80003ba: 429a cmp r2, r3
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80003bc: d907 bls.n 80003ce <__udivmoddi4+0x11e>
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80003be: 18fb adds r3, r7, r3
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80003c0: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff
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80003c4: d202 bcs.n 80003cc <__udivmoddi4+0x11c>
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80003c6: 429a cmp r2, r3
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80003c8: f200 80e0 bhi.w 800058c <__udivmoddi4+0x2dc>
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80003cc: 46c4 mov ip, r8
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80003ce: 1a9b subs r3, r3, r2
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80003d0: fbb3 f2fe udiv r2, r3, lr
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80003d4: fb0e 3312 mls r3, lr, r2, r3
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80003d8: ea40 4303 orr.w r3, r0, r3, lsl #16
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80003dc: fb02 f404 mul.w r4, r2, r4
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80003e0: 429c cmp r4, r3
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80003e2: d907 bls.n 80003f4 <__udivmoddi4+0x144>
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80003e4: 18fb adds r3, r7, r3
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80003e6: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff
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80003ea: d202 bcs.n 80003f2 <__udivmoddi4+0x142>
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80003ec: 429c cmp r4, r3
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80003ee: f200 80ca bhi.w 8000586 <__udivmoddi4+0x2d6>
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80003f2: 4602 mov r2, r0
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80003f4: 1b1b subs r3, r3, r4
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80003f6: ea42 400c orr.w r0, r2, ip, lsl #16
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80003fa: e7a5 b.n 8000348 <__udivmoddi4+0x98>
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80003fc: f1c1 0620 rsb r6, r1, #32
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8000400: 408b lsls r3, r1
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8000402: fa22 f706 lsr.w r7, r2, r6
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8000406: 431f orrs r7, r3
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8000408: fa0e f401 lsl.w r4, lr, r1
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800040c: fa20 f306 lsr.w r3, r0, r6
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8000410: fa2e fe06 lsr.w lr, lr, r6
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8000414: ea4f 4917 mov.w r9, r7, lsr #16
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8000418: 4323 orrs r3, r4
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800041a: fa00 f801 lsl.w r8, r0, r1
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800041e: fa1f fc87 uxth.w ip, r7
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8000422: fbbe f0f9 udiv r0, lr, r9
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8000426: 0c1c lsrs r4, r3, #16
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8000428: fb09 ee10 mls lr, r9, r0, lr
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800042c: ea44 440e orr.w r4, r4, lr, lsl #16
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8000430: fb00 fe0c mul.w lr, r0, ip
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8000434: 45a6 cmp lr, r4
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8000436: fa02 f201 lsl.w r2, r2, r1
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800043a: d909 bls.n 8000450 <__udivmoddi4+0x1a0>
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800043c: 193c adds r4, r7, r4
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800043e: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff
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8000442: f080 809c bcs.w 800057e <__udivmoddi4+0x2ce>
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8000446: 45a6 cmp lr, r4
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8000448: f240 8099 bls.w 800057e <__udivmoddi4+0x2ce>
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800044c: 3802 subs r0, #2
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800044e: 443c add r4, r7
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8000450: eba4 040e sub.w r4, r4, lr
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8000454: fa1f fe83 uxth.w lr, r3
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8000458: fbb4 f3f9 udiv r3, r4, r9
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800045c: fb09 4413 mls r4, r9, r3, r4
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8000460: ea4e 4404 orr.w r4, lr, r4, lsl #16
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|
8000464: fb03 fc0c mul.w ip, r3, ip
|
|
8000468: 45a4 cmp ip, r4
|
|
800046a: d908 bls.n 800047e <__udivmoddi4+0x1ce>
|
|
800046c: 193c adds r4, r7, r4
|
|
800046e: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff
|
|
8000472: f080 8082 bcs.w 800057a <__udivmoddi4+0x2ca>
|
|
8000476: 45a4 cmp ip, r4
|
|
8000478: d97f bls.n 800057a <__udivmoddi4+0x2ca>
|
|
800047a: 3b02 subs r3, #2
|
|
800047c: 443c add r4, r7
|
|
800047e: ea43 4000 orr.w r0, r3, r0, lsl #16
|
|
8000482: eba4 040c sub.w r4, r4, ip
|
|
8000486: fba0 ec02 umull lr, ip, r0, r2
|
|
800048a: 4564 cmp r4, ip
|
|
800048c: 4673 mov r3, lr
|
|
800048e: 46e1 mov r9, ip
|
|
8000490: d362 bcc.n 8000558 <__udivmoddi4+0x2a8>
|
|
8000492: d05f beq.n 8000554 <__udivmoddi4+0x2a4>
|
|
8000494: b15d cbz r5, 80004ae <__udivmoddi4+0x1fe>
|
|
8000496: ebb8 0203 subs.w r2, r8, r3
|
|
800049a: eb64 0409 sbc.w r4, r4, r9
|
|
800049e: fa04 f606 lsl.w r6, r4, r6
|
|
80004a2: fa22 f301 lsr.w r3, r2, r1
|
|
80004a6: 431e orrs r6, r3
|
|
80004a8: 40cc lsrs r4, r1
|
|
80004aa: e9c5 6400 strd r6, r4, [r5]
|
|
80004ae: 2100 movs r1, #0
|
|
80004b0: e74f b.n 8000352 <__udivmoddi4+0xa2>
|
|
80004b2: fbb1 fcf2 udiv ip, r1, r2
|
|
80004b6: 0c01 lsrs r1, r0, #16
|
|
80004b8: ea41 410e orr.w r1, r1, lr, lsl #16
|
|
80004bc: b280 uxth r0, r0
|
|
80004be: ea40 4201 orr.w r2, r0, r1, lsl #16
|
|
80004c2: 463b mov r3, r7
|
|
80004c4: 4638 mov r0, r7
|
|
80004c6: 463c mov r4, r7
|
|
80004c8: 46b8 mov r8, r7
|
|
80004ca: 46be mov lr, r7
|
|
80004cc: 2620 movs r6, #32
|
|
80004ce: fbb1 f1f7 udiv r1, r1, r7
|
|
80004d2: eba2 0208 sub.w r2, r2, r8
|
|
80004d6: ea41 410c orr.w r1, r1, ip, lsl #16
|
|
80004da: e766 b.n 80003aa <__udivmoddi4+0xfa>
|
|
80004dc: 4601 mov r1, r0
|
|
80004de: e718 b.n 8000312 <__udivmoddi4+0x62>
|
|
80004e0: 4610 mov r0, r2
|
|
80004e2: e72c b.n 800033e <__udivmoddi4+0x8e>
|
|
80004e4: f1c6 0220 rsb r2, r6, #32
|
|
80004e8: fa2e f302 lsr.w r3, lr, r2
|
|
80004ec: 40b7 lsls r7, r6
|
|
80004ee: 40b1 lsls r1, r6
|
|
80004f0: fa20 f202 lsr.w r2, r0, r2
|
|
80004f4: ea4f 4e17 mov.w lr, r7, lsr #16
|
|
80004f8: 430a orrs r2, r1
|
|
80004fa: fbb3 f8fe udiv r8, r3, lr
|
|
80004fe: b2bc uxth r4, r7
|
|
8000500: fb0e 3318 mls r3, lr, r8, r3
|
|
8000504: 0c11 lsrs r1, r2, #16
|
|
8000506: ea41 4103 orr.w r1, r1, r3, lsl #16
|
|
800050a: fb08 f904 mul.w r9, r8, r4
|
|
800050e: 40b0 lsls r0, r6
|
|
8000510: 4589 cmp r9, r1
|
|
8000512: ea4f 4310 mov.w r3, r0, lsr #16
|
|
8000516: b280 uxth r0, r0
|
|
8000518: d93e bls.n 8000598 <__udivmoddi4+0x2e8>
|
|
800051a: 1879 adds r1, r7, r1
|
|
800051c: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff
|
|
8000520: d201 bcs.n 8000526 <__udivmoddi4+0x276>
|
|
8000522: 4589 cmp r9, r1
|
|
8000524: d81f bhi.n 8000566 <__udivmoddi4+0x2b6>
|
|
8000526: eba1 0109 sub.w r1, r1, r9
|
|
800052a: fbb1 f9fe udiv r9, r1, lr
|
|
800052e: fb09 f804 mul.w r8, r9, r4
|
|
8000532: fb0e 1119 mls r1, lr, r9, r1
|
|
8000536: b292 uxth r2, r2
|
|
8000538: ea42 4201 orr.w r2, r2, r1, lsl #16
|
|
800053c: 4542 cmp r2, r8
|
|
800053e: d229 bcs.n 8000594 <__udivmoddi4+0x2e4>
|
|
8000540: 18ba adds r2, r7, r2
|
|
8000542: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff
|
|
8000546: d2c4 bcs.n 80004d2 <__udivmoddi4+0x222>
|
|
8000548: 4542 cmp r2, r8
|
|
800054a: d2c2 bcs.n 80004d2 <__udivmoddi4+0x222>
|
|
800054c: f1a9 0102 sub.w r1, r9, #2
|
|
8000550: 443a add r2, r7
|
|
8000552: e7be b.n 80004d2 <__udivmoddi4+0x222>
|
|
8000554: 45f0 cmp r8, lr
|
|
8000556: d29d bcs.n 8000494 <__udivmoddi4+0x1e4>
|
|
8000558: ebbe 0302 subs.w r3, lr, r2
|
|
800055c: eb6c 0c07 sbc.w ip, ip, r7
|
|
8000560: 3801 subs r0, #1
|
|
8000562: 46e1 mov r9, ip
|
|
8000564: e796 b.n 8000494 <__udivmoddi4+0x1e4>
|
|
8000566: eba7 0909 sub.w r9, r7, r9
|
|
800056a: 4449 add r1, r9
|
|
800056c: f1a8 0c02 sub.w ip, r8, #2
|
|
8000570: fbb1 f9fe udiv r9, r1, lr
|
|
8000574: fb09 f804 mul.w r8, r9, r4
|
|
8000578: e7db b.n 8000532 <__udivmoddi4+0x282>
|
|
800057a: 4673 mov r3, lr
|
|
800057c: e77f b.n 800047e <__udivmoddi4+0x1ce>
|
|
800057e: 4650 mov r0, sl
|
|
8000580: e766 b.n 8000450 <__udivmoddi4+0x1a0>
|
|
8000582: 4608 mov r0, r1
|
|
8000584: e6fd b.n 8000382 <__udivmoddi4+0xd2>
|
|
8000586: 443b add r3, r7
|
|
8000588: 3a02 subs r2, #2
|
|
800058a: e733 b.n 80003f4 <__udivmoddi4+0x144>
|
|
800058c: f1ac 0c02 sub.w ip, ip, #2
|
|
8000590: 443b add r3, r7
|
|
8000592: e71c b.n 80003ce <__udivmoddi4+0x11e>
|
|
8000594: 4649 mov r1, r9
|
|
8000596: e79c b.n 80004d2 <__udivmoddi4+0x222>
|
|
8000598: eba1 0109 sub.w r1, r1, r9
|
|
800059c: 46c4 mov ip, r8
|
|
800059e: fbb1 f9fe udiv r9, r1, lr
|
|
80005a2: fb09 f804 mul.w r8, r9, r4
|
|
80005a6: e7c4 b.n 8000532 <__udivmoddi4+0x282>
|
|
|
|
080005a8 <__aeabi_idiv0>:
|
|
80005a8: 4770 bx lr
|
|
80005aa: bf00 nop
|
|
|
|
080005ac <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
80005ac: b510 push {r4, lr}
|
|
80005ae: 4604 mov r4, r0
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
80005b0: 4b0e ldr r3, [pc, #56] @ (80005ec <HAL_InitTick+0x40>)
|
|
80005b2: 781a ldrb r2, [r3, #0]
|
|
80005b4: f44f 737a mov.w r3, #1000 @ 0x3e8
|
|
80005b8: fbb3 f3f2 udiv r3, r3, r2
|
|
80005bc: 4a0c ldr r2, [pc, #48] @ (80005f0 <HAL_InitTick+0x44>)
|
|
80005be: 6810 ldr r0, [r2, #0]
|
|
80005c0: fbb0 f0f3 udiv r0, r0, r3
|
|
80005c4: f000 f8ac bl 8000720 <HAL_SYSTICK_Config>
|
|
80005c8: b968 cbnz r0, 80005e6 <HAL_InitTick+0x3a>
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
80005ca: 2c0f cmp r4, #15
|
|
80005cc: d901 bls.n 80005d2 <HAL_InitTick+0x26>
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
uwTickPrio = TickPriority;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
80005ce: 2001 movs r0, #1
|
|
80005d0: e00a b.n 80005e8 <HAL_InitTick+0x3c>
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
80005d2: 2200 movs r2, #0
|
|
80005d4: 4621 mov r1, r4
|
|
80005d6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80005da: f000 f891 bl 8000700 <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
80005de: 4b03 ldr r3, [pc, #12] @ (80005ec <HAL_InitTick+0x40>)
|
|
80005e0: 605c str r4, [r3, #4]
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80005e2: 2000 movs r0, #0
|
|
80005e4: e000 b.n 80005e8 <HAL_InitTick+0x3c>
|
|
return HAL_ERROR;
|
|
80005e6: 2001 movs r0, #1
|
|
}
|
|
80005e8: bd10 pop {r4, pc}
|
|
80005ea: bf00 nop
|
|
80005ec: 20000000 .word 0x20000000
|
|
80005f0: 20000028 .word 0x20000028
|
|
|
|
080005f4 <HAL_Init>:
|
|
{
|
|
80005f4: b508 push {r3, lr}
|
|
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
|
|
80005f6: 4b0b ldr r3, [pc, #44] @ (8000624 <HAL_Init+0x30>)
|
|
80005f8: 681a ldr r2, [r3, #0]
|
|
80005fa: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
80005fe: 601a str r2, [r3, #0]
|
|
__HAL_FLASH_DATA_CACHE_ENABLE();
|
|
8000600: 681a ldr r2, [r3, #0]
|
|
8000602: f442 6280 orr.w r2, r2, #1024 @ 0x400
|
|
8000606: 601a str r2, [r3, #0]
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
8000608: 681a ldr r2, [r3, #0]
|
|
800060a: f442 7280 orr.w r2, r2, #256 @ 0x100
|
|
800060e: 601a str r2, [r3, #0]
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
8000610: 2003 movs r0, #3
|
|
8000612: f000 f863 bl 80006dc <HAL_NVIC_SetPriorityGrouping>
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
8000616: 200f movs r0, #15
|
|
8000618: f7ff ffc8 bl 80005ac <HAL_InitTick>
|
|
HAL_MspInit();
|
|
800061c: f003 fd08 bl 8004030 <HAL_MspInit>
|
|
}
|
|
8000620: 2000 movs r0, #0
|
|
8000622: bd08 pop {r3, pc}
|
|
8000624: 40023c00 .word 0x40023c00
|
|
|
|
08000628 <HAL_IncTick>:
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
uwTick += uwTickFreq;
|
|
8000628: 4a03 ldr r2, [pc, #12] @ (8000638 <HAL_IncTick+0x10>)
|
|
800062a: 6811 ldr r1, [r2, #0]
|
|
800062c: 4b03 ldr r3, [pc, #12] @ (800063c <HAL_IncTick+0x14>)
|
|
800062e: 781b ldrb r3, [r3, #0]
|
|
8000630: 440b add r3, r1
|
|
8000632: 6013 str r3, [r2, #0]
|
|
}
|
|
8000634: 4770 bx lr
|
|
8000636: bf00 nop
|
|
8000638: 20000098 .word 0x20000098
|
|
800063c: 20000000 .word 0x20000000
|
|
|
|
08000640 <HAL_GetTick>:
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
return uwTick;
|
|
8000640: 4b01 ldr r3, [pc, #4] @ (8000648 <HAL_GetTick+0x8>)
|
|
8000642: 6818 ldr r0, [r3, #0]
|
|
}
|
|
8000644: 4770 bx lr
|
|
8000646: bf00 nop
|
|
8000648: 20000098 .word 0x20000098
|
|
|
|
0800064c <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
800064c: b538 push {r3, r4, r5, lr}
|
|
800064e: 4604 mov r4, r0
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8000650: f7ff fff6 bl 8000640 <HAL_GetTick>
|
|
8000654: 4605 mov r5, r0
|
|
uint32_t wait = Delay;
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
8000656: f1b4 3fff cmp.w r4, #4294967295 @ 0xffffffff
|
|
800065a: d002 beq.n 8000662 <HAL_Delay+0x16>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
800065c: 4b04 ldr r3, [pc, #16] @ (8000670 <HAL_Delay+0x24>)
|
|
800065e: 781b ldrb r3, [r3, #0]
|
|
8000660: 441c add r4, r3
|
|
}
|
|
|
|
while((HAL_GetTick() - tickstart) < wait)
|
|
8000662: f7ff ffed bl 8000640 <HAL_GetTick>
|
|
8000666: 1b40 subs r0, r0, r5
|
|
8000668: 42a0 cmp r0, r4
|
|
800066a: d3fa bcc.n 8000662 <HAL_Delay+0x16>
|
|
{
|
|
}
|
|
}
|
|
800066c: bd38 pop {r3, r4, r5, pc}
|
|
800066e: bf00 nop
|
|
8000670: 20000000 .word 0x20000000
|
|
|
|
08000674 <__NVIC_SetPriority>:
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8000674: 2800 cmp r0, #0
|
|
8000676: db08 blt.n 800068a <__NVIC_SetPriority+0x16>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8000678: 0109 lsls r1, r1, #4
|
|
800067a: b2c9 uxtb r1, r1
|
|
800067c: f100 4060 add.w r0, r0, #3758096384 @ 0xe0000000
|
|
8000680: f500 4061 add.w r0, r0, #57600 @ 0xe100
|
|
8000684: f880 1300 strb.w r1, [r0, #768] @ 0x300
|
|
8000688: 4770 bx lr
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800068a: f000 000f and.w r0, r0, #15
|
|
800068e: 0109 lsls r1, r1, #4
|
|
8000690: b2c9 uxtb r1, r1
|
|
8000692: 4b01 ldr r3, [pc, #4] @ (8000698 <__NVIC_SetPriority+0x24>)
|
|
8000694: 5419 strb r1, [r3, r0]
|
|
}
|
|
}
|
|
8000696: 4770 bx lr
|
|
8000698: e000ed14 .word 0xe000ed14
|
|
|
|
0800069c <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800069c: b500 push {lr}
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
800069e: f000 0007 and.w r0, r0, #7
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
80006a2: f1c0 0c07 rsb ip, r0, #7
|
|
80006a6: f1bc 0f04 cmp.w ip, #4
|
|
80006aa: bf28 it cs
|
|
80006ac: f04f 0c04 movcs.w ip, #4
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
80006b0: 1d03 adds r3, r0, #4
|
|
80006b2: 2b06 cmp r3, #6
|
|
80006b4: d90f bls.n 80006d6 <NVIC_EncodePriority+0x3a>
|
|
80006b6: 1ec3 subs r3, r0, #3
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
80006b8: f04f 3eff mov.w lr, #4294967295 @ 0xffffffff
|
|
80006bc: fa0e f00c lsl.w r0, lr, ip
|
|
80006c0: ea21 0100 bic.w r1, r1, r0
|
|
80006c4: 4099 lsls r1, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
80006c6: fa0e fe03 lsl.w lr, lr, r3
|
|
80006ca: ea22 020e bic.w r2, r2, lr
|
|
);
|
|
}
|
|
80006ce: ea41 0002 orr.w r0, r1, r2
|
|
80006d2: f85d fb04 ldr.w pc, [sp], #4
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
80006d6: 2300 movs r3, #0
|
|
80006d8: e7ee b.n 80006b8 <NVIC_EncodePriority+0x1c>
|
|
...
|
|
|
|
080006dc <HAL_NVIC_SetPriorityGrouping>:
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
80006dc: 4a07 ldr r2, [pc, #28] @ (80006fc <HAL_NVIC_SetPriorityGrouping+0x20>)
|
|
80006de: 68d3 ldr r3, [r2, #12]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
80006e0: f423 63e0 bic.w r3, r3, #1792 @ 0x700
|
|
80006e4: 041b lsls r3, r3, #16
|
|
80006e6: 0c1b lsrs r3, r3, #16
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
80006e8: 0200 lsls r0, r0, #8
|
|
80006ea: f400 60e0 and.w r0, r0, #1792 @ 0x700
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
80006ee: 4303 orrs r3, r0
|
|
reg_value = (reg_value |
|
|
80006f0: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
|
|
80006f4: f443 3300 orr.w r3, r3, #131072 @ 0x20000
|
|
SCB->AIRCR = reg_value;
|
|
80006f8: 60d3 str r3, [r2, #12]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
}
|
|
80006fa: 4770 bx lr
|
|
80006fc: e000ed00 .word 0xe000ed00
|
|
|
|
08000700 <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
8000700: b510 push {r4, lr}
|
|
8000702: 4604 mov r4, r0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <HAL_NVIC_SetPriority+0x1c>)
|
|
8000706: 68d8 ldr r0, [r3, #12]
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
8000708: f3c0 2002 ubfx r0, r0, #8, #3
|
|
800070c: f7ff ffc6 bl 800069c <NVIC_EncodePriority>
|
|
8000710: 4601 mov r1, r0
|
|
8000712: 4620 mov r0, r4
|
|
8000714: f7ff ffae bl 8000674 <__NVIC_SetPriority>
|
|
}
|
|
8000718: bd10 pop {r4, pc}
|
|
800071a: bf00 nop
|
|
800071c: e000ed00 .word 0xe000ed00
|
|
|
|
08000720 <HAL_SYSTICK_Config>:
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8000720: 3801 subs r0, #1
|
|
8000722: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000
|
|
8000726: d20b bcs.n 8000740 <HAL_SYSTICK_Config+0x20>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8000728: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
800072c: 6158 str r0, [r3, #20]
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800072e: 4a05 ldr r2, [pc, #20] @ (8000744 <HAL_SYSTICK_Config+0x24>)
|
|
8000730: 21f0 movs r1, #240 @ 0xf0
|
|
8000732: f882 1023 strb.w r1, [r2, #35] @ 0x23
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8000736: 2000 movs r0, #0
|
|
8000738: 6198 str r0, [r3, #24]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
800073a: 2207 movs r2, #7
|
|
800073c: 611a str r2, [r3, #16]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
800073e: 4770 bx lr
|
|
return (1UL); /* Reload value impossible */
|
|
8000740: 2001 movs r0, #1
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
return SysTick_Config(TicksNumb);
|
|
}
|
|
8000742: 4770 bx lr
|
|
8000744: e000ed00 .word 0xe000ed00
|
|
|
|
08000748 <HAL_GPIO_Init>:
|
|
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
|
|
/* Configure the port pins */
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
8000748: 2300 movs r3, #0
|
|
800074a: 2b0f cmp r3, #15
|
|
800074c: f200 80e9 bhi.w 8000922 <HAL_GPIO_Init+0x1da>
|
|
{
|
|
8000750: b570 push {r4, r5, r6, lr}
|
|
8000752: b082 sub sp, #8
|
|
8000754: e065 b.n 8000822 <HAL_GPIO_Init+0xda>
|
|
(GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
{
|
|
/* Check the Speed parameter */
|
|
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
|
/* Configure the IO Speed */
|
|
temp = GPIOx->OSPEEDR;
|
|
8000756: 6885 ldr r5, [r0, #8]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
|
|
8000758: ea4f 0e43 mov.w lr, r3, lsl #1
|
|
800075c: 2403 movs r4, #3
|
|
800075e: fa04 f40e lsl.w r4, r4, lr
|
|
8000762: ea25 0504 bic.w r5, r5, r4
|
|
temp |= (GPIO_Init->Speed << (position * 2U));
|
|
8000766: 68cc ldr r4, [r1, #12]
|
|
8000768: fa04 f40e lsl.w r4, r4, lr
|
|
800076c: 432c orrs r4, r5
|
|
GPIOx->OSPEEDR = temp;
|
|
800076e: 6084 str r4, [r0, #8]
|
|
|
|
/* Configure the IO Output Type */
|
|
temp = GPIOx->OTYPER;
|
|
8000770: 6844 ldr r4, [r0, #4]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
8000772: ea24 0402 bic.w r4, r4, r2
|
|
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
|
|
8000776: 684a ldr r2, [r1, #4]
|
|
8000778: f3c2 1200 ubfx r2, r2, #4, #1
|
|
800077c: 409a lsls r2, r3
|
|
800077e: 4322 orrs r2, r4
|
|
GPIOx->OTYPER = temp;
|
|
8000780: 6042 str r2, [r0, #4]
|
|
8000782: e05c b.n 800083e <HAL_GPIO_Init+0xf6>
|
|
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
{
|
|
/* Check the Alternate function parameter */
|
|
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
|
|
/* Configure Alternate function mapped with the current IO */
|
|
temp = GPIOx->AFR[position >> 3U];
|
|
8000784: 08dc lsrs r4, r3, #3
|
|
8000786: 3408 adds r4, #8
|
|
8000788: f850 2024 ldr.w r2, [r0, r4, lsl #2]
|
|
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
|
|
800078c: f003 0507 and.w r5, r3, #7
|
|
8000790: 00ad lsls r5, r5, #2
|
|
8000792: f04f 0e0f mov.w lr, #15
|
|
8000796: fa0e fe05 lsl.w lr, lr, r5
|
|
800079a: ea22 0e0e bic.w lr, r2, lr
|
|
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
|
|
800079e: 690a ldr r2, [r1, #16]
|
|
80007a0: 40aa lsls r2, r5
|
|
80007a2: ea42 020e orr.w r2, r2, lr
|
|
GPIOx->AFR[position >> 3U] = temp;
|
|
80007a6: f840 2024 str.w r2, [r0, r4, lsl #2]
|
|
80007aa: e05c b.n 8000866 <HAL_GPIO_Init+0x11e>
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2U];
|
|
temp &= ~(0x0FU << (4U * (position & 0x03U)));
|
|
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
|
|
80007ac: 2207 movs r2, #7
|
|
80007ae: e000 b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
80007b0: 2200 movs r2, #0
|
|
80007b2: fa02 f20e lsl.w r2, r2, lr
|
|
80007b6: 432a orrs r2, r5
|
|
SYSCFG->EXTICR[position >> 2U] = temp;
|
|
80007b8: 3402 adds r4, #2
|
|
80007ba: 4d5a ldr r5, [pc, #360] @ (8000924 <HAL_GPIO_Init+0x1dc>)
|
|
80007bc: f845 2024 str.w r2, [r5, r4, lsl #2]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
80007c0: 4a59 ldr r2, [pc, #356] @ (8000928 <HAL_GPIO_Init+0x1e0>)
|
|
80007c2: 6894 ldr r4, [r2, #8]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80007c4: ea6f 020c mvn.w r2, ip
|
|
80007c8: ea24 050c bic.w r5, r4, ip
|
|
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
|
|
80007cc: 684e ldr r6, [r1, #4]
|
|
80007ce: f416 1f80 tst.w r6, #1048576 @ 0x100000
|
|
80007d2: d001 beq.n 80007d8 <HAL_GPIO_Init+0x90>
|
|
{
|
|
temp |= iocurrent;
|
|
80007d4: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->RTSR = temp;
|
|
80007d8: 4c53 ldr r4, [pc, #332] @ (8000928 <HAL_GPIO_Init+0x1e0>)
|
|
80007da: 60a5 str r5, [r4, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
80007dc: 68e4 ldr r4, [r4, #12]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80007de: ea02 0504 and.w r5, r2, r4
|
|
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
|
|
80007e2: 684e ldr r6, [r1, #4]
|
|
80007e4: f416 1f00 tst.w r6, #2097152 @ 0x200000
|
|
80007e8: d001 beq.n 80007ee <HAL_GPIO_Init+0xa6>
|
|
{
|
|
temp |= iocurrent;
|
|
80007ea: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->FTSR = temp;
|
|
80007ee: 4c4e ldr r4, [pc, #312] @ (8000928 <HAL_GPIO_Init+0x1e0>)
|
|
80007f0: 60e5 str r5, [r4, #12]
|
|
|
|
temp = EXTI->EMR;
|
|
80007f2: 6864 ldr r4, [r4, #4]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80007f4: ea02 0504 and.w r5, r2, r4
|
|
if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
|
|
80007f8: 684e ldr r6, [r1, #4]
|
|
80007fa: f416 3f00 tst.w r6, #131072 @ 0x20000
|
|
80007fe: d001 beq.n 8000804 <HAL_GPIO_Init+0xbc>
|
|
{
|
|
temp |= iocurrent;
|
|
8000800: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->EMR = temp;
|
|
8000804: 4c48 ldr r4, [pc, #288] @ (8000928 <HAL_GPIO_Init+0x1e0>)
|
|
8000806: 6065 str r5, [r4, #4]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->IMR;
|
|
8000808: 6824 ldr r4, [r4, #0]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
800080a: 4022 ands r2, r4
|
|
if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
|
|
800080c: 684d ldr r5, [r1, #4]
|
|
800080e: f415 3f80 tst.w r5, #65536 @ 0x10000
|
|
8000812: d001 beq.n 8000818 <HAL_GPIO_Init+0xd0>
|
|
{
|
|
temp |= iocurrent;
|
|
8000814: ea4c 0204 orr.w r2, ip, r4
|
|
}
|
|
EXTI->IMR = temp;
|
|
8000818: 4c43 ldr r4, [pc, #268] @ (8000928 <HAL_GPIO_Init+0x1e0>)
|
|
800081a: 6022 str r2, [r4, #0]
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
800081c: 3301 adds r3, #1
|
|
800081e: 2b0f cmp r3, #15
|
|
8000820: d87d bhi.n 800091e <HAL_GPIO_Init+0x1d6>
|
|
ioposition = 0x01U << position;
|
|
8000822: 2201 movs r2, #1
|
|
8000824: 409a lsls r2, r3
|
|
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
|
8000826: 680c ldr r4, [r1, #0]
|
|
8000828: ea04 0c02 and.w ip, r4, r2
|
|
if(iocurrent == ioposition)
|
|
800082c: ea32 0404 bics.w r4, r2, r4
|
|
8000830: d1f4 bne.n 800081c <HAL_GPIO_Init+0xd4>
|
|
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
|
|
8000832: 684c ldr r4, [r1, #4]
|
|
8000834: f004 0403 and.w r4, r4, #3
|
|
8000838: 3c01 subs r4, #1
|
|
800083a: 2c01 cmp r4, #1
|
|
800083c: d98b bls.n 8000756 <HAL_GPIO_Init+0xe>
|
|
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
|
|
800083e: 684a ldr r2, [r1, #4]
|
|
8000840: f002 0203 and.w r2, r2, #3
|
|
8000844: 2a03 cmp r2, #3
|
|
8000846: d009 beq.n 800085c <HAL_GPIO_Init+0x114>
|
|
temp = GPIOx->PUPDR;
|
|
8000848: 68c4 ldr r4, [r0, #12]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
|
|
800084a: 005d lsls r5, r3, #1
|
|
800084c: 2203 movs r2, #3
|
|
800084e: 40aa lsls r2, r5
|
|
8000850: ea24 0402 bic.w r4, r4, r2
|
|
temp |= ((GPIO_Init->Pull) << (position * 2U));
|
|
8000854: 688a ldr r2, [r1, #8]
|
|
8000856: 40aa lsls r2, r5
|
|
8000858: 4322 orrs r2, r4
|
|
GPIOx->PUPDR = temp;
|
|
800085a: 60c2 str r2, [r0, #12]
|
|
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
|
|
800085c: 684a ldr r2, [r1, #4]
|
|
800085e: f002 0203 and.w r2, r2, #3
|
|
8000862: 2a02 cmp r2, #2
|
|
8000864: d08e beq.n 8000784 <HAL_GPIO_Init+0x3c>
|
|
temp = GPIOx->MODER;
|
|
8000866: 6804 ldr r4, [r0, #0]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
|
|
8000868: ea4f 0e43 mov.w lr, r3, lsl #1
|
|
800086c: 2203 movs r2, #3
|
|
800086e: fa02 f20e lsl.w r2, r2, lr
|
|
8000872: ea24 0402 bic.w r4, r4, r2
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
|
|
8000876: 684a ldr r2, [r1, #4]
|
|
8000878: f002 0203 and.w r2, r2, #3
|
|
800087c: fa02 f20e lsl.w r2, r2, lr
|
|
8000880: 4322 orrs r2, r4
|
|
GPIOx->MODER = temp;
|
|
8000882: 6002 str r2, [r0, #0]
|
|
if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
|
|
8000884: 684a ldr r2, [r1, #4]
|
|
8000886: f412 3f40 tst.w r2, #196608 @ 0x30000
|
|
800088a: d0c7 beq.n 800081c <HAL_GPIO_Init+0xd4>
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
800088c: 2200 movs r2, #0
|
|
800088e: 9201 str r2, [sp, #4]
|
|
8000890: 4a26 ldr r2, [pc, #152] @ (800092c <HAL_GPIO_Init+0x1e4>)
|
|
8000892: 6c54 ldr r4, [r2, #68] @ 0x44
|
|
8000894: f444 4480 orr.w r4, r4, #16384 @ 0x4000
|
|
8000898: 6454 str r4, [r2, #68] @ 0x44
|
|
800089a: 6c52 ldr r2, [r2, #68] @ 0x44
|
|
800089c: f402 4280 and.w r2, r2, #16384 @ 0x4000
|
|
80008a0: 9201 str r2, [sp, #4]
|
|
80008a2: 9a01 ldr r2, [sp, #4]
|
|
temp = SYSCFG->EXTICR[position >> 2U];
|
|
80008a4: 089c lsrs r4, r3, #2
|
|
80008a6: 1ca5 adds r5, r4, #2
|
|
80008a8: 4a1e ldr r2, [pc, #120] @ (8000924 <HAL_GPIO_Init+0x1dc>)
|
|
80008aa: f852 5025 ldr.w r5, [r2, r5, lsl #2]
|
|
temp &= ~(0x0FU << (4U * (position & 0x03U)));
|
|
80008ae: f003 0e03 and.w lr, r3, #3
|
|
80008b2: ea4f 0e8e mov.w lr, lr, lsl #2
|
|
80008b6: 220f movs r2, #15
|
|
80008b8: fa02 f20e lsl.w r2, r2, lr
|
|
80008bc: ea25 0502 bic.w r5, r5, r2
|
|
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
|
|
80008c0: 4a1b ldr r2, [pc, #108] @ (8000930 <HAL_GPIO_Init+0x1e8>)
|
|
80008c2: 4290 cmp r0, r2
|
|
80008c4: f43f af74 beq.w 80007b0 <HAL_GPIO_Init+0x68>
|
|
80008c8: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008cc: 4290 cmp r0, r2
|
|
80008ce: d01a beq.n 8000906 <HAL_GPIO_Init+0x1be>
|
|
80008d0: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008d4: 4290 cmp r0, r2
|
|
80008d6: d018 beq.n 800090a <HAL_GPIO_Init+0x1c2>
|
|
80008d8: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008dc: 4290 cmp r0, r2
|
|
80008de: d016 beq.n 800090e <HAL_GPIO_Init+0x1c6>
|
|
80008e0: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008e4: 4290 cmp r0, r2
|
|
80008e6: d014 beq.n 8000912 <HAL_GPIO_Init+0x1ca>
|
|
80008e8: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008ec: 4290 cmp r0, r2
|
|
80008ee: d012 beq.n 8000916 <HAL_GPIO_Init+0x1ce>
|
|
80008f0: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008f4: 4290 cmp r0, r2
|
|
80008f6: d010 beq.n 800091a <HAL_GPIO_Init+0x1d2>
|
|
80008f8: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008fc: 4290 cmp r0, r2
|
|
80008fe: f43f af55 beq.w 80007ac <HAL_GPIO_Init+0x64>
|
|
8000902: 2208 movs r2, #8
|
|
8000904: e755 b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
8000906: 2201 movs r2, #1
|
|
8000908: e753 b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
800090a: 2202 movs r2, #2
|
|
800090c: e751 b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
800090e: 2203 movs r2, #3
|
|
8000910: e74f b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
8000912: 2204 movs r2, #4
|
|
8000914: e74d b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
8000916: 2205 movs r2, #5
|
|
8000918: e74b b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
800091a: 2206 movs r2, #6
|
|
800091c: e749 b.n 80007b2 <HAL_GPIO_Init+0x6a>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
800091e: b002 add sp, #8
|
|
8000920: bd70 pop {r4, r5, r6, pc}
|
|
8000922: 4770 bx lr
|
|
8000924: 40013800 .word 0x40013800
|
|
8000928: 40013c00 .word 0x40013c00
|
|
800092c: 40023800 .word 0x40023800
|
|
8000930: 40020000 .word 0x40020000
|
|
|
|
08000934 <I2C_IsAcknowledgeFailed>:
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8000934: 6803 ldr r3, [r0, #0]
|
|
8000936: 695a ldr r2, [r3, #20]
|
|
8000938: f412 6f80 tst.w r2, #1024 @ 0x400
|
|
800093c: d101 bne.n 8000942 <I2C_IsAcknowledgeFailed+0xe>
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
return HAL_OK;
|
|
800093e: 2000 movs r0, #0
|
|
}
|
|
8000940: 4770 bx lr
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
8000942: f46f 6280 mvn.w r2, #1024 @ 0x400
|
|
8000946: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000948: 2300 movs r3, #0
|
|
800094a: 6303 str r3, [r0, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800094c: 2220 movs r2, #32
|
|
800094e: f880 203d strb.w r2, [r0, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000952: f880 303e strb.w r3, [r0, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
8000956: 6c02 ldr r2, [r0, #64] @ 0x40
|
|
8000958: f042 0204 orr.w r2, r2, #4
|
|
800095c: 6402 str r2, [r0, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
800095e: f880 303c strb.w r3, [r0, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000962: 2001 movs r0, #1
|
|
8000964: 4770 bx lr
|
|
|
|
08000966 <I2C_WaitOnFlagUntilTimeout>:
|
|
{
|
|
8000966: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
800096a: 4606 mov r6, r0
|
|
800096c: 460c mov r4, r1
|
|
800096e: 4617 mov r7, r2
|
|
8000970: 4698 mov r8, r3
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8000972: e03b b.n 80009ec <I2C_WaitOnFlagUntilTimeout+0x86>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000974: f7ff fe64 bl 8000640 <HAL_GetTick>
|
|
8000978: 9b06 ldr r3, [sp, #24]
|
|
800097a: 1ac0 subs r0, r0, r3
|
|
800097c: 4540 cmp r0, r8
|
|
800097e: d802 bhi.n 8000986 <I2C_WaitOnFlagUntilTimeout+0x20>
|
|
8000980: f1b8 0f00 cmp.w r8, #0
|
|
8000984: d132 bne.n 80009ec <I2C_WaitOnFlagUntilTimeout+0x86>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
|
|
8000986: 2d01 cmp r5, #1
|
|
8000988: d018 beq.n 80009bc <I2C_WaitOnFlagUntilTimeout+0x56>
|
|
800098a: 6833 ldr r3, [r6, #0]
|
|
800098c: 699b ldr r3, [r3, #24]
|
|
800098e: ea24 0303 bic.w r3, r4, r3
|
|
8000992: b29b uxth r3, r3
|
|
8000994: fab3 f383 clz r3, r3
|
|
8000998: 095b lsrs r3, r3, #5
|
|
800099a: 429f cmp r7, r3
|
|
800099c: d126 bne.n 80009ec <I2C_WaitOnFlagUntilTimeout+0x86>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
800099e: 2300 movs r3, #0
|
|
80009a0: 6333 str r3, [r6, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80009a2: 2220 movs r2, #32
|
|
80009a4: f886 203d strb.w r2, [r6, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80009a8: f886 303e strb.w r3, [r6, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
80009ac: 6c32 ldr r2, [r6, #64] @ 0x40
|
|
80009ae: f042 0220 orr.w r2, r2, #32
|
|
80009b2: 6432 str r2, [r6, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
80009b4: f886 303c strb.w r3, [r6, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
80009b8: 2001 movs r0, #1
|
|
80009ba: e027 b.n 8000a0c <I2C_WaitOnFlagUntilTimeout+0xa6>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status))
|
|
80009bc: 6833 ldr r3, [r6, #0]
|
|
80009be: 695b ldr r3, [r3, #20]
|
|
80009c0: ea24 0303 bic.w r3, r4, r3
|
|
80009c4: b29b uxth r3, r3
|
|
80009c6: fab3 f383 clz r3, r3
|
|
80009ca: 095b lsrs r3, r3, #5
|
|
80009cc: e7e5 b.n 800099a <I2C_WaitOnFlagUntilTimeout+0x34>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
80009ce: 6833 ldr r3, [r6, #0]
|
|
80009d0: 695b ldr r3, [r3, #20]
|
|
80009d2: ea24 0c03 bic.w ip, r4, r3
|
|
80009d6: fa1f fc8c uxth.w ip, ip
|
|
80009da: fabc fc8c clz ip, ip
|
|
80009de: ea4f 1c5c mov.w ip, ip, lsr #5
|
|
80009e2: 4567 cmp r7, ip
|
|
80009e4: d111 bne.n 8000a0a <I2C_WaitOnFlagUntilTimeout+0xa4>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
80009e6: f1b8 3fff cmp.w r8, #4294967295 @ 0xffffffff
|
|
80009ea: d1c3 bne.n 8000974 <I2C_WaitOnFlagUntilTimeout+0xe>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
80009ec: f3c4 4507 ubfx r5, r4, #16, #8
|
|
80009f0: 2d01 cmp r5, #1
|
|
80009f2: d0ec beq.n 80009ce <I2C_WaitOnFlagUntilTimeout+0x68>
|
|
80009f4: 6833 ldr r3, [r6, #0]
|
|
80009f6: 699b ldr r3, [r3, #24]
|
|
80009f8: ea24 0c03 bic.w ip, r4, r3
|
|
80009fc: fa1f fc8c uxth.w ip, ip
|
|
8000a00: fabc fc8c clz ip, ip
|
|
8000a04: ea4f 1c5c mov.w ip, ip, lsr #5
|
|
8000a08: e7eb b.n 80009e2 <I2C_WaitOnFlagUntilTimeout+0x7c>
|
|
return HAL_OK;
|
|
8000a0a: 2000 movs r0, #0
|
|
}
|
|
8000a0c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
|
|
08000a10 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
|
{
|
|
8000a10: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
8000a14: 4605 mov r5, r0
|
|
8000a16: 460e mov r6, r1
|
|
8000a18: 4690 mov r8, r2
|
|
8000a1a: 4699 mov r9, r3
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8000a1c: e053 b.n 8000ac6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb6>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000a1e: 681a ldr r2, [r3, #0]
|
|
8000a20: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
8000a24: 601a str r2, [r3, #0]
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
8000a26: 682b ldr r3, [r5, #0]
|
|
8000a28: f46f 6280 mvn.w r2, #1024 @ 0x400
|
|
8000a2c: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000a2e: 2300 movs r3, #0
|
|
8000a30: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000a32: 2220 movs r2, #32
|
|
8000a34: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000a38: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
8000a3c: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
8000a3e: f042 0204 orr.w r2, r2, #4
|
|
8000a42: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000a44: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000a48: 2001 movs r0, #1
|
|
8000a4a: e04a b.n 8000ae2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd2>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000a4c: f7ff fdf8 bl 8000640 <HAL_GetTick>
|
|
8000a50: eba0 0009 sub.w r0, r0, r9
|
|
8000a54: 4540 cmp r0, r8
|
|
8000a56: d802 bhi.n 8000a5e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x4e>
|
|
8000a58: f1b8 0f00 cmp.w r8, #0
|
|
8000a5c: d133 bne.n 8000ac6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb6>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET))
|
|
8000a5e: 2f01 cmp r7, #1
|
|
8000a60: d017 beq.n 8000a92 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x82>
|
|
8000a62: 682b ldr r3, [r5, #0]
|
|
8000a64: 699b ldr r3, [r3, #24]
|
|
8000a66: ea26 0303 bic.w r3, r6, r3
|
|
8000a6a: b29b uxth r3, r3
|
|
8000a6c: 3b00 subs r3, #0
|
|
8000a6e: bf18 it ne
|
|
8000a70: 2301 movne r3, #1
|
|
8000a72: b343 cbz r3, 8000ac6 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb6>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000a74: 2300 movs r3, #0
|
|
8000a76: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000a78: 2220 movs r2, #32
|
|
8000a7a: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000a7e: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000a82: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
8000a84: f042 0220 orr.w r2, r2, #32
|
|
8000a88: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000a8a: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000a8e: 2001 movs r0, #1
|
|
8000a90: e027 b.n 8000ae2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd2>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET))
|
|
8000a92: 682b ldr r3, [r5, #0]
|
|
8000a94: 695b ldr r3, [r3, #20]
|
|
8000a96: ea26 0303 bic.w r3, r6, r3
|
|
8000a9a: b29b uxth r3, r3
|
|
8000a9c: 3b00 subs r3, #0
|
|
8000a9e: bf18 it ne
|
|
8000aa0: 2301 movne r3, #1
|
|
8000aa2: e7e6 b.n 8000a72 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x62>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8000aa4: 682b ldr r3, [r5, #0]
|
|
8000aa6: 699c ldr r4, [r3, #24]
|
|
8000aa8: ea26 0404 bic.w r4, r6, r4
|
|
8000aac: b2a4 uxth r4, r4
|
|
8000aae: 3c00 subs r4, #0
|
|
8000ab0: bf18 it ne
|
|
8000ab2: 2401 movne r4, #1
|
|
8000ab4: b1a4 cbz r4, 8000ae0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd0>
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8000ab6: 682b ldr r3, [r5, #0]
|
|
8000ab8: 695a ldr r2, [r3, #20]
|
|
8000aba: f412 6f80 tst.w r2, #1024 @ 0x400
|
|
8000abe: d1ae bne.n 8000a1e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xe>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000ac0: f1b8 3fff cmp.w r8, #4294967295 @ 0xffffffff
|
|
8000ac4: d1c2 bne.n 8000a4c <I2C_WaitOnMasterAddressFlagUntilTimeout+0x3c>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8000ac6: f3c6 4707 ubfx r7, r6, #16, #8
|
|
8000aca: 2f01 cmp r7, #1
|
|
8000acc: d1ea bne.n 8000aa4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x94>
|
|
8000ace: 682b ldr r3, [r5, #0]
|
|
8000ad0: 695c ldr r4, [r3, #20]
|
|
8000ad2: ea26 0404 bic.w r4, r6, r4
|
|
8000ad6: b2a4 uxth r4, r4
|
|
8000ad8: 3c00 subs r4, #0
|
|
8000ada: bf18 it ne
|
|
8000adc: 2401 movne r4, #1
|
|
8000ade: e7e9 b.n 8000ab4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xa4>
|
|
return HAL_OK;
|
|
8000ae0: 2000 movs r0, #0
|
|
}
|
|
8000ae2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
|
|
08000ae6 <I2C_WaitOnTXEFlagUntilTimeout>:
|
|
{
|
|
8000ae6: b570 push {r4, r5, r6, lr}
|
|
8000ae8: 4604 mov r4, r0
|
|
8000aea: 460d mov r5, r1
|
|
8000aec: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
|
8000aee: 6823 ldr r3, [r4, #0]
|
|
8000af0: 695b ldr r3, [r3, #20]
|
|
8000af2: f013 0f80 tst.w r3, #128 @ 0x80
|
|
8000af6: d121 bne.n 8000b3c <I2C_WaitOnTXEFlagUntilTimeout+0x56>
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8000af8: 4620 mov r0, r4
|
|
8000afa: f7ff ff1b bl 8000934 <I2C_IsAcknowledgeFailed>
|
|
8000afe: b9f8 cbnz r0, 8000b40 <I2C_WaitOnTXEFlagUntilTimeout+0x5a>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000b00: f1b5 3fff cmp.w r5, #4294967295 @ 0xffffffff
|
|
8000b04: d0f3 beq.n 8000aee <I2C_WaitOnTXEFlagUntilTimeout+0x8>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000b06: f7ff fd9b bl 8000640 <HAL_GetTick>
|
|
8000b0a: 1b80 subs r0, r0, r6
|
|
8000b0c: 42a8 cmp r0, r5
|
|
8000b0e: d801 bhi.n 8000b14 <I2C_WaitOnTXEFlagUntilTimeout+0x2e>
|
|
8000b10: 2d00 cmp r5, #0
|
|
8000b12: d1ec bne.n 8000aee <I2C_WaitOnTXEFlagUntilTimeout+0x8>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET))
|
|
8000b14: 6823 ldr r3, [r4, #0]
|
|
8000b16: 695b ldr r3, [r3, #20]
|
|
8000b18: f013 0f80 tst.w r3, #128 @ 0x80
|
|
8000b1c: d1e7 bne.n 8000aee <I2C_WaitOnTXEFlagUntilTimeout+0x8>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000b1e: 2300 movs r3, #0
|
|
8000b20: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000b22: 2220 movs r2, #32
|
|
8000b24: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000b28: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000b2c: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000b2e: f042 0220 orr.w r2, r2, #32
|
|
8000b32: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000b34: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000b38: 2001 movs r0, #1
|
|
8000b3a: e000 b.n 8000b3e <I2C_WaitOnTXEFlagUntilTimeout+0x58>
|
|
return HAL_OK;
|
|
8000b3c: 2000 movs r0, #0
|
|
}
|
|
8000b3e: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8000b40: 2001 movs r0, #1
|
|
8000b42: e7fc b.n 8000b3e <I2C_WaitOnTXEFlagUntilTimeout+0x58>
|
|
|
|
08000b44 <I2C_RequestMemoryWrite>:
|
|
{
|
|
8000b44: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8000b48: b085 sub sp, #20
|
|
8000b4a: 4604 mov r4, r0
|
|
8000b4c: 460d mov r5, r1
|
|
8000b4e: 4691 mov r9, r2
|
|
8000b50: 461f mov r7, r3
|
|
8000b52: f8dd 8030 ldr.w r8, [sp, #48] @ 0x30
|
|
8000b56: 9e0d ldr r6, [sp, #52] @ 0x34
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000b58: 6803 ldr r3, [r0, #0]
|
|
8000b5a: 6819 ldr r1, [r3, #0]
|
|
8000b5c: f441 7180 orr.w r1, r1, #256 @ 0x100
|
|
8000b60: 6019 str r1, [r3, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000b62: 9600 str r6, [sp, #0]
|
|
8000b64: 4643 mov r3, r8
|
|
8000b66: 2200 movs r2, #0
|
|
8000b68: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000b6c: f7ff fefb bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
8000b70: b960 cbnz r0, 8000b8c <I2C_RequestMemoryWrite+0x48>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
|
8000b72: 6823 ldr r3, [r4, #0]
|
|
8000b74: f005 05fe and.w r5, r5, #254 @ 0xfe
|
|
8000b78: 611d str r5, [r3, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000b7a: 4633 mov r3, r6
|
|
8000b7c: 4642 mov r2, r8
|
|
8000b7e: 4926 ldr r1, [pc, #152] @ (8000c18 <I2C_RequestMemoryWrite+0xd4>)
|
|
8000b80: 4620 mov r0, r4
|
|
8000b82: f7ff ff45 bl 8000a10 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000b86: b168 cbz r0, 8000ba4 <I2C_RequestMemoryWrite+0x60>
|
|
return HAL_ERROR;
|
|
8000b88: 2001 movs r0, #1
|
|
8000b8a: e008 b.n 8000b9e <I2C_RequestMemoryWrite+0x5a>
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8000b8c: 6823 ldr r3, [r4, #0]
|
|
8000b8e: 681b ldr r3, [r3, #0]
|
|
8000b90: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000b94: d002 beq.n 8000b9c <I2C_RequestMemoryWrite+0x58>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000b96: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000b9a: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000b9c: 2003 movs r0, #3
|
|
}
|
|
8000b9e: b005 add sp, #20
|
|
8000ba0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8000ba4: 2300 movs r3, #0
|
|
8000ba6: 9303 str r3, [sp, #12]
|
|
8000ba8: 6823 ldr r3, [r4, #0]
|
|
8000baa: 695a ldr r2, [r3, #20]
|
|
8000bac: 9203 str r2, [sp, #12]
|
|
8000bae: 699b ldr r3, [r3, #24]
|
|
8000bb0: 9303 str r3, [sp, #12]
|
|
8000bb2: 9b03 ldr r3, [sp, #12]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000bb4: 4632 mov r2, r6
|
|
8000bb6: 4641 mov r1, r8
|
|
8000bb8: 4620 mov r0, r4
|
|
8000bba: f7ff ff94 bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000bbe: b930 cbnz r0, 8000bce <I2C_RequestMemoryWrite+0x8a>
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
8000bc0: 2f01 cmp r7, #1
|
|
8000bc2: d10f bne.n 8000be4 <I2C_RequestMemoryWrite+0xa0>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000bc4: 6823 ldr r3, [r4, #0]
|
|
8000bc6: fa5f f689 uxtb.w r6, r9
|
|
8000bca: 611e str r6, [r3, #16]
|
|
8000bcc: e7e7 b.n 8000b9e <I2C_RequestMemoryWrite+0x5a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000bce: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000bd0: 2b04 cmp r3, #4
|
|
8000bd2: d001 beq.n 8000bd8 <I2C_RequestMemoryWrite+0x94>
|
|
return HAL_ERROR;
|
|
8000bd4: 2001 movs r0, #1
|
|
8000bd6: e7e2 b.n 8000b9e <I2C_RequestMemoryWrite+0x5a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000bd8: 6822 ldr r2, [r4, #0]
|
|
8000bda: 6813 ldr r3, [r2, #0]
|
|
8000bdc: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000be0: 6013 str r3, [r2, #0]
|
|
8000be2: e7f7 b.n 8000bd4 <I2C_RequestMemoryWrite+0x90>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8000be4: 6823 ldr r3, [r4, #0]
|
|
8000be6: ea4f 2219 mov.w r2, r9, lsr #8
|
|
8000bea: 611a str r2, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000bec: 4632 mov r2, r6
|
|
8000bee: 4641 mov r1, r8
|
|
8000bf0: 4620 mov r0, r4
|
|
8000bf2: f7ff ff78 bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000bf6: b920 cbnz r0, 8000c02 <I2C_RequestMemoryWrite+0xbe>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000bf8: 6823 ldr r3, [r4, #0]
|
|
8000bfa: fa5f f689 uxtb.w r6, r9
|
|
8000bfe: 611e str r6, [r3, #16]
|
|
8000c00: e7cd b.n 8000b9e <I2C_RequestMemoryWrite+0x5a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000c02: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000c04: 2b04 cmp r3, #4
|
|
8000c06: d001 beq.n 8000c0c <I2C_RequestMemoryWrite+0xc8>
|
|
return HAL_ERROR;
|
|
8000c08: 2001 movs r0, #1
|
|
8000c0a: e7c8 b.n 8000b9e <I2C_RequestMemoryWrite+0x5a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000c0c: 6822 ldr r2, [r4, #0]
|
|
8000c0e: 6813 ldr r3, [r2, #0]
|
|
8000c10: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000c14: 6013 str r3, [r2, #0]
|
|
8000c16: e7f7 b.n 8000c08 <I2C_RequestMemoryWrite+0xc4>
|
|
8000c18: 00010002 .word 0x00010002
|
|
|
|
08000c1c <I2C_RequestMemoryRead>:
|
|
{
|
|
8000c1c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8000c20: b084 sub sp, #16
|
|
8000c22: 4604 mov r4, r0
|
|
8000c24: 460d mov r5, r1
|
|
8000c26: 4616 mov r6, r2
|
|
8000c28: 4699 mov r9, r3
|
|
8000c2a: 9f0c ldr r7, [sp, #48] @ 0x30
|
|
8000c2c: f8dd 8034 ldr.w r8, [sp, #52] @ 0x34
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8000c30: 6802 ldr r2, [r0, #0]
|
|
8000c32: 6813 ldr r3, [r2, #0]
|
|
8000c34: f443 6380 orr.w r3, r3, #1024 @ 0x400
|
|
8000c38: 6013 str r3, [r2, #0]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000c3a: 6803 ldr r3, [r0, #0]
|
|
8000c3c: 6819 ldr r1, [r3, #0]
|
|
8000c3e: f441 7180 orr.w r1, r1, #256 @ 0x100
|
|
8000c42: 6019 str r1, [r3, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000c44: f8cd 8000 str.w r8, [sp]
|
|
8000c48: 463b mov r3, r7
|
|
8000c4a: 2200 movs r2, #0
|
|
8000c4c: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000c50: f7ff fe89 bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
8000c54: b970 cbnz r0, 8000c74 <I2C_RequestMemoryRead+0x58>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
|
8000c56: fa5f fa85 uxtb.w sl, r5
|
|
8000c5a: 6823 ldr r3, [r4, #0]
|
|
8000c5c: f005 05fe and.w r5, r5, #254 @ 0xfe
|
|
8000c60: 611d str r5, [r3, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000c62: 4643 mov r3, r8
|
|
8000c64: 463a mov r2, r7
|
|
8000c66: 4941 ldr r1, [pc, #260] @ (8000d6c <I2C_RequestMemoryRead+0x150>)
|
|
8000c68: 4620 mov r0, r4
|
|
8000c6a: f7ff fed1 bl 8000a10 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000c6e: b168 cbz r0, 8000c8c <I2C_RequestMemoryRead+0x70>
|
|
return HAL_ERROR;
|
|
8000c70: 2001 movs r0, #1
|
|
8000c72: e008 b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8000c74: 6823 ldr r3, [r4, #0]
|
|
8000c76: 681b ldr r3, [r3, #0]
|
|
8000c78: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000c7c: d002 beq.n 8000c84 <I2C_RequestMemoryRead+0x68>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000c7e: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000c82: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000c84: 2003 movs r0, #3
|
|
}
|
|
8000c86: b004 add sp, #16
|
|
8000c88: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8000c8c: 2300 movs r3, #0
|
|
8000c8e: 9303 str r3, [sp, #12]
|
|
8000c90: 6823 ldr r3, [r4, #0]
|
|
8000c92: 695a ldr r2, [r3, #20]
|
|
8000c94: 9203 str r2, [sp, #12]
|
|
8000c96: 699b ldr r3, [r3, #24]
|
|
8000c98: 9303 str r3, [sp, #12]
|
|
8000c9a: 9b03 ldr r3, [sp, #12]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000c9c: 4642 mov r2, r8
|
|
8000c9e: 4639 mov r1, r7
|
|
8000ca0: 4620 mov r0, r4
|
|
8000ca2: f7ff ff20 bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000ca6: b980 cbnz r0, 8000cca <I2C_RequestMemoryRead+0xae>
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
8000ca8: f1b9 0f01 cmp.w r9, #1
|
|
8000cac: d118 bne.n 8000ce0 <I2C_RequestMemoryRead+0xc4>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000cae: 6823 ldr r3, [r4, #0]
|
|
8000cb0: b2f6 uxtb r6, r6
|
|
8000cb2: 611e str r6, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000cb4: 4642 mov r2, r8
|
|
8000cb6: 4639 mov r1, r7
|
|
8000cb8: 4620 mov r0, r4
|
|
8000cba: f7ff ff14 bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000cbe: b368 cbz r0, 8000d1c <I2C_RequestMemoryRead+0x100>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000cc0: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000cc2: 2b04 cmp r3, #4
|
|
8000cc4: d024 beq.n 8000d10 <I2C_RequestMemoryRead+0xf4>
|
|
return HAL_ERROR;
|
|
8000cc6: 2001 movs r0, #1
|
|
8000cc8: e7dd b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000cca: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000ccc: 2b04 cmp r3, #4
|
|
8000cce: d001 beq.n 8000cd4 <I2C_RequestMemoryRead+0xb8>
|
|
return HAL_ERROR;
|
|
8000cd0: 2001 movs r0, #1
|
|
8000cd2: e7d8 b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000cd4: 6822 ldr r2, [r4, #0]
|
|
8000cd6: 6813 ldr r3, [r2, #0]
|
|
8000cd8: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000cdc: 6013 str r3, [r2, #0]
|
|
8000cde: e7f7 b.n 8000cd0 <I2C_RequestMemoryRead+0xb4>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8000ce0: 6823 ldr r3, [r4, #0]
|
|
8000ce2: 0a32 lsrs r2, r6, #8
|
|
8000ce4: 611a str r2, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000ce6: 4642 mov r2, r8
|
|
8000ce8: 4639 mov r1, r7
|
|
8000cea: 4620 mov r0, r4
|
|
8000cec: f7ff fefb bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000cf0: b918 cbnz r0, 8000cfa <I2C_RequestMemoryRead+0xde>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000cf2: 6823 ldr r3, [r4, #0]
|
|
8000cf4: b2f6 uxtb r6, r6
|
|
8000cf6: 611e str r6, [r3, #16]
|
|
8000cf8: e7dc b.n 8000cb4 <I2C_RequestMemoryRead+0x98>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000cfa: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000cfc: 2b04 cmp r3, #4
|
|
8000cfe: d001 beq.n 8000d04 <I2C_RequestMemoryRead+0xe8>
|
|
return HAL_ERROR;
|
|
8000d00: 2001 movs r0, #1
|
|
8000d02: e7c0 b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000d04: 6822 ldr r2, [r4, #0]
|
|
8000d06: 6813 ldr r3, [r2, #0]
|
|
8000d08: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000d0c: 6013 str r3, [r2, #0]
|
|
8000d0e: e7f7 b.n 8000d00 <I2C_RequestMemoryRead+0xe4>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000d10: 6822 ldr r2, [r4, #0]
|
|
8000d12: 6813 ldr r3, [r2, #0]
|
|
8000d14: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000d18: 6013 str r3, [r2, #0]
|
|
8000d1a: e7d4 b.n 8000cc6 <I2C_RequestMemoryRead+0xaa>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000d1c: 6822 ldr r2, [r4, #0]
|
|
8000d1e: 6813 ldr r3, [r2, #0]
|
|
8000d20: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
8000d24: 6013 str r3, [r2, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000d26: f8cd 8000 str.w r8, [sp]
|
|
8000d2a: 463b mov r3, r7
|
|
8000d2c: 2200 movs r2, #0
|
|
8000d2e: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000d32: 4620 mov r0, r4
|
|
8000d34: f7ff fe17 bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
8000d38: b968 cbnz r0, 8000d56 <I2C_RequestMemoryRead+0x13a>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
|
8000d3a: 6822 ldr r2, [r4, #0]
|
|
8000d3c: f04a 0301 orr.w r3, sl, #1
|
|
8000d40: 6113 str r3, [r2, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000d42: 4643 mov r3, r8
|
|
8000d44: 463a mov r2, r7
|
|
8000d46: 4909 ldr r1, [pc, #36] @ (8000d6c <I2C_RequestMemoryRead+0x150>)
|
|
8000d48: 4620 mov r0, r4
|
|
8000d4a: f7ff fe61 bl 8000a10 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000d4e: 2800 cmp r0, #0
|
|
8000d50: d099 beq.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
return HAL_ERROR;
|
|
8000d52: 2001 movs r0, #1
|
|
8000d54: e797 b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8000d56: 6823 ldr r3, [r4, #0]
|
|
8000d58: 681b ldr r3, [r3, #0]
|
|
8000d5a: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000d5e: d002 beq.n 8000d66 <I2C_RequestMemoryRead+0x14a>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000d60: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000d64: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000d66: 2003 movs r0, #3
|
|
8000d68: e78d b.n 8000c86 <I2C_RequestMemoryRead+0x6a>
|
|
8000d6a: bf00 nop
|
|
8000d6c: 00010002 .word 0x00010002
|
|
|
|
08000d70 <I2C_WaitOnBTFFlagUntilTimeout>:
|
|
{
|
|
8000d70: b570 push {r4, r5, r6, lr}
|
|
8000d72: 4604 mov r4, r0
|
|
8000d74: 460d mov r5, r1
|
|
8000d76: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
|
8000d78: 6823 ldr r3, [r4, #0]
|
|
8000d7a: 695b ldr r3, [r3, #20]
|
|
8000d7c: f013 0f04 tst.w r3, #4
|
|
8000d80: d121 bne.n 8000dc6 <I2C_WaitOnBTFFlagUntilTimeout+0x56>
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8000d82: 4620 mov r0, r4
|
|
8000d84: f7ff fdd6 bl 8000934 <I2C_IsAcknowledgeFailed>
|
|
8000d88: b9f8 cbnz r0, 8000dca <I2C_WaitOnBTFFlagUntilTimeout+0x5a>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000d8a: f1b5 3fff cmp.w r5, #4294967295 @ 0xffffffff
|
|
8000d8e: d0f3 beq.n 8000d78 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000d90: f7ff fc56 bl 8000640 <HAL_GetTick>
|
|
8000d94: 1b80 subs r0, r0, r6
|
|
8000d96: 42a8 cmp r0, r5
|
|
8000d98: d801 bhi.n 8000d9e <I2C_WaitOnBTFFlagUntilTimeout+0x2e>
|
|
8000d9a: 2d00 cmp r5, #0
|
|
8000d9c: d1ec bne.n 8000d78 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET))
|
|
8000d9e: 6823 ldr r3, [r4, #0]
|
|
8000da0: 695b ldr r3, [r3, #20]
|
|
8000da2: f013 0f04 tst.w r3, #4
|
|
8000da6: d1e7 bne.n 8000d78 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000da8: 2300 movs r3, #0
|
|
8000daa: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000dac: 2220 movs r2, #32
|
|
8000dae: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000db2: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000db6: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000db8: f042 0220 orr.w r2, r2, #32
|
|
8000dbc: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000dbe: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000dc2: 2001 movs r0, #1
|
|
8000dc4: e000 b.n 8000dc8 <I2C_WaitOnBTFFlagUntilTimeout+0x58>
|
|
return HAL_OK;
|
|
8000dc6: 2000 movs r0, #0
|
|
}
|
|
8000dc8: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8000dca: 2001 movs r0, #1
|
|
8000dcc: e7fc b.n 8000dc8 <I2C_WaitOnBTFFlagUntilTimeout+0x58>
|
|
|
|
08000dce <I2C_WaitOnRXNEFlagUntilTimeout>:
|
|
{
|
|
8000dce: b570 push {r4, r5, r6, lr}
|
|
8000dd0: 4604 mov r4, r0
|
|
8000dd2: 460d mov r5, r1
|
|
8000dd4: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
8000dd6: e014 b.n 8000e02 <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
8000dd8: f06f 0210 mvn.w r2, #16
|
|
8000ddc: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000dde: 2300 movs r3, #0
|
|
8000de0: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000de2: 2220 movs r2, #32
|
|
8000de4: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000de8: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
|
8000dec: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000dee: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000df0: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000df4: 2001 movs r0, #1
|
|
8000df6: e025 b.n 8000e44 <I2C_WaitOnRXNEFlagUntilTimeout+0x76>
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET))
|
|
8000df8: 6823 ldr r3, [r4, #0]
|
|
8000dfa: 695b ldr r3, [r3, #20]
|
|
8000dfc: f013 0f40 tst.w r3, #64 @ 0x40
|
|
8000e00: d010 beq.n 8000e24 <I2C_WaitOnRXNEFlagUntilTimeout+0x56>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
8000e02: 6823 ldr r3, [r4, #0]
|
|
8000e04: 6958 ldr r0, [r3, #20]
|
|
8000e06: f010 0f40 tst.w r0, #64 @ 0x40
|
|
8000e0a: d11a bne.n 8000e42 <I2C_WaitOnRXNEFlagUntilTimeout+0x74>
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
|
8000e0c: 6958 ldr r0, [r3, #20]
|
|
8000e0e: f010 0f10 tst.w r0, #16
|
|
8000e12: d1e1 bne.n 8000dd8 <I2C_WaitOnRXNEFlagUntilTimeout+0xa>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000e14: f7ff fc14 bl 8000640 <HAL_GetTick>
|
|
8000e18: 1b80 subs r0, r0, r6
|
|
8000e1a: 42a8 cmp r0, r5
|
|
8000e1c: d8ec bhi.n 8000df8 <I2C_WaitOnRXNEFlagUntilTimeout+0x2a>
|
|
8000e1e: 2d00 cmp r5, #0
|
|
8000e20: d1ef bne.n 8000e02 <I2C_WaitOnRXNEFlagUntilTimeout+0x34>
|
|
8000e22: e7e9 b.n 8000df8 <I2C_WaitOnRXNEFlagUntilTimeout+0x2a>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000e24: 2300 movs r3, #0
|
|
8000e26: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000e28: 2220 movs r2, #32
|
|
8000e2a: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000e2e: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000e32: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000e34: f042 0220 orr.w r2, r2, #32
|
|
8000e38: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000e3a: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000e3e: 2001 movs r0, #1
|
|
8000e40: e000 b.n 8000e44 <I2C_WaitOnRXNEFlagUntilTimeout+0x76>
|
|
return HAL_OK;
|
|
8000e42: 2000 movs r0, #0
|
|
}
|
|
8000e44: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
08000e48 <HAL_I2C_Init>:
|
|
if (hi2c == NULL)
|
|
8000e48: 2800 cmp r0, #0
|
|
8000e4a: f000 80cc beq.w 8000fe6 <HAL_I2C_Init+0x19e>
|
|
{
|
|
8000e4e: b570 push {r4, r5, r6, lr}
|
|
8000e50: 4604 mov r4, r0
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
8000e52: f890 303d ldrb.w r3, [r0, #61] @ 0x3d
|
|
8000e56: 2b00 cmp r3, #0
|
|
8000e58: d077 beq.n 8000f4a <HAL_I2C_Init+0x102>
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
8000e5a: 2324 movs r3, #36 @ 0x24
|
|
8000e5c: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8000e60: 6822 ldr r2, [r4, #0]
|
|
8000e62: 6813 ldr r3, [r2, #0]
|
|
8000e64: f023 0301 bic.w r3, r3, #1
|
|
8000e68: 6013 str r3, [r2, #0]
|
|
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
|
8000e6a: 6822 ldr r2, [r4, #0]
|
|
8000e6c: 6813 ldr r3, [r2, #0]
|
|
8000e6e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8000e72: 6013 str r3, [r2, #0]
|
|
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
|
8000e74: 6822 ldr r2, [r4, #0]
|
|
8000e76: 6813 ldr r3, [r2, #0]
|
|
8000e78: f423 4300 bic.w r3, r3, #32768 @ 0x8000
|
|
8000e7c: 6013 str r3, [r2, #0]
|
|
pclk1 = HAL_RCC_GetPCLK1Freq();
|
|
8000e7e: f000 fdf5 bl 8001a6c <HAL_RCC_GetPCLK1Freq>
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
8000e82: 6862 ldr r2, [r4, #4]
|
|
8000e84: 4b5a ldr r3, [pc, #360] @ (8000ff0 <HAL_I2C_Init+0x1a8>)
|
|
8000e86: 429a cmp r2, r3
|
|
8000e88: d864 bhi.n 8000f54 <HAL_I2C_Init+0x10c>
|
|
8000e8a: 4b5a ldr r3, [pc, #360] @ (8000ff4 <HAL_I2C_Init+0x1ac>)
|
|
8000e8c: 4298 cmp r0, r3
|
|
8000e8e: bf8c ite hi
|
|
8000e90: 2300 movhi r3, #0
|
|
8000e92: 2301 movls r3, #1
|
|
8000e94: 2b00 cmp r3, #0
|
|
8000e96: f040 80a8 bne.w 8000fea <HAL_I2C_Init+0x1a2>
|
|
freqrange = I2C_FREQRANGE(pclk1);
|
|
8000e9a: 4957 ldr r1, [pc, #348] @ (8000ff8 <HAL_I2C_Init+0x1b0>)
|
|
8000e9c: fba1 3100 umull r3, r1, r1, r0
|
|
8000ea0: 0c8b lsrs r3, r1, #18
|
|
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
|
8000ea2: 6825 ldr r5, [r4, #0]
|
|
8000ea4: 686a ldr r2, [r5, #4]
|
|
8000ea6: f022 023f bic.w r2, r2, #63 @ 0x3f
|
|
8000eaa: ea42 4291 orr.w r2, r2, r1, lsr #18
|
|
8000eae: 606a str r2, [r5, #4]
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
8000eb0: 6821 ldr r1, [r4, #0]
|
|
8000eb2: 6a0a ldr r2, [r1, #32]
|
|
8000eb4: f022 023f bic.w r2, r2, #63 @ 0x3f
|
|
8000eb8: 6866 ldr r6, [r4, #4]
|
|
8000eba: 4d4d ldr r5, [pc, #308] @ (8000ff0 <HAL_I2C_Init+0x1a8>)
|
|
8000ebc: 42ae cmp r6, r5
|
|
8000ebe: d84f bhi.n 8000f60 <HAL_I2C_Init+0x118>
|
|
8000ec0: 3301 adds r3, #1
|
|
8000ec2: 4313 orrs r3, r2
|
|
8000ec4: 620b str r3, [r1, #32]
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
8000ec6: 6821 ldr r1, [r4, #0]
|
|
8000ec8: 69ca ldr r2, [r1, #28]
|
|
8000eca: f422 424f bic.w r2, r2, #52992 @ 0xcf00
|
|
8000ece: f022 02ff bic.w r2, r2, #255 @ 0xff
|
|
8000ed2: 6865 ldr r5, [r4, #4]
|
|
8000ed4: 4b46 ldr r3, [pc, #280] @ (8000ff0 <HAL_I2C_Init+0x1a8>)
|
|
8000ed6: 429d cmp r5, r3
|
|
8000ed8: d84c bhi.n 8000f74 <HAL_I2C_Init+0x12c>
|
|
8000eda: 1e43 subs r3, r0, #1
|
|
8000edc: 006d lsls r5, r5, #1
|
|
8000ede: fbb3 f3f5 udiv r3, r3, r5
|
|
8000ee2: 3301 adds r3, #1
|
|
8000ee4: f640 70fc movw r0, #4092 @ 0xffc
|
|
8000ee8: 4203 tst r3, r0
|
|
8000eea: d078 beq.n 8000fde <HAL_I2C_Init+0x196>
|
|
8000eec: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000ef0: 431a orrs r2, r3
|
|
8000ef2: 61ca str r2, [r1, #28]
|
|
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
|
8000ef4: 6821 ldr r1, [r4, #0]
|
|
8000ef6: 680b ldr r3, [r1, #0]
|
|
8000ef8: f023 03c0 bic.w r3, r3, #192 @ 0xc0
|
|
8000efc: 69e2 ldr r2, [r4, #28]
|
|
8000efe: 6a20 ldr r0, [r4, #32]
|
|
8000f00: 4302 orrs r2, r0
|
|
8000f02: 4313 orrs r3, r2
|
|
8000f04: 600b str r3, [r1, #0]
|
|
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
|
8000f06: 6821 ldr r1, [r4, #0]
|
|
8000f08: 688b ldr r3, [r1, #8]
|
|
8000f0a: f423 4303 bic.w r3, r3, #33536 @ 0x8300
|
|
8000f0e: f023 03ff bic.w r3, r3, #255 @ 0xff
|
|
8000f12: 6922 ldr r2, [r4, #16]
|
|
8000f14: 68e0 ldr r0, [r4, #12]
|
|
8000f16: 4302 orrs r2, r0
|
|
8000f18: 4313 orrs r3, r2
|
|
8000f1a: 608b str r3, [r1, #8]
|
|
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
|
8000f1c: 6821 ldr r1, [r4, #0]
|
|
8000f1e: 68cb ldr r3, [r1, #12]
|
|
8000f20: f023 03ff bic.w r3, r3, #255 @ 0xff
|
|
8000f24: 6962 ldr r2, [r4, #20]
|
|
8000f26: 69a0 ldr r0, [r4, #24]
|
|
8000f28: 4302 orrs r2, r0
|
|
8000f2a: 4313 orrs r3, r2
|
|
8000f2c: 60cb str r3, [r1, #12]
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8000f2e: 6822 ldr r2, [r4, #0]
|
|
8000f30: 6813 ldr r3, [r2, #0]
|
|
8000f32: f043 0301 orr.w r3, r3, #1
|
|
8000f36: 6013 str r3, [r2, #0]
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8000f38: 2000 movs r0, #0
|
|
8000f3a: 6420 str r0, [r4, #64] @ 0x40
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000f3c: 2320 movs r3, #32
|
|
8000f3e: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000f42: 6320 str r0, [r4, #48] @ 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000f44: f884 003e strb.w r0, [r4, #62] @ 0x3e
|
|
}
|
|
8000f48: bd70 pop {r4, r5, r6, pc}
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
8000f4a: f880 303c strb.w r3, [r0, #60] @ 0x3c
|
|
HAL_I2C_MspInit(hi2c);
|
|
8000f4e: f002 fdad bl 8003aac <HAL_I2C_MspInit>
|
|
8000f52: e782 b.n 8000e5a <HAL_I2C_Init+0x12>
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
8000f54: 4b29 ldr r3, [pc, #164] @ (8000ffc <HAL_I2C_Init+0x1b4>)
|
|
8000f56: 4298 cmp r0, r3
|
|
8000f58: bf8c ite hi
|
|
8000f5a: 2300 movhi r3, #0
|
|
8000f5c: 2301 movls r3, #1
|
|
8000f5e: e799 b.n 8000e94 <HAL_I2C_Init+0x4c>
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
8000f60: f44f 7596 mov.w r5, #300 @ 0x12c
|
|
8000f64: fb05 f303 mul.w r3, r5, r3
|
|
8000f68: 4d25 ldr r5, [pc, #148] @ (8001000 <HAL_I2C_Init+0x1b8>)
|
|
8000f6a: fba5 5303 umull r5, r3, r5, r3
|
|
8000f6e: 099b lsrs r3, r3, #6
|
|
8000f70: 3301 adds r3, #1
|
|
8000f72: e7a6 b.n 8000ec2 <HAL_I2C_Init+0x7a>
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
8000f74: 68a6 ldr r6, [r4, #8]
|
|
8000f76: b9be cbnz r6, 8000fa8 <HAL_I2C_Init+0x160>
|
|
8000f78: 1e43 subs r3, r0, #1
|
|
8000f7a: eb05 0c45 add.w ip, r5, r5, lsl #1
|
|
8000f7e: fbb3 f3fc udiv r3, r3, ip
|
|
8000f82: 3301 adds r3, #1
|
|
8000f84: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000f88: fab3 f383 clz r3, r3
|
|
8000f8c: 095b lsrs r3, r3, #5
|
|
8000f8e: bb43 cbnz r3, 8000fe2 <HAL_I2C_Init+0x19a>
|
|
8000f90: b9c6 cbnz r6, 8000fc4 <HAL_I2C_Init+0x17c>
|
|
8000f92: 1e43 subs r3, r0, #1
|
|
8000f94: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
8000f98: fbb3 f3f5 udiv r3, r3, r5
|
|
8000f9c: 3301 adds r3, #1
|
|
8000f9e: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000fa2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8000fa6: e7a3 b.n 8000ef0 <HAL_I2C_Init+0xa8>
|
|
8000fa8: 1e43 subs r3, r0, #1
|
|
8000faa: eb05 0c85 add.w ip, r5, r5, lsl #2
|
|
8000fae: eb0c 0c8c add.w ip, ip, ip, lsl #2
|
|
8000fb2: fbb3 f3fc udiv r3, r3, ip
|
|
8000fb6: 3301 adds r3, #1
|
|
8000fb8: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000fbc: fab3 f383 clz r3, r3
|
|
8000fc0: 095b lsrs r3, r3, #5
|
|
8000fc2: e7e4 b.n 8000f8e <HAL_I2C_Init+0x146>
|
|
8000fc4: 1e43 subs r3, r0, #1
|
|
8000fc6: eb05 0585 add.w r5, r5, r5, lsl #2
|
|
8000fca: eb05 0585 add.w r5, r5, r5, lsl #2
|
|
8000fce: fbb3 f3f5 udiv r3, r3, r5
|
|
8000fd2: 3301 adds r3, #1
|
|
8000fd4: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000fd8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8000fdc: e788 b.n 8000ef0 <HAL_I2C_Init+0xa8>
|
|
8000fde: 2304 movs r3, #4
|
|
8000fe0: e786 b.n 8000ef0 <HAL_I2C_Init+0xa8>
|
|
8000fe2: 2301 movs r3, #1
|
|
8000fe4: e784 b.n 8000ef0 <HAL_I2C_Init+0xa8>
|
|
return HAL_ERROR;
|
|
8000fe6: 2001 movs r0, #1
|
|
}
|
|
8000fe8: 4770 bx lr
|
|
return HAL_ERROR;
|
|
8000fea: 2001 movs r0, #1
|
|
8000fec: e7ac b.n 8000f48 <HAL_I2C_Init+0x100>
|
|
8000fee: bf00 nop
|
|
8000ff0: 000186a0 .word 0x000186a0
|
|
8000ff4: 001e847f .word 0x001e847f
|
|
8000ff8: 431bde83 .word 0x431bde83
|
|
8000ffc: 003d08ff .word 0x003d08ff
|
|
8001000: 10624dd3 .word 0x10624dd3
|
|
|
|
08001004 <HAL_I2C_Mem_Write>:
|
|
{
|
|
8001004: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8001008: b083 sub sp, #12
|
|
800100a: 4604 mov r4, r0
|
|
800100c: 460f mov r7, r1
|
|
800100e: 4690 mov r8, r2
|
|
8001010: 4699 mov r9, r3
|
|
8001012: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8001014: f7ff fb14 bl 8000640 <HAL_GetTick>
|
|
8001018: 4605 mov r5, r0
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
800101a: f894 003d ldrb.w r0, [r4, #61] @ 0x3d
|
|
800101e: b2c0 uxtb r0, r0
|
|
8001020: 2820 cmp r0, #32
|
|
8001022: d003 beq.n 800102c <HAL_I2C_Mem_Write+0x28>
|
|
return HAL_BUSY;
|
|
8001024: 2002 movs r0, #2
|
|
}
|
|
8001026: b003 add sp, #12
|
|
8001028: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
800102c: 9500 str r5, [sp, #0]
|
|
800102e: 2319 movs r3, #25
|
|
8001030: 2201 movs r2, #1
|
|
8001032: 494b ldr r1, [pc, #300] @ (8001160 <HAL_I2C_Mem_Write+0x15c>)
|
|
8001034: 4620 mov r0, r4
|
|
8001036: f7ff fc96 bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
800103a: 2800 cmp r0, #0
|
|
800103c: f040 8089 bne.w 8001152 <HAL_I2C_Mem_Write+0x14e>
|
|
__HAL_LOCK(hi2c);
|
|
8001040: f894 303c ldrb.w r3, [r4, #60] @ 0x3c
|
|
8001044: 2b01 cmp r3, #1
|
|
8001046: f000 8086 beq.w 8001156 <HAL_I2C_Mem_Write+0x152>
|
|
800104a: 2301 movs r3, #1
|
|
800104c: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
8001050: 6823 ldr r3, [r4, #0]
|
|
8001052: 681a ldr r2, [r3, #0]
|
|
8001054: f012 0f01 tst.w r2, #1
|
|
8001058: d103 bne.n 8001062 <HAL_I2C_Mem_Write+0x5e>
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
800105a: 681a ldr r2, [r3, #0]
|
|
800105c: f042 0201 orr.w r2, r2, #1
|
|
8001060: 601a str r2, [r3, #0]
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8001062: 6822 ldr r2, [r4, #0]
|
|
8001064: 6813 ldr r3, [r2, #0]
|
|
8001066: f423 6300 bic.w r3, r3, #2048 @ 0x800
|
|
800106a: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
|
800106c: 2321 movs r3, #33 @ 0x21
|
|
800106e: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
8001072: 2340 movs r3, #64 @ 0x40
|
|
8001074: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8001078: 2300 movs r3, #0
|
|
800107a: 6423 str r3, [r4, #64] @ 0x40
|
|
hi2c->pBuffPtr = pData;
|
|
800107c: 9b0a ldr r3, [sp, #40] @ 0x28
|
|
800107e: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
8001080: f8bd 302c ldrh.w r3, [sp, #44] @ 0x2c
|
|
8001084: 8563 strh r3, [r4, #42] @ 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8001086: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001088: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
800108a: 4b36 ldr r3, [pc, #216] @ (8001164 <HAL_I2C_Mem_Write+0x160>)
|
|
800108c: 62e3 str r3, [r4, #44] @ 0x2c
|
|
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
800108e: 9501 str r5, [sp, #4]
|
|
8001090: 9600 str r6, [sp, #0]
|
|
8001092: 464b mov r3, r9
|
|
8001094: 4642 mov r2, r8
|
|
8001096: 4639 mov r1, r7
|
|
8001098: 4620 mov r0, r4
|
|
800109a: f7ff fd53 bl 8000b44 <I2C_RequestMemoryWrite>
|
|
800109e: 2800 cmp r0, #0
|
|
80010a0: d15b bne.n 800115a <HAL_I2C_Mem_Write+0x156>
|
|
while (hi2c->XferSize > 0U)
|
|
80010a2: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80010a4: 2b00 cmp r3, #0
|
|
80010a6: d035 beq.n 8001114 <HAL_I2C_Mem_Write+0x110>
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80010a8: 462a mov r2, r5
|
|
80010aa: 4631 mov r1, r6
|
|
80010ac: 4620 mov r0, r4
|
|
80010ae: f7ff fd1a bl 8000ae6 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
80010b2: bb20 cbnz r0, 80010fe <HAL_I2C_Mem_Write+0xfa>
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
80010b4: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
80010b6: 6823 ldr r3, [r4, #0]
|
|
80010b8: 7812 ldrb r2, [r2, #0]
|
|
80010ba: 611a str r2, [r3, #16]
|
|
hi2c->pBuffPtr++;
|
|
80010bc: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
80010be: 1c53 adds r3, r2, #1
|
|
80010c0: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80010c2: 8d21 ldrh r1, [r4, #40] @ 0x28
|
|
80010c4: 3901 subs r1, #1
|
|
80010c6: b289 uxth r1, r1
|
|
80010c8: 8521 strh r1, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80010ca: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80010cc: b29b uxth r3, r3
|
|
80010ce: 3b01 subs r3, #1
|
|
80010d0: b29b uxth r3, r3
|
|
80010d2: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
|
80010d4: 6823 ldr r3, [r4, #0]
|
|
80010d6: 6958 ldr r0, [r3, #20]
|
|
80010d8: f010 0f04 tst.w r0, #4
|
|
80010dc: d0e1 beq.n 80010a2 <HAL_I2C_Mem_Write+0x9e>
|
|
80010de: 2900 cmp r1, #0
|
|
80010e0: d0df beq.n 80010a2 <HAL_I2C_Mem_Write+0x9e>
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
80010e2: 7852 ldrb r2, [r2, #1]
|
|
80010e4: 611a str r2, [r3, #16]
|
|
hi2c->pBuffPtr++;
|
|
80010e6: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80010e8: 3301 adds r3, #1
|
|
80010ea: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80010ec: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80010ee: 3b01 subs r3, #1
|
|
80010f0: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80010f2: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80010f4: b29b uxth r3, r3
|
|
80010f6: 3b01 subs r3, #1
|
|
80010f8: b29b uxth r3, r3
|
|
80010fa: 8563 strh r3, [r4, #42] @ 0x2a
|
|
80010fc: e7d1 b.n 80010a2 <HAL_I2C_Mem_Write+0x9e>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
80010fe: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8001100: 2b04 cmp r3, #4
|
|
8001102: d001 beq.n 8001108 <HAL_I2C_Mem_Write+0x104>
|
|
return HAL_ERROR;
|
|
8001104: 2001 movs r0, #1
|
|
8001106: e78e b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001108: 6822 ldr r2, [r4, #0]
|
|
800110a: 6813 ldr r3, [r2, #0]
|
|
800110c: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8001110: 6013 str r3, [r2, #0]
|
|
8001112: e7f7 b.n 8001104 <HAL_I2C_Mem_Write+0x100>
|
|
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8001114: 462a mov r2, r5
|
|
8001116: 4631 mov r1, r6
|
|
8001118: 4620 mov r0, r4
|
|
800111a: f7ff fe29 bl 8000d70 <I2C_WaitOnBTFFlagUntilTimeout>
|
|
800111e: b150 cbz r0, 8001136 <HAL_I2C_Mem_Write+0x132>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8001120: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8001122: 2b04 cmp r3, #4
|
|
8001124: d001 beq.n 800112a <HAL_I2C_Mem_Write+0x126>
|
|
return HAL_ERROR;
|
|
8001126: 2001 movs r0, #1
|
|
8001128: e77d b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800112a: 6822 ldr r2, [r4, #0]
|
|
800112c: 6813 ldr r3, [r2, #0]
|
|
800112e: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8001132: 6013 str r3, [r2, #0]
|
|
8001134: e7f7 b.n 8001126 <HAL_I2C_Mem_Write+0x122>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001136: 6822 ldr r2, [r4, #0]
|
|
8001138: 6813 ldr r3, [r2, #0]
|
|
800113a: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
800113e: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8001140: 2320 movs r3, #32
|
|
8001142: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001146: 2300 movs r3, #0
|
|
8001148: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
__HAL_UNLOCK(hi2c);
|
|
800114c: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_OK;
|
|
8001150: e769 b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
return HAL_BUSY;
|
|
8001152: 2002 movs r0, #2
|
|
8001154: e767 b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
__HAL_LOCK(hi2c);
|
|
8001156: 2002 movs r0, #2
|
|
8001158: e765 b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
return HAL_ERROR;
|
|
800115a: 2001 movs r0, #1
|
|
800115c: e763 b.n 8001026 <HAL_I2C_Mem_Write+0x22>
|
|
800115e: bf00 nop
|
|
8001160: 00100002 .word 0x00100002
|
|
8001164: ffff0000 .word 0xffff0000
|
|
|
|
08001168 <HAL_I2C_Mem_Read>:
|
|
{
|
|
8001168: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
800116c: b087 sub sp, #28
|
|
800116e: 4604 mov r4, r0
|
|
8001170: 460f mov r7, r1
|
|
8001172: 4690 mov r8, r2
|
|
8001174: 4699 mov r9, r3
|
|
8001176: 9e10 ldr r6, [sp, #64] @ 0x40
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8001178: f7ff fa62 bl 8000640 <HAL_GetTick>
|
|
800117c: 4605 mov r5, r0
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
800117e: f894 003d ldrb.w r0, [r4, #61] @ 0x3d
|
|
8001182: b2c0 uxtb r0, r0
|
|
8001184: 2820 cmp r0, #32
|
|
8001186: d004 beq.n 8001192 <HAL_I2C_Mem_Read+0x2a>
|
|
return HAL_BUSY;
|
|
8001188: 2702 movs r7, #2
|
|
}
|
|
800118a: 4638 mov r0, r7
|
|
800118c: b007 add sp, #28
|
|
800118e: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
8001192: 9500 str r5, [sp, #0]
|
|
8001194: 2319 movs r3, #25
|
|
8001196: 2201 movs r2, #1
|
|
8001198: 4988 ldr r1, [pc, #544] @ (80013bc <HAL_I2C_Mem_Read+0x254>)
|
|
800119a: 4620 mov r0, r4
|
|
800119c: f7ff fbe3 bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
80011a0: 2800 cmp r0, #0
|
|
80011a2: f040 814d bne.w 8001440 <HAL_I2C_Mem_Read+0x2d8>
|
|
__HAL_LOCK(hi2c);
|
|
80011a6: f894 303c ldrb.w r3, [r4, #60] @ 0x3c
|
|
80011aa: 2b01 cmp r3, #1
|
|
80011ac: f000 814a beq.w 8001444 <HAL_I2C_Mem_Read+0x2dc>
|
|
80011b0: 2301 movs r3, #1
|
|
80011b2: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
80011b6: 6823 ldr r3, [r4, #0]
|
|
80011b8: 681a ldr r2, [r3, #0]
|
|
80011ba: f012 0f01 tst.w r2, #1
|
|
80011be: d103 bne.n 80011c8 <HAL_I2C_Mem_Read+0x60>
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
80011c0: 681a ldr r2, [r3, #0]
|
|
80011c2: f042 0201 orr.w r2, r2, #1
|
|
80011c6: 601a str r2, [r3, #0]
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
80011c8: 6822 ldr r2, [r4, #0]
|
|
80011ca: 6813 ldr r3, [r2, #0]
|
|
80011cc: f423 6300 bic.w r3, r3, #2048 @ 0x800
|
|
80011d0: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
|
80011d2: 2322 movs r3, #34 @ 0x22
|
|
80011d4: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
80011d8: 2340 movs r3, #64 @ 0x40
|
|
80011da: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
80011de: 2300 movs r3, #0
|
|
80011e0: 6423 str r3, [r4, #64] @ 0x40
|
|
hi2c->pBuffPtr = pData;
|
|
80011e2: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
80011e4: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
80011e6: f8bd 303c ldrh.w r3, [sp, #60] @ 0x3c
|
|
80011ea: 8563 strh r3, [r4, #42] @ 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
80011ec: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80011ee: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
80011f0: 4b73 ldr r3, [pc, #460] @ (80013c0 <HAL_I2C_Mem_Read+0x258>)
|
|
80011f2: 62e3 str r3, [r4, #44] @ 0x2c
|
|
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
80011f4: 9501 str r5, [sp, #4]
|
|
80011f6: 9600 str r6, [sp, #0]
|
|
80011f8: 464b mov r3, r9
|
|
80011fa: 4642 mov r2, r8
|
|
80011fc: 4639 mov r1, r7
|
|
80011fe: 4620 mov r0, r4
|
|
8001200: f7ff fd0c bl 8000c1c <I2C_RequestMemoryRead>
|
|
8001204: 4607 mov r7, r0
|
|
8001206: 2800 cmp r0, #0
|
|
8001208: f040 811e bne.w 8001448 <HAL_I2C_Mem_Read+0x2e0>
|
|
if (hi2c->XferSize == 0U)
|
|
800120c: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
800120e: b95b cbnz r3, 8001228 <HAL_I2C_Mem_Read+0xc0>
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8001210: 9302 str r3, [sp, #8]
|
|
8001212: 6823 ldr r3, [r4, #0]
|
|
8001214: 695a ldr r2, [r3, #20]
|
|
8001216: 9202 str r2, [sp, #8]
|
|
8001218: 699a ldr r2, [r3, #24]
|
|
800121a: 9202 str r2, [sp, #8]
|
|
800121c: 9a02 ldr r2, [sp, #8]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800121e: 681a ldr r2, [r3, #0]
|
|
8001220: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
8001224: 601a str r2, [r3, #0]
|
|
8001226: e075 b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
else if (hi2c->XferSize == 1U)
|
|
8001228: 2b01 cmp r3, #1
|
|
800122a: d00a beq.n 8001242 <HAL_I2C_Mem_Read+0xda>
|
|
else if (hi2c->XferSize == 2U)
|
|
800122c: 2b02 cmp r3, #2
|
|
800122e: d01a beq.n 8001266 <HAL_I2C_Mem_Read+0xfe>
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8001230: 2300 movs r3, #0
|
|
8001232: 9305 str r3, [sp, #20]
|
|
8001234: 6823 ldr r3, [r4, #0]
|
|
8001236: 695a ldr r2, [r3, #20]
|
|
8001238: 9205 str r2, [sp, #20]
|
|
800123a: 699b ldr r3, [r3, #24]
|
|
800123c: 9305 str r3, [sp, #20]
|
|
800123e: 9b05 ldr r3, [sp, #20]
|
|
8001240: e068 b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8001242: 6822 ldr r2, [r4, #0]
|
|
8001244: 6813 ldr r3, [r2, #0]
|
|
8001246: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
800124a: 6013 str r3, [r2, #0]
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
800124c: 2300 movs r3, #0
|
|
800124e: 9303 str r3, [sp, #12]
|
|
8001250: 6823 ldr r3, [r4, #0]
|
|
8001252: 695a ldr r2, [r3, #20]
|
|
8001254: 9203 str r2, [sp, #12]
|
|
8001256: 699a ldr r2, [r3, #24]
|
|
8001258: 9203 str r2, [sp, #12]
|
|
800125a: 9a03 ldr r2, [sp, #12]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800125c: 681a ldr r2, [r3, #0]
|
|
800125e: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
8001262: 601a str r2, [r3, #0]
|
|
8001264: e056 b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8001266: 6822 ldr r2, [r4, #0]
|
|
8001268: 6813 ldr r3, [r2, #0]
|
|
800126a: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
800126e: 6013 str r3, [r2, #0]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8001270: 6822 ldr r2, [r4, #0]
|
|
8001272: 6813 ldr r3, [r2, #0]
|
|
8001274: f443 6300 orr.w r3, r3, #2048 @ 0x800
|
|
8001278: 6013 str r3, [r2, #0]
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
800127a: 2300 movs r3, #0
|
|
800127c: 9304 str r3, [sp, #16]
|
|
800127e: 6823 ldr r3, [r4, #0]
|
|
8001280: 695a ldr r2, [r3, #20]
|
|
8001282: 9204 str r2, [sp, #16]
|
|
8001284: 699b ldr r3, [r3, #24]
|
|
8001286: 9304 str r3, [sp, #16]
|
|
8001288: 9b04 ldr r3, [sp, #16]
|
|
800128a: e043 b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
800128c: 462a mov r2, r5
|
|
800128e: 4631 mov r1, r6
|
|
8001290: 4620 mov r0, r4
|
|
8001292: f7ff fd9c bl 8000dce <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
8001296: 2800 cmp r0, #0
|
|
8001298: f040 80d8 bne.w 800144c <HAL_I2C_Mem_Read+0x2e4>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
800129c: 6823 ldr r3, [r4, #0]
|
|
800129e: 691a ldr r2, [r3, #16]
|
|
80012a0: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012a2: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
80012a4: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012a6: 3301 adds r3, #1
|
|
80012a8: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80012aa: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80012ac: 3b01 subs r3, #1
|
|
80012ae: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80012b0: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80012b2: b29b uxth r3, r3
|
|
80012b4: 3b01 subs r3, #1
|
|
80012b6: b29b uxth r3, r3
|
|
80012b8: 8563 strh r3, [r4, #42] @ 0x2a
|
|
80012ba: e02b b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
80012bc: 9500 str r5, [sp, #0]
|
|
80012be: 4633 mov r3, r6
|
|
80012c0: 2200 movs r2, #0
|
|
80012c2: 4940 ldr r1, [pc, #256] @ (80013c4 <HAL_I2C_Mem_Read+0x25c>)
|
|
80012c4: 4620 mov r0, r4
|
|
80012c6: f7ff fb4e bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
80012ca: 2800 cmp r0, #0
|
|
80012cc: f040 80c0 bne.w 8001450 <HAL_I2C_Mem_Read+0x2e8>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80012d0: 6822 ldr r2, [r4, #0]
|
|
80012d2: 6813 ldr r3, [r2, #0]
|
|
80012d4: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
80012d8: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80012da: 6823 ldr r3, [r4, #0]
|
|
80012dc: 691a ldr r2, [r3, #16]
|
|
80012de: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012e0: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
80012e2: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
80012e4: 1c53 adds r3, r2, #1
|
|
80012e6: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80012e8: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80012ea: 3b01 subs r3, #1
|
|
80012ec: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80012ee: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80012f0: b29b uxth r3, r3
|
|
80012f2: 3b01 subs r3, #1
|
|
80012f4: b29b uxth r3, r3
|
|
80012f6: 8563 strh r3, [r4, #42] @ 0x2a
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80012f8: 6823 ldr r3, [r4, #0]
|
|
80012fa: 691b ldr r3, [r3, #16]
|
|
80012fc: 7053 strb r3, [r2, #1]
|
|
hi2c->pBuffPtr++;
|
|
80012fe: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001300: 3301 adds r3, #1
|
|
8001302: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001304: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001306: 3b01 subs r3, #1
|
|
8001308: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
800130a: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
800130c: b29b uxth r3, r3
|
|
800130e: 3b01 subs r3, #1
|
|
8001310: b29b uxth r3, r3
|
|
8001312: 8563 strh r3, [r4, #42] @ 0x2a
|
|
while (hi2c->XferSize > 0U)
|
|
8001314: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001316: 2b00 cmp r3, #0
|
|
8001318: f000 8089 beq.w 800142e <HAL_I2C_Mem_Read+0x2c6>
|
|
if (hi2c->XferSize <= 3U)
|
|
800131c: 2b03 cmp r3, #3
|
|
800131e: d853 bhi.n 80013c8 <HAL_I2C_Mem_Read+0x260>
|
|
if (hi2c->XferSize == 1U)
|
|
8001320: 2b01 cmp r3, #1
|
|
8001322: d0b3 beq.n 800128c <HAL_I2C_Mem_Read+0x124>
|
|
else if (hi2c->XferSize == 2U)
|
|
8001324: 2b02 cmp r3, #2
|
|
8001326: d0c9 beq.n 80012bc <HAL_I2C_Mem_Read+0x154>
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
8001328: 9500 str r5, [sp, #0]
|
|
800132a: 4633 mov r3, r6
|
|
800132c: 2200 movs r2, #0
|
|
800132e: 4925 ldr r1, [pc, #148] @ (80013c4 <HAL_I2C_Mem_Read+0x25c>)
|
|
8001330: 4620 mov r0, r4
|
|
8001332: f7ff fb18 bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
8001336: 2800 cmp r0, #0
|
|
8001338: f040 808c bne.w 8001454 <HAL_I2C_Mem_Read+0x2ec>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
800133c: 6822 ldr r2, [r4, #0]
|
|
800133e: 6813 ldr r3, [r2, #0]
|
|
8001340: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
8001344: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001346: 6823 ldr r3, [r4, #0]
|
|
8001348: 691a ldr r2, [r3, #16]
|
|
800134a: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800134c: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
800134e: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001350: 3301 adds r3, #1
|
|
8001352: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001354: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001356: 3b01 subs r3, #1
|
|
8001358: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
800135a: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
800135c: b29b uxth r3, r3
|
|
800135e: 3b01 subs r3, #1
|
|
8001360: b29b uxth r3, r3
|
|
8001362: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
8001364: 9500 str r5, [sp, #0]
|
|
8001366: 4633 mov r3, r6
|
|
8001368: 2200 movs r2, #0
|
|
800136a: 4916 ldr r1, [pc, #88] @ (80013c4 <HAL_I2C_Mem_Read+0x25c>)
|
|
800136c: 4620 mov r0, r4
|
|
800136e: f7ff fafa bl 8000966 <I2C_WaitOnFlagUntilTimeout>
|
|
8001372: 2800 cmp r0, #0
|
|
8001374: d170 bne.n 8001458 <HAL_I2C_Mem_Read+0x2f0>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001376: 6822 ldr r2, [r4, #0]
|
|
8001378: 6813 ldr r3, [r2, #0]
|
|
800137a: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
800137e: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001380: 6823 ldr r3, [r4, #0]
|
|
8001382: 691a ldr r2, [r3, #16]
|
|
8001384: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001386: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
8001388: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
800138a: 1c53 adds r3, r2, #1
|
|
800138c: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
800138e: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001390: 3b01 subs r3, #1
|
|
8001392: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001394: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001396: b29b uxth r3, r3
|
|
8001398: 3b01 subs r3, #1
|
|
800139a: b29b uxth r3, r3
|
|
800139c: 8563 strh r3, [r4, #42] @ 0x2a
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
800139e: 6823 ldr r3, [r4, #0]
|
|
80013a0: 691b ldr r3, [r3, #16]
|
|
80013a2: 7053 strb r3, [r2, #1]
|
|
hi2c->pBuffPtr++;
|
|
80013a4: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80013a6: 3301 adds r3, #1
|
|
80013a8: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80013aa: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80013ac: 3b01 subs r3, #1
|
|
80013ae: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80013b0: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80013b2: b29b uxth r3, r3
|
|
80013b4: 3b01 subs r3, #1
|
|
80013b6: b29b uxth r3, r3
|
|
80013b8: 8563 strh r3, [r4, #42] @ 0x2a
|
|
80013ba: e7ab b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
80013bc: 00100002 .word 0x00100002
|
|
80013c0: ffff0000 .word 0xffff0000
|
|
80013c4: 00010004 .word 0x00010004
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80013c8: 462a mov r2, r5
|
|
80013ca: 4631 mov r1, r6
|
|
80013cc: 4620 mov r0, r4
|
|
80013ce: f7ff fcfe bl 8000dce <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
80013d2: 2800 cmp r0, #0
|
|
80013d4: d142 bne.n 800145c <HAL_I2C_Mem_Read+0x2f4>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80013d6: 6823 ldr r3, [r4, #0]
|
|
80013d8: 691a ldr r2, [r3, #16]
|
|
80013da: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80013dc: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
80013de: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80013e0: 3301 adds r3, #1
|
|
80013e2: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80013e4: 8d22 ldrh r2, [r4, #40] @ 0x28
|
|
80013e6: 3a01 subs r2, #1
|
|
80013e8: b292 uxth r2, r2
|
|
80013ea: 8522 strh r2, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80013ec: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80013ee: b29b uxth r3, r3
|
|
80013f0: 3b01 subs r3, #1
|
|
80013f2: b29b uxth r3, r3
|
|
80013f4: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
|
80013f6: 6823 ldr r3, [r4, #0]
|
|
80013f8: 6959 ldr r1, [r3, #20]
|
|
80013fa: f011 0f04 tst.w r1, #4
|
|
80013fe: d089 beq.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
if (hi2c->XferSize == 3U)
|
|
8001400: 2a03 cmp r2, #3
|
|
8001402: d00f beq.n 8001424 <HAL_I2C_Mem_Read+0x2bc>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001404: 6823 ldr r3, [r4, #0]
|
|
8001406: 691a ldr r2, [r3, #16]
|
|
8001408: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800140a: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
800140c: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800140e: 3301 adds r3, #1
|
|
8001410: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001412: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001414: 3b01 subs r3, #1
|
|
8001416: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001418: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
800141a: b29b uxth r3, r3
|
|
800141c: 3b01 subs r3, #1
|
|
800141e: b29b uxth r3, r3
|
|
8001420: 8563 strh r3, [r4, #42] @ 0x2a
|
|
8001422: e777 b.n 8001314 <HAL_I2C_Mem_Read+0x1ac>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8001424: 681a ldr r2, [r3, #0]
|
|
8001426: f422 6280 bic.w r2, r2, #1024 @ 0x400
|
|
800142a: 601a str r2, [r3, #0]
|
|
800142c: e7ea b.n 8001404 <HAL_I2C_Mem_Read+0x29c>
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800142e: 2320 movs r3, #32
|
|
8001430: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001434: 2300 movs r3, #0
|
|
8001436: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
__HAL_UNLOCK(hi2c);
|
|
800143a: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_OK;
|
|
800143e: e6a4 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_BUSY;
|
|
8001440: 2702 movs r7, #2
|
|
8001442: e6a2 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
__HAL_LOCK(hi2c);
|
|
8001444: 2702 movs r7, #2
|
|
8001446: e6a0 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
8001448: 2701 movs r7, #1
|
|
800144a: e69e b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
800144c: 2701 movs r7, #1
|
|
800144e: e69c b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
8001450: 2701 movs r7, #1
|
|
8001452: e69a b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
8001454: 2701 movs r7, #1
|
|
8001456: e698 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
8001458: 2701 movs r7, #1
|
|
800145a: e696 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
800145c: 2701 movs r7, #1
|
|
800145e: e694 b.n 800118a <HAL_I2C_Mem_Read+0x22>
|
|
|
|
08001460 <HAL_RCC_OscConfig>:
|
|
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
uint32_t tickstart;
|
|
uint32_t pll_config;
|
|
/* Check Null pointer */
|
|
if (RCC_OscInitStruct == NULL)
|
|
8001460: 2800 cmp r0, #0
|
|
8001462: f000 81e0 beq.w 8001826 <HAL_RCC_OscConfig+0x3c6>
|
|
{
|
|
8001466: b570 push {r4, r5, r6, lr}
|
|
8001468: b082 sub sp, #8
|
|
800146a: 4604 mov r4, r0
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
800146c: 6803 ldr r3, [r0, #0]
|
|
800146e: f013 0f01 tst.w r3, #1
|
|
8001472: d03b beq.n 80014ec <HAL_RCC_OscConfig+0x8c>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
|
|
8001474: 4b9f ldr r3, [pc, #636] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001476: 689b ldr r3, [r3, #8]
|
|
8001478: f003 030c and.w r3, r3, #12
|
|
800147c: 2b04 cmp r3, #4
|
|
800147e: d02c beq.n 80014da <HAL_RCC_OscConfig+0x7a>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
8001480: 4b9c ldr r3, [pc, #624] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001482: 689b ldr r3, [r3, #8]
|
|
8001484: f003 030c and.w r3, r3, #12
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
|
|
8001488: 2b08 cmp r3, #8
|
|
800148a: d021 beq.n 80014d0 <HAL_RCC_OscConfig+0x70>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
800148c: 6863 ldr r3, [r4, #4]
|
|
800148e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
8001492: d04f beq.n 8001534 <HAL_RCC_OscConfig+0xd4>
|
|
8001494: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
|
|
8001498: d052 beq.n 8001540 <HAL_RCC_OscConfig+0xe0>
|
|
800149a: 4b96 ldr r3, [pc, #600] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800149c: 681a ldr r2, [r3, #0]
|
|
800149e: f422 3280 bic.w r2, r2, #65536 @ 0x10000
|
|
80014a2: 601a str r2, [r3, #0]
|
|
80014a4: 681a ldr r2, [r3, #0]
|
|
80014a6: f422 2280 bic.w r2, r2, #262144 @ 0x40000
|
|
80014aa: 601a str r2, [r3, #0]
|
|
|
|
/* Check the HSE State */
|
|
if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
|
|
80014ac: 6863 ldr r3, [r4, #4]
|
|
80014ae: 2b00 cmp r3, #0
|
|
80014b0: d050 beq.n 8001554 <HAL_RCC_OscConfig+0xf4>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80014b2: f7ff f8c5 bl 8000640 <HAL_GetTick>
|
|
80014b6: 4605 mov r5, r0
|
|
|
|
/* Wait till HSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80014b8: 4b8e ldr r3, [pc, #568] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80014ba: 681b ldr r3, [r3, #0]
|
|
80014bc: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
80014c0: d114 bne.n 80014ec <HAL_RCC_OscConfig+0x8c>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
80014c2: f7ff f8bd bl 8000640 <HAL_GetTick>
|
|
80014c6: 1b40 subs r0, r0, r5
|
|
80014c8: 2864 cmp r0, #100 @ 0x64
|
|
80014ca: d9f5 bls.n 80014b8 <HAL_RCC_OscConfig+0x58>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80014cc: 2003 movs r0, #3
|
|
80014ce: e1b1 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
80014d0: 4b88 ldr r3, [pc, #544] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80014d2: 685b ldr r3, [r3, #4]
|
|
80014d4: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
80014d8: d0d8 beq.n 800148c <HAL_RCC_OscConfig+0x2c>
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
80014da: 4b86 ldr r3, [pc, #536] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80014dc: 681b ldr r3, [r3, #0]
|
|
80014de: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
80014e2: d003 beq.n 80014ec <HAL_RCC_OscConfig+0x8c>
|
|
80014e4: 6863 ldr r3, [r4, #4]
|
|
80014e6: 2b00 cmp r3, #0
|
|
80014e8: f000 819f beq.w 800182a <HAL_RCC_OscConfig+0x3ca>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
80014ec: 6823 ldr r3, [r4, #0]
|
|
80014ee: f013 0f02 tst.w r3, #2
|
|
80014f2: d054 beq.n 800159e <HAL_RCC_OscConfig+0x13e>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
|
|
80014f4: 4b7f ldr r3, [pc, #508] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80014f6: 689b ldr r3, [r3, #8]
|
|
80014f8: f013 0f0c tst.w r3, #12
|
|
80014fc: d03e beq.n 800157c <HAL_RCC_OscConfig+0x11c>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
80014fe: 4b7d ldr r3, [pc, #500] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001500: 689b ldr r3, [r3, #8]
|
|
8001502: f003 030c and.w r3, r3, #12
|
|
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
|
|
8001506: 2b08 cmp r3, #8
|
|
8001508: d033 beq.n 8001572 <HAL_RCC_OscConfig+0x112>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
|
|
800150a: 68e3 ldr r3, [r4, #12]
|
|
800150c: 2b00 cmp r3, #0
|
|
800150e: d068 beq.n 80015e2 <HAL_RCC_OscConfig+0x182>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
8001510: 4b79 ldr r3, [pc, #484] @ (80016f8 <HAL_RCC_OscConfig+0x298>)
|
|
8001512: 2201 movs r2, #1
|
|
8001514: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8001516: f7ff f893 bl 8000640 <HAL_GetTick>
|
|
800151a: 4605 mov r5, r0
|
|
|
|
/* Wait till HSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
800151c: 4b75 ldr r3, [pc, #468] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800151e: 681b ldr r3, [r3, #0]
|
|
8001520: f013 0f02 tst.w r3, #2
|
|
8001524: d154 bne.n 80015d0 <HAL_RCC_OscConfig+0x170>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
8001526: f7ff f88b bl 8000640 <HAL_GetTick>
|
|
800152a: 1b40 subs r0, r0, r5
|
|
800152c: 2802 cmp r0, #2
|
|
800152e: d9f5 bls.n 800151c <HAL_RCC_OscConfig+0xbc>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001530: 2003 movs r0, #3
|
|
8001532: e17f b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
8001534: 4a6f ldr r2, [pc, #444] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001536: 6813 ldr r3, [r2, #0]
|
|
8001538: f443 3380 orr.w r3, r3, #65536 @ 0x10000
|
|
800153c: 6013 str r3, [r2, #0]
|
|
800153e: e7b5 b.n 80014ac <HAL_RCC_OscConfig+0x4c>
|
|
8001540: 4b6c ldr r3, [pc, #432] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001542: 681a ldr r2, [r3, #0]
|
|
8001544: f442 2280 orr.w r2, r2, #262144 @ 0x40000
|
|
8001548: 601a str r2, [r3, #0]
|
|
800154a: 681a ldr r2, [r3, #0]
|
|
800154c: f442 3280 orr.w r2, r2, #65536 @ 0x10000
|
|
8001550: 601a str r2, [r3, #0]
|
|
8001552: e7ab b.n 80014ac <HAL_RCC_OscConfig+0x4c>
|
|
tickstart = HAL_GetTick();
|
|
8001554: f7ff f874 bl 8000640 <HAL_GetTick>
|
|
8001558: 4605 mov r5, r0
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
800155a: 4b66 ldr r3, [pc, #408] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800155c: 681b ldr r3, [r3, #0]
|
|
800155e: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
8001562: d0c3 beq.n 80014ec <HAL_RCC_OscConfig+0x8c>
|
|
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
|
|
8001564: f7ff f86c bl 8000640 <HAL_GetTick>
|
|
8001568: 1b40 subs r0, r0, r5
|
|
800156a: 2864 cmp r0, #100 @ 0x64
|
|
800156c: d9f5 bls.n 800155a <HAL_RCC_OscConfig+0xfa>
|
|
return HAL_TIMEOUT;
|
|
800156e: 2003 movs r0, #3
|
|
8001570: e160 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
8001572: 4b60 ldr r3, [pc, #384] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001574: 685b ldr r3, [r3, #4]
|
|
8001576: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
800157a: d1c6 bne.n 800150a <HAL_RCC_OscConfig+0xaa>
|
|
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
800157c: 4b5d ldr r3, [pc, #372] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800157e: 681b ldr r3, [r3, #0]
|
|
8001580: f013 0f02 tst.w r3, #2
|
|
8001584: d003 beq.n 800158e <HAL_RCC_OscConfig+0x12e>
|
|
8001586: 68e3 ldr r3, [r4, #12]
|
|
8001588: 2b01 cmp r3, #1
|
|
800158a: f040 8150 bne.w 800182e <HAL_RCC_OscConfig+0x3ce>
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
800158e: 4a59 ldr r2, [pc, #356] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001590: 6813 ldr r3, [r2, #0]
|
|
8001592: f023 03f8 bic.w r3, r3, #248 @ 0xf8
|
|
8001596: 6921 ldr r1, [r4, #16]
|
|
8001598: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
800159c: 6013 str r3, [r2, #0]
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
800159e: 6823 ldr r3, [r4, #0]
|
|
80015a0: f013 0f08 tst.w r3, #8
|
|
80015a4: d042 beq.n 800162c <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
|
|
80015a6: 6963 ldr r3, [r4, #20]
|
|
80015a8: b36b cbz r3, 8001606 <HAL_RCC_OscConfig+0x1a6>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
80015aa: 4b53 ldr r3, [pc, #332] @ (80016f8 <HAL_RCC_OscConfig+0x298>)
|
|
80015ac: 2201 movs r2, #1
|
|
80015ae: f8c3 2e80 str.w r2, [r3, #3712] @ 0xe80
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
80015b2: f7ff f845 bl 8000640 <HAL_GetTick>
|
|
80015b6: 4605 mov r5, r0
|
|
|
|
/* Wait till LSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
80015b8: 4b4e ldr r3, [pc, #312] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80015ba: 6f5b ldr r3, [r3, #116] @ 0x74
|
|
80015bc: f013 0f02 tst.w r3, #2
|
|
80015c0: d134 bne.n 800162c <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
80015c2: f7ff f83d bl 8000640 <HAL_GetTick>
|
|
80015c6: 1b40 subs r0, r0, r5
|
|
80015c8: 2802 cmp r0, #2
|
|
80015ca: d9f5 bls.n 80015b8 <HAL_RCC_OscConfig+0x158>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80015cc: 2003 movs r0, #3
|
|
80015ce: e131 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
80015d0: 4a48 ldr r2, [pc, #288] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80015d2: 6813 ldr r3, [r2, #0]
|
|
80015d4: f023 03f8 bic.w r3, r3, #248 @ 0xf8
|
|
80015d8: 6921 ldr r1, [r4, #16]
|
|
80015da: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
80015de: 6013 str r3, [r2, #0]
|
|
80015e0: e7dd b.n 800159e <HAL_RCC_OscConfig+0x13e>
|
|
__HAL_RCC_HSI_DISABLE();
|
|
80015e2: 4b45 ldr r3, [pc, #276] @ (80016f8 <HAL_RCC_OscConfig+0x298>)
|
|
80015e4: 2200 movs r2, #0
|
|
80015e6: 601a str r2, [r3, #0]
|
|
tickstart = HAL_GetTick();
|
|
80015e8: f7ff f82a bl 8000640 <HAL_GetTick>
|
|
80015ec: 4605 mov r5, r0
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
80015ee: 4b41 ldr r3, [pc, #260] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80015f0: 681b ldr r3, [r3, #0]
|
|
80015f2: f013 0f02 tst.w r3, #2
|
|
80015f6: d0d2 beq.n 800159e <HAL_RCC_OscConfig+0x13e>
|
|
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
|
|
80015f8: f7ff f822 bl 8000640 <HAL_GetTick>
|
|
80015fc: 1b40 subs r0, r0, r5
|
|
80015fe: 2802 cmp r0, #2
|
|
8001600: d9f5 bls.n 80015ee <HAL_RCC_OscConfig+0x18e>
|
|
return HAL_TIMEOUT;
|
|
8001602: 2003 movs r0, #3
|
|
8001604: e116 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
8001606: 4b3c ldr r3, [pc, #240] @ (80016f8 <HAL_RCC_OscConfig+0x298>)
|
|
8001608: 2200 movs r2, #0
|
|
800160a: f8c3 2e80 str.w r2, [r3, #3712] @ 0xe80
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
800160e: f7ff f817 bl 8000640 <HAL_GetTick>
|
|
8001612: 4605 mov r5, r0
|
|
|
|
/* Wait till LSI is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8001614: 4b37 ldr r3, [pc, #220] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001616: 6f5b ldr r3, [r3, #116] @ 0x74
|
|
8001618: f013 0f02 tst.w r3, #2
|
|
800161c: d006 beq.n 800162c <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
|
|
800161e: f7ff f80f bl 8000640 <HAL_GetTick>
|
|
8001622: 1b40 subs r0, r0, r5
|
|
8001624: 2802 cmp r0, #2
|
|
8001626: d9f5 bls.n 8001614 <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001628: 2003 movs r0, #3
|
|
800162a: e103 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
800162c: 6823 ldr r3, [r4, #0]
|
|
800162e: f013 0f04 tst.w r3, #4
|
|
8001632: d077 beq.n 8001724 <HAL_RCC_OscConfig+0x2c4>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8001634: 4b2f ldr r3, [pc, #188] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001636: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
8001638: f013 5f80 tst.w r3, #268435456 @ 0x10000000
|
|
800163c: d133 bne.n 80016a6 <HAL_RCC_OscConfig+0x246>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800163e: 2300 movs r3, #0
|
|
8001640: 9301 str r3, [sp, #4]
|
|
8001642: 4b2c ldr r3, [pc, #176] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
8001644: 6c1a ldr r2, [r3, #64] @ 0x40
|
|
8001646: f042 5280 orr.w r2, r2, #268435456 @ 0x10000000
|
|
800164a: 641a str r2, [r3, #64] @ 0x40
|
|
800164c: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
800164e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
8001652: 9301 str r3, [sp, #4]
|
|
8001654: 9b01 ldr r3, [sp, #4]
|
|
pwrclkchanged = SET;
|
|
8001656: 2501 movs r5, #1
|
|
}
|
|
|
|
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8001658: 4b28 ldr r3, [pc, #160] @ (80016fc <HAL_RCC_OscConfig+0x29c>)
|
|
800165a: 681b ldr r3, [r3, #0]
|
|
800165c: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8001660: d023 beq.n 80016aa <HAL_RCC_OscConfig+0x24a>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8001662: 68a3 ldr r3, [r4, #8]
|
|
8001664: 2b01 cmp r3, #1
|
|
8001666: d034 beq.n 80016d2 <HAL_RCC_OscConfig+0x272>
|
|
8001668: 2b05 cmp r3, #5
|
|
800166a: d038 beq.n 80016de <HAL_RCC_OscConfig+0x27e>
|
|
800166c: 4b21 ldr r3, [pc, #132] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800166e: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
8001670: f022 0201 bic.w r2, r2, #1
|
|
8001674: 671a str r2, [r3, #112] @ 0x70
|
|
8001676: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
8001678: f022 0204 bic.w r2, r2, #4
|
|
800167c: 671a str r2, [r3, #112] @ 0x70
|
|
/* Check the LSE State */
|
|
if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
|
|
800167e: 68a3 ldr r3, [r4, #8]
|
|
8001680: 2b00 cmp r3, #0
|
|
8001682: d03d beq.n 8001700 <HAL_RCC_OscConfig+0x2a0>
|
|
{
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8001684: f7fe ffdc bl 8000640 <HAL_GetTick>
|
|
8001688: 4606 mov r6, r0
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
800168a: 4b1a ldr r3, [pc, #104] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
800168c: 6f1b ldr r3, [r3, #112] @ 0x70
|
|
800168e: f013 0f02 tst.w r3, #2
|
|
8001692: d146 bne.n 8001722 <HAL_RCC_OscConfig+0x2c2>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8001694: f7fe ffd4 bl 8000640 <HAL_GetTick>
|
|
8001698: 1b80 subs r0, r0, r6
|
|
800169a: f241 3388 movw r3, #5000 @ 0x1388
|
|
800169e: 4298 cmp r0, r3
|
|
80016a0: d9f3 bls.n 800168a <HAL_RCC_OscConfig+0x22a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80016a2: 2003 movs r0, #3
|
|
80016a4: e0c6 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80016a6: 2500 movs r5, #0
|
|
80016a8: e7d6 b.n 8001658 <HAL_RCC_OscConfig+0x1f8>
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
80016aa: 4a14 ldr r2, [pc, #80] @ (80016fc <HAL_RCC_OscConfig+0x29c>)
|
|
80016ac: 6813 ldr r3, [r2, #0]
|
|
80016ae: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
80016b2: 6013 str r3, [r2, #0]
|
|
tickstart = HAL_GetTick();
|
|
80016b4: f7fe ffc4 bl 8000640 <HAL_GetTick>
|
|
80016b8: 4606 mov r6, r0
|
|
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
80016ba: 4b10 ldr r3, [pc, #64] @ (80016fc <HAL_RCC_OscConfig+0x29c>)
|
|
80016bc: 681b ldr r3, [r3, #0]
|
|
80016be: f413 7f80 tst.w r3, #256 @ 0x100
|
|
80016c2: d1ce bne.n 8001662 <HAL_RCC_OscConfig+0x202>
|
|
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
80016c4: f7fe ffbc bl 8000640 <HAL_GetTick>
|
|
80016c8: 1b80 subs r0, r0, r6
|
|
80016ca: 2802 cmp r0, #2
|
|
80016cc: d9f5 bls.n 80016ba <HAL_RCC_OscConfig+0x25a>
|
|
return HAL_TIMEOUT;
|
|
80016ce: 2003 movs r0, #3
|
|
80016d0: e0b0 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
80016d2: 4a08 ldr r2, [pc, #32] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80016d4: 6f13 ldr r3, [r2, #112] @ 0x70
|
|
80016d6: f043 0301 orr.w r3, r3, #1
|
|
80016da: 6713 str r3, [r2, #112] @ 0x70
|
|
80016dc: e7cf b.n 800167e <HAL_RCC_OscConfig+0x21e>
|
|
80016de: 4b05 ldr r3, [pc, #20] @ (80016f4 <HAL_RCC_OscConfig+0x294>)
|
|
80016e0: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
80016e2: f042 0204 orr.w r2, r2, #4
|
|
80016e6: 671a str r2, [r3, #112] @ 0x70
|
|
80016e8: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
80016ea: f042 0201 orr.w r2, r2, #1
|
|
80016ee: 671a str r2, [r3, #112] @ 0x70
|
|
80016f0: e7c5 b.n 800167e <HAL_RCC_OscConfig+0x21e>
|
|
80016f2: bf00 nop
|
|
80016f4: 40023800 .word 0x40023800
|
|
80016f8: 42470000 .word 0x42470000
|
|
80016fc: 40007000 .word 0x40007000
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001700: f7fe ff9e bl 8000640 <HAL_GetTick>
|
|
8001704: 4606 mov r6, r0
|
|
|
|
/* Wait till LSE is ready */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8001706: 4b52 ldr r3, [pc, #328] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
8001708: 6f1b ldr r3, [r3, #112] @ 0x70
|
|
800170a: f013 0f02 tst.w r3, #2
|
|
800170e: d008 beq.n 8001722 <HAL_RCC_OscConfig+0x2c2>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
|
|
8001710: f7fe ff96 bl 8000640 <HAL_GetTick>
|
|
8001714: 1b80 subs r0, r0, r6
|
|
8001716: f241 3388 movw r3, #5000 @ 0x1388
|
|
800171a: 4298 cmp r0, r3
|
|
800171c: d9f3 bls.n 8001706 <HAL_RCC_OscConfig+0x2a6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800171e: 2003 movs r0, #3
|
|
8001720: e088 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Restore clock configuration if changed */
|
|
if (pwrclkchanged == SET)
|
|
8001722: b9ed cbnz r5, 8001760 <HAL_RCC_OscConfig+0x300>
|
|
}
|
|
}
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8001724: 69a3 ldr r3, [r4, #24]
|
|
8001726: 2b00 cmp r3, #0
|
|
8001728: f000 8083 beq.w 8001832 <HAL_RCC_OscConfig+0x3d2>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
|
|
800172c: 4a48 ldr r2, [pc, #288] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
800172e: 6892 ldr r2, [r2, #8]
|
|
8001730: f002 020c and.w r2, r2, #12
|
|
8001734: 2a08 cmp r2, #8
|
|
8001736: d051 beq.n 80017dc <HAL_RCC_OscConfig+0x37c>
|
|
{
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
8001738: 2b02 cmp r3, #2
|
|
800173a: d017 beq.n 800176c <HAL_RCC_OscConfig+0x30c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
800173c: 4b45 ldr r3, [pc, #276] @ (8001854 <HAL_RCC_OscConfig+0x3f4>)
|
|
800173e: 2200 movs r2, #0
|
|
8001740: 661a str r2, [r3, #96] @ 0x60
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001742: f7fe ff7d bl 8000640 <HAL_GetTick>
|
|
8001746: 4604 mov r4, r0
|
|
|
|
/* Wait till PLL is disabled */
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8001748: 4b41 ldr r3, [pc, #260] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
800174a: 681b ldr r3, [r3, #0]
|
|
800174c: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
8001750: d042 beq.n 80017d8 <HAL_RCC_OscConfig+0x378>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8001752: f7fe ff75 bl 8000640 <HAL_GetTick>
|
|
8001756: 1b00 subs r0, r0, r4
|
|
8001758: 2802 cmp r0, #2
|
|
800175a: d9f5 bls.n 8001748 <HAL_RCC_OscConfig+0x2e8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800175c: 2003 movs r0, #3
|
|
800175e: e069 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8001760: 4a3b ldr r2, [pc, #236] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
8001762: 6c13 ldr r3, [r2, #64] @ 0x40
|
|
8001764: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
|
|
8001768: 6413 str r3, [r2, #64] @ 0x40
|
|
800176a: e7db b.n 8001724 <HAL_RCC_OscConfig+0x2c4>
|
|
__HAL_RCC_PLL_DISABLE();
|
|
800176c: 4b39 ldr r3, [pc, #228] @ (8001854 <HAL_RCC_OscConfig+0x3f4>)
|
|
800176e: 2200 movs r2, #0
|
|
8001770: 661a str r2, [r3, #96] @ 0x60
|
|
tickstart = HAL_GetTick();
|
|
8001772: f7fe ff65 bl 8000640 <HAL_GetTick>
|
|
8001776: 4605 mov r5, r0
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8001778: 4b35 ldr r3, [pc, #212] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
800177a: 681b ldr r3, [r3, #0]
|
|
800177c: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
8001780: d006 beq.n 8001790 <HAL_RCC_OscConfig+0x330>
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
8001782: f7fe ff5d bl 8000640 <HAL_GetTick>
|
|
8001786: 1b40 subs r0, r0, r5
|
|
8001788: 2802 cmp r0, #2
|
|
800178a: d9f5 bls.n 8001778 <HAL_RCC_OscConfig+0x318>
|
|
return HAL_TIMEOUT;
|
|
800178c: 2003 movs r0, #3
|
|
800178e: e051 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
|
|
8001790: 69e3 ldr r3, [r4, #28]
|
|
8001792: 6a22 ldr r2, [r4, #32]
|
|
8001794: 4313 orrs r3, r2
|
|
8001796: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
8001798: ea43 1382 orr.w r3, r3, r2, lsl #6
|
|
800179c: 6aa2 ldr r2, [r4, #40] @ 0x28
|
|
800179e: 0852 lsrs r2, r2, #1
|
|
80017a0: 3a01 subs r2, #1
|
|
80017a2: ea43 4302 orr.w r3, r3, r2, lsl #16
|
|
80017a6: 6ae2 ldr r2, [r4, #44] @ 0x2c
|
|
80017a8: ea43 6302 orr.w r3, r3, r2, lsl #24
|
|
80017ac: 4a28 ldr r2, [pc, #160] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
80017ae: 6053 str r3, [r2, #4]
|
|
__HAL_RCC_PLL_ENABLE();
|
|
80017b0: 4b28 ldr r3, [pc, #160] @ (8001854 <HAL_RCC_OscConfig+0x3f4>)
|
|
80017b2: 2201 movs r2, #1
|
|
80017b4: 661a str r2, [r3, #96] @ 0x60
|
|
tickstart = HAL_GetTick();
|
|
80017b6: f7fe ff43 bl 8000640 <HAL_GetTick>
|
|
80017ba: 4604 mov r4, r0
|
|
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80017bc: 4b24 ldr r3, [pc, #144] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
80017be: 681b ldr r3, [r3, #0]
|
|
80017c0: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
80017c4: d106 bne.n 80017d4 <HAL_RCC_OscConfig+0x374>
|
|
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
|
|
80017c6: f7fe ff3b bl 8000640 <HAL_GetTick>
|
|
80017ca: 1b00 subs r0, r0, r4
|
|
80017cc: 2802 cmp r0, #2
|
|
80017ce: d9f5 bls.n 80017bc <HAL_RCC_OscConfig+0x35c>
|
|
return HAL_TIMEOUT;
|
|
80017d0: 2003 movs r0, #3
|
|
80017d2: e02f b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
return HAL_ERROR;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
80017d4: 2000 movs r0, #0
|
|
80017d6: e02d b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
80017d8: 2000 movs r0, #0
|
|
80017da: e02b b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
80017dc: 2b01 cmp r3, #1
|
|
80017de: d02b beq.n 8001838 <HAL_RCC_OscConfig+0x3d8>
|
|
pll_config = RCC->PLLCFGR;
|
|
80017e0: 4b1b ldr r3, [pc, #108] @ (8001850 <HAL_RCC_OscConfig+0x3f0>)
|
|
80017e2: 685b ldr r3, [r3, #4]
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
80017e4: f403 0180 and.w r1, r3, #4194304 @ 0x400000
|
|
80017e8: 69e2 ldr r2, [r4, #28]
|
|
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
|
|
80017ea: 4291 cmp r1, r2
|
|
80017ec: d126 bne.n 800183c <HAL_RCC_OscConfig+0x3dc>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
|
|
80017ee: f003 023f and.w r2, r3, #63 @ 0x3f
|
|
80017f2: 6a21 ldr r1, [r4, #32]
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
80017f4: 428a cmp r2, r1
|
|
80017f6: d123 bne.n 8001840 <HAL_RCC_OscConfig+0x3e0>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
|
|
80017f8: 6a61 ldr r1, [r4, #36] @ 0x24
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
|
|
80017fa: f647 72c0 movw r2, #32704 @ 0x7fc0
|
|
80017fe: 401a ands r2, r3
|
|
8001800: ebb2 1f81 cmp.w r2, r1, lsl #6
|
|
8001804: d11e bne.n 8001844 <HAL_RCC_OscConfig+0x3e4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
|
|
8001806: f403 3140 and.w r1, r3, #196608 @ 0x30000
|
|
800180a: 6aa2 ldr r2, [r4, #40] @ 0x28
|
|
800180c: 0852 lsrs r2, r2, #1
|
|
800180e: 3a01 subs r2, #1
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
|
|
8001810: ebb1 4f02 cmp.w r1, r2, lsl #16
|
|
8001814: d118 bne.n 8001848 <HAL_RCC_OscConfig+0x3e8>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
|
|
8001816: f003 6370 and.w r3, r3, #251658240 @ 0xf000000
|
|
800181a: 6ae2 ldr r2, [r4, #44] @ 0x2c
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
|
|
800181c: ebb3 6f02 cmp.w r3, r2, lsl #24
|
|
8001820: d114 bne.n 800184c <HAL_RCC_OscConfig+0x3ec>
|
|
return HAL_OK;
|
|
8001822: 2000 movs r0, #0
|
|
8001824: e006 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
return HAL_ERROR;
|
|
8001826: 2001 movs r0, #1
|
|
}
|
|
8001828: 4770 bx lr
|
|
return HAL_ERROR;
|
|
800182a: 2001 movs r0, #1
|
|
800182c: e002 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
return HAL_ERROR;
|
|
800182e: 2001 movs r0, #1
|
|
8001830: e000 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
return HAL_OK;
|
|
8001832: 2000 movs r0, #0
|
|
}
|
|
8001834: b002 add sp, #8
|
|
8001836: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8001838: 2001 movs r0, #1
|
|
800183a: e7fb b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
return HAL_ERROR;
|
|
800183c: 2001 movs r0, #1
|
|
800183e: e7f9 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
8001840: 2001 movs r0, #1
|
|
8001842: e7f7 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
8001844: 2001 movs r0, #1
|
|
8001846: e7f5 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
8001848: 2001 movs r0, #1
|
|
800184a: e7f3 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
800184c: 2001 movs r0, #1
|
|
800184e: e7f1 b.n 8001834 <HAL_RCC_OscConfig+0x3d4>
|
|
8001850: 40023800 .word 0x40023800
|
|
8001854: 42470000 .word 0x42470000
|
|
|
|
08001858 <HAL_RCC_GetSysClockFreq>:
|
|
*
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
8001858: b508 push {r3, lr}
|
|
uint32_t pllvco = 0U;
|
|
uint32_t pllp = 0U;
|
|
uint32_t sysclockfreq = 0U;
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
|
800185a: 4b26 ldr r3, [pc, #152] @ (80018f4 <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
800185c: 689b ldr r3, [r3, #8]
|
|
800185e: f003 030c and.w r3, r3, #12
|
|
8001862: 2b04 cmp r3, #4
|
|
8001864: d041 beq.n 80018ea <HAL_RCC_GetSysClockFreq+0x92>
|
|
8001866: 2b08 cmp r3, #8
|
|
8001868: d141 bne.n 80018ee <HAL_RCC_GetSysClockFreq+0x96>
|
|
}
|
|
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
|
|
{
|
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
|
SYSCLK = PLL_VCO / PLLP */
|
|
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
|
800186a: 4b22 ldr r3, [pc, #136] @ (80018f4 <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
800186c: 685a ldr r2, [r3, #4]
|
|
800186e: f002 023f and.w r2, r2, #63 @ 0x3f
|
|
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
|
|
8001872: 685b ldr r3, [r3, #4]
|
|
8001874: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
8001878: d012 beq.n 80018a0 <HAL_RCC_GetSysClockFreq+0x48>
|
|
{
|
|
/* HSE used as PLL clock source */
|
|
pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
800187a: 4b1e ldr r3, [pc, #120] @ (80018f4 <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
800187c: 6859 ldr r1, [r3, #4]
|
|
800187e: f3c1 1188 ubfx r1, r1, #6, #9
|
|
8001882: 481d ldr r0, [pc, #116] @ (80018f8 <HAL_RCC_GetSysClockFreq+0xa0>)
|
|
8001884: 2300 movs r3, #0
|
|
8001886: fba1 0100 umull r0, r1, r1, r0
|
|
800188a: f7fe fcf9 bl 8000280 <__aeabi_uldivmod>
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source */
|
|
pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
}
|
|
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
|
|
800188e: 4b19 ldr r3, [pc, #100] @ (80018f4 <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
8001890: 685b ldr r3, [r3, #4]
|
|
8001892: f3c3 4301 ubfx r3, r3, #16, #2
|
|
8001896: 3301 adds r3, #1
|
|
8001898: 005b lsls r3, r3, #1
|
|
|
|
sysclockfreq = pllvco / pllp;
|
|
800189a: fbb0 f0f3 udiv r0, r0, r3
|
|
sysclockfreq = HSI_VALUE;
|
|
break;
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
}
|
|
800189e: bd08 pop {r3, pc}
|
|
pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
80018a0: 4b14 ldr r3, [pc, #80] @ (80018f4 <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80018a2: 6858 ldr r0, [r3, #4]
|
|
80018a4: f3c0 1088 ubfx r0, r0, #6, #9
|
|
80018a8: ea4f 1c40 mov.w ip, r0, lsl #5
|
|
80018ac: ebbc 0c00 subs.w ip, ip, r0
|
|
80018b0: eb6e 0e0e sbc.w lr, lr, lr
|
|
80018b4: ea4f 138e mov.w r3, lr, lsl #6
|
|
80018b8: ea43 639c orr.w r3, r3, ip, lsr #26
|
|
80018bc: ea4f 118c mov.w r1, ip, lsl #6
|
|
80018c0: ebb1 010c subs.w r1, r1, ip
|
|
80018c4: eb63 030e sbc.w r3, r3, lr
|
|
80018c8: 00db lsls r3, r3, #3
|
|
80018ca: ea43 7351 orr.w r3, r3, r1, lsr #29
|
|
80018ce: 00c9 lsls r1, r1, #3
|
|
80018d0: eb11 0c00 adds.w ip, r1, r0
|
|
80018d4: f143 0300 adc.w r3, r3, #0
|
|
80018d8: 0299 lsls r1, r3, #10
|
|
80018da: 2300 movs r3, #0
|
|
80018dc: ea4f 208c mov.w r0, ip, lsl #10
|
|
80018e0: ea41 519c orr.w r1, r1, ip, lsr #22
|
|
80018e4: f7fe fccc bl 8000280 <__aeabi_uldivmod>
|
|
80018e8: e7d1 b.n 800188e <HAL_RCC_GetSysClockFreq+0x36>
|
|
sysclockfreq = HSE_VALUE;
|
|
80018ea: 4803 ldr r0, [pc, #12] @ (80018f8 <HAL_RCC_GetSysClockFreq+0xa0>)
|
|
80018ec: e7d7 b.n 800189e <HAL_RCC_GetSysClockFreq+0x46>
|
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
|
80018ee: 4803 ldr r0, [pc, #12] @ (80018fc <HAL_RCC_GetSysClockFreq+0xa4>)
|
|
return sysclockfreq;
|
|
80018f0: e7d5 b.n 800189e <HAL_RCC_GetSysClockFreq+0x46>
|
|
80018f2: bf00 nop
|
|
80018f4: 40023800 .word 0x40023800
|
|
80018f8: 017d7840 .word 0x017d7840
|
|
80018fc: 00f42400 .word 0x00f42400
|
|
|
|
08001900 <HAL_RCC_ClockConfig>:
|
|
if (RCC_ClkInitStruct == NULL)
|
|
8001900: 2800 cmp r0, #0
|
|
8001902: f000 809b beq.w 8001a3c <HAL_RCC_ClockConfig+0x13c>
|
|
{
|
|
8001906: b570 push {r4, r5, r6, lr}
|
|
8001908: 460d mov r5, r1
|
|
800190a: 4604 mov r4, r0
|
|
if (FLatency > __HAL_FLASH_GET_LATENCY())
|
|
800190c: 4b4f ldr r3, [pc, #316] @ (8001a4c <HAL_RCC_ClockConfig+0x14c>)
|
|
800190e: 681b ldr r3, [r3, #0]
|
|
8001910: f003 0307 and.w r3, r3, #7
|
|
8001914: 428b cmp r3, r1
|
|
8001916: d208 bcs.n 800192a <HAL_RCC_ClockConfig+0x2a>
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8001918: b2cb uxtb r3, r1
|
|
800191a: 4a4c ldr r2, [pc, #304] @ (8001a4c <HAL_RCC_ClockConfig+0x14c>)
|
|
800191c: 7013 strb r3, [r2, #0]
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
800191e: 6813 ldr r3, [r2, #0]
|
|
8001920: f003 0307 and.w r3, r3, #7
|
|
8001924: 428b cmp r3, r1
|
|
8001926: f040 808b bne.w 8001a40 <HAL_RCC_ClockConfig+0x140>
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
800192a: 6823 ldr r3, [r4, #0]
|
|
800192c: f013 0f02 tst.w r3, #2
|
|
8001930: d017 beq.n 8001962 <HAL_RCC_ClockConfig+0x62>
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8001932: f013 0f04 tst.w r3, #4
|
|
8001936: d004 beq.n 8001942 <HAL_RCC_ClockConfig+0x42>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
|
8001938: 4a45 ldr r2, [pc, #276] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
800193a: 6893 ldr r3, [r2, #8]
|
|
800193c: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00
|
|
8001940: 6093 str r3, [r2, #8]
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
8001942: 6823 ldr r3, [r4, #0]
|
|
8001944: f013 0f08 tst.w r3, #8
|
|
8001948: d004 beq.n 8001954 <HAL_RCC_ClockConfig+0x54>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
|
800194a: 4a41 ldr r2, [pc, #260] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
800194c: 6893 ldr r3, [r2, #8]
|
|
800194e: f443 4360 orr.w r3, r3, #57344 @ 0xe000
|
|
8001952: 6093 str r3, [r2, #8]
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
8001954: 4a3e ldr r2, [pc, #248] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001956: 6893 ldr r3, [r2, #8]
|
|
8001958: f023 03f0 bic.w r3, r3, #240 @ 0xf0
|
|
800195c: 68a1 ldr r1, [r4, #8]
|
|
800195e: 430b orrs r3, r1
|
|
8001960: 6093 str r3, [r2, #8]
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
8001962: 6823 ldr r3, [r4, #0]
|
|
8001964: f013 0f01 tst.w r3, #1
|
|
8001968: d032 beq.n 80019d0 <HAL_RCC_ClockConfig+0xd0>
|
|
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
800196a: 6863 ldr r3, [r4, #4]
|
|
800196c: 2b01 cmp r3, #1
|
|
800196e: d021 beq.n 80019b4 <HAL_RCC_ClockConfig+0xb4>
|
|
else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
|
|
8001970: 1e9a subs r2, r3, #2
|
|
8001972: 2a01 cmp r2, #1
|
|
8001974: d925 bls.n 80019c2 <HAL_RCC_ClockConfig+0xc2>
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8001976: 4a36 ldr r2, [pc, #216] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001978: 6812 ldr r2, [r2, #0]
|
|
800197a: f012 0f02 tst.w r2, #2
|
|
800197e: d061 beq.n 8001a44 <HAL_RCC_ClockConfig+0x144>
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
8001980: 4933 ldr r1, [pc, #204] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001982: 688a ldr r2, [r1, #8]
|
|
8001984: f022 0203 bic.w r2, r2, #3
|
|
8001988: 4313 orrs r3, r2
|
|
800198a: 608b str r3, [r1, #8]
|
|
tickstart = HAL_GetTick();
|
|
800198c: f7fe fe58 bl 8000640 <HAL_GetTick>
|
|
8001990: 4606 mov r6, r0
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
8001992: 4b2f ldr r3, [pc, #188] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001994: 689b ldr r3, [r3, #8]
|
|
8001996: f003 030c and.w r3, r3, #12
|
|
800199a: 6862 ldr r2, [r4, #4]
|
|
800199c: ebb3 0f82 cmp.w r3, r2, lsl #2
|
|
80019a0: d016 beq.n 80019d0 <HAL_RCC_ClockConfig+0xd0>
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
80019a2: f7fe fe4d bl 8000640 <HAL_GetTick>
|
|
80019a6: 1b80 subs r0, r0, r6
|
|
80019a8: f241 3388 movw r3, #5000 @ 0x1388
|
|
80019ac: 4298 cmp r0, r3
|
|
80019ae: d9f0 bls.n 8001992 <HAL_RCC_ClockConfig+0x92>
|
|
return HAL_TIMEOUT;
|
|
80019b0: 2003 movs r0, #3
|
|
80019b2: e042 b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80019b4: 4a26 ldr r2, [pc, #152] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
80019b6: 6812 ldr r2, [r2, #0]
|
|
80019b8: f412 3f00 tst.w r2, #131072 @ 0x20000
|
|
80019bc: d1e0 bne.n 8001980 <HAL_RCC_ClockConfig+0x80>
|
|
return HAL_ERROR;
|
|
80019be: 2001 movs r0, #1
|
|
80019c0: e03b b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80019c2: 4a23 ldr r2, [pc, #140] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
80019c4: 6812 ldr r2, [r2, #0]
|
|
80019c6: f012 7f00 tst.w r2, #33554432 @ 0x2000000
|
|
80019ca: d1d9 bne.n 8001980 <HAL_RCC_ClockConfig+0x80>
|
|
return HAL_ERROR;
|
|
80019cc: 2001 movs r0, #1
|
|
80019ce: e034 b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
if (FLatency < __HAL_FLASH_GET_LATENCY())
|
|
80019d0: 4b1e ldr r3, [pc, #120] @ (8001a4c <HAL_RCC_ClockConfig+0x14c>)
|
|
80019d2: 681b ldr r3, [r3, #0]
|
|
80019d4: f003 0307 and.w r3, r3, #7
|
|
80019d8: 42ab cmp r3, r5
|
|
80019da: d907 bls.n 80019ec <HAL_RCC_ClockConfig+0xec>
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
80019dc: b2ea uxtb r2, r5
|
|
80019de: 4b1b ldr r3, [pc, #108] @ (8001a4c <HAL_RCC_ClockConfig+0x14c>)
|
|
80019e0: 701a strb r2, [r3, #0]
|
|
if (__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
80019e2: 681b ldr r3, [r3, #0]
|
|
80019e4: f003 0307 and.w r3, r3, #7
|
|
80019e8: 42ab cmp r3, r5
|
|
80019ea: d12d bne.n 8001a48 <HAL_RCC_ClockConfig+0x148>
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
80019ec: 6823 ldr r3, [r4, #0]
|
|
80019ee: f013 0f04 tst.w r3, #4
|
|
80019f2: d006 beq.n 8001a02 <HAL_RCC_ClockConfig+0x102>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
80019f4: 4a16 ldr r2, [pc, #88] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
80019f6: 6893 ldr r3, [r2, #8]
|
|
80019f8: f423 53e0 bic.w r3, r3, #7168 @ 0x1c00
|
|
80019fc: 68e1 ldr r1, [r4, #12]
|
|
80019fe: 430b orrs r3, r1
|
|
8001a00: 6093 str r3, [r2, #8]
|
|
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
8001a02: 6823 ldr r3, [r4, #0]
|
|
8001a04: f013 0f08 tst.w r3, #8
|
|
8001a08: d007 beq.n 8001a1a <HAL_RCC_ClockConfig+0x11a>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
|
|
8001a0a: 4a11 ldr r2, [pc, #68] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001a0c: 6893 ldr r3, [r2, #8]
|
|
8001a0e: f423 4360 bic.w r3, r3, #57344 @ 0xe000
|
|
8001a12: 6921 ldr r1, [r4, #16]
|
|
8001a14: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
8001a18: 6093 str r3, [r2, #8]
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
|
|
8001a1a: f7ff ff1d bl 8001858 <HAL_RCC_GetSysClockFreq>
|
|
8001a1e: 4b0c ldr r3, [pc, #48] @ (8001a50 <HAL_RCC_ClockConfig+0x150>)
|
|
8001a20: 689b ldr r3, [r3, #8]
|
|
8001a22: f3c3 1303 ubfx r3, r3, #4, #4
|
|
8001a26: 4a0b ldr r2, [pc, #44] @ (8001a54 <HAL_RCC_ClockConfig+0x154>)
|
|
8001a28: 5cd3 ldrb r3, [r2, r3]
|
|
8001a2a: 40d8 lsrs r0, r3
|
|
8001a2c: 4b0a ldr r3, [pc, #40] @ (8001a58 <HAL_RCC_ClockConfig+0x158>)
|
|
8001a2e: 6018 str r0, [r3, #0]
|
|
HAL_InitTick(uwTickPrio);
|
|
8001a30: 4b0a ldr r3, [pc, #40] @ (8001a5c <HAL_RCC_ClockConfig+0x15c>)
|
|
8001a32: 6818 ldr r0, [r3, #0]
|
|
8001a34: f7fe fdba bl 80005ac <HAL_InitTick>
|
|
return HAL_OK;
|
|
8001a38: 2000 movs r0, #0
|
|
}
|
|
8001a3a: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8001a3c: 2001 movs r0, #1
|
|
}
|
|
8001a3e: 4770 bx lr
|
|
return HAL_ERROR;
|
|
8001a40: 2001 movs r0, #1
|
|
8001a42: e7fa b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
return HAL_ERROR;
|
|
8001a44: 2001 movs r0, #1
|
|
8001a46: e7f8 b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
return HAL_ERROR;
|
|
8001a48: 2001 movs r0, #1
|
|
8001a4a: e7f6 b.n 8001a3a <HAL_RCC_ClockConfig+0x13a>
|
|
8001a4c: 40023c00 .word 0x40023c00
|
|
8001a50: 40023800 .word 0x40023800
|
|
8001a54: 08007f08 .word 0x08007f08
|
|
8001a58: 20000028 .word 0x20000028
|
|
8001a5c: 20000004 .word 0x20000004
|
|
|
|
08001a60 <HAL_RCC_GetHCLKFreq>:
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
return SystemCoreClock;
|
|
}
|
|
8001a60: 4b01 ldr r3, [pc, #4] @ (8001a68 <HAL_RCC_GetHCLKFreq+0x8>)
|
|
8001a62: 6818 ldr r0, [r3, #0]
|
|
8001a64: 4770 bx lr
|
|
8001a66: bf00 nop
|
|
8001a68: 20000028 .word 0x20000028
|
|
|
|
08001a6c <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
8001a6c: b508 push {r3, lr}
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
|
|
8001a6e: f7ff fff7 bl 8001a60 <HAL_RCC_GetHCLKFreq>
|
|
8001a72: 4b04 ldr r3, [pc, #16] @ (8001a84 <HAL_RCC_GetPCLK1Freq+0x18>)
|
|
8001a74: 689b ldr r3, [r3, #8]
|
|
8001a76: f3c3 2382 ubfx r3, r3, #10, #3
|
|
8001a7a: 4a03 ldr r2, [pc, #12] @ (8001a88 <HAL_RCC_GetPCLK1Freq+0x1c>)
|
|
8001a7c: 5cd3 ldrb r3, [r2, r3]
|
|
}
|
|
8001a7e: 40d8 lsrs r0, r3
|
|
8001a80: bd08 pop {r3, pc}
|
|
8001a82: bf00 nop
|
|
8001a84: 40023800 .word 0x40023800
|
|
8001a88: 08007f18 .word 0x08007f18
|
|
|
|
08001a8c <HAL_RCC_GetPCLK2Freq>:
|
|
* @note Each time PCLK2 changes, this function must be called to update the
|
|
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK2 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK2Freq(void)
|
|
{
|
|
8001a8c: b508 push {r3, lr}
|
|
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
|
|
8001a8e: f7ff ffe7 bl 8001a60 <HAL_RCC_GetHCLKFreq>
|
|
8001a92: 4b04 ldr r3, [pc, #16] @ (8001aa4 <HAL_RCC_GetPCLK2Freq+0x18>)
|
|
8001a94: 689b ldr r3, [r3, #8]
|
|
8001a96: f3c3 3342 ubfx r3, r3, #13, #3
|
|
8001a9a: 4a03 ldr r2, [pc, #12] @ (8001aa8 <HAL_RCC_GetPCLK2Freq+0x1c>)
|
|
8001a9c: 5cd3 ldrb r3, [r2, r3]
|
|
}
|
|
8001a9e: 40d8 lsrs r0, r3
|
|
8001aa0: bd08 pop {r3, pc}
|
|
8001aa2: bf00 nop
|
|
8001aa4: 40023800 .word 0x40023800
|
|
8001aa8: 08007f18 .word 0x08007f18
|
|
|
|
08001aac <UART_EndRxTransfer>:
|
|
* @retval None
|
|
*/
|
|
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
|
|
{
|
|
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
|
|
8001aac: 6802 ldr r2, [r0, #0]
|
|
*/
|
|
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
|
{
|
|
uint32_t result;
|
|
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
8001aae: f102 030c add.w r3, r2, #12
|
|
8001ab2: e853 3f00 ldrex r3, [r3]
|
|
8001ab6: f423 7390 bic.w r3, r3, #288 @ 0x120
|
|
*/
|
|
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
|
{
|
|
uint32_t result;
|
|
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
8001aba: 320c adds r2, #12
|
|
8001abc: e842 3100 strex r1, r3, [r2]
|
|
8001ac0: 2900 cmp r1, #0
|
|
8001ac2: d1f3 bne.n 8001aac <UART_EndRxTransfer>
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
|
8001ac4: 6802 ldr r2, [r0, #0]
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
8001ac6: f102 0314 add.w r3, r2, #20
|
|
8001aca: e853 3f00 ldrex r3, [r3]
|
|
8001ace: f023 0301 bic.w r3, r3, #1
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
8001ad2: 3214 adds r2, #20
|
|
8001ad4: e842 3100 strex r1, r3, [r2]
|
|
8001ad8: 2900 cmp r1, #0
|
|
8001ada: d1f3 bne.n 8001ac4 <UART_EndRxTransfer+0x18>
|
|
|
|
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
|
|
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
|
|
8001adc: 6b03 ldr r3, [r0, #48] @ 0x30
|
|
8001ade: 2b01 cmp r3, #1
|
|
8001ae0: d005 beq.n 8001aee <UART_EndRxTransfer+0x42>
|
|
{
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
|
}
|
|
|
|
/* At end of Rx process, restore huart->RxState to Ready */
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8001ae2: 2320 movs r3, #32
|
|
8001ae4: f880 3042 strb.w r3, [r0, #66] @ 0x42
|
|
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
|
|
8001ae8: 2300 movs r3, #0
|
|
8001aea: 6303 str r3, [r0, #48] @ 0x30
|
|
}
|
|
8001aec: 4770 bx lr
|
|
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
|
|
8001aee: 6802 ldr r2, [r0, #0]
|
|
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|
8001af0: f102 030c add.w r3, r2, #12
|
|
8001af4: e853 3f00 ldrex r3, [r3]
|
|
8001af8: f023 0310 bic.w r3, r3, #16
|
|
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|
8001afc: 320c adds r2, #12
|
|
8001afe: e842 3100 strex r1, r3, [r2]
|
|
8001b02: 2900 cmp r1, #0
|
|
8001b04: d1f3 bne.n 8001aee <UART_EndRxTransfer+0x42>
|
|
8001b06: e7ec b.n 8001ae2 <UART_EndRxTransfer+0x36>
|
|
|
|
08001b08 <UART_SetConfig>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval None
|
|
*/
|
|
static void UART_SetConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
8001b08: b510 push {r4, lr}
|
|
8001b0a: 4604 mov r4, r0
|
|
assert_param(IS_UART_MODE(huart->Init.Mode));
|
|
|
|
/*-------------------------- USART CR2 Configuration -----------------------*/
|
|
/* Configure the UART Stop Bits: Set STOP[13:12] bits
|
|
according to huart->Init.StopBits value */
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
|
8001b0c: 6802 ldr r2, [r0, #0]
|
|
8001b0e: 6913 ldr r3, [r2, #16]
|
|
8001b10: f423 5340 bic.w r3, r3, #12288 @ 0x3000
|
|
8001b14: 68c1 ldr r1, [r0, #12]
|
|
8001b16: 430b orrs r3, r1
|
|
8001b18: 6113 str r3, [r2, #16]
|
|
Set the M bits according to huart->Init.WordLength value
|
|
Set PCE and PS bits according to huart->Init.Parity value
|
|
Set TE and RE bits according to huart->Init.Mode value
|
|
Set OVER8 bit according to huart->Init.OverSampling value */
|
|
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
|
|
8001b1a: 6883 ldr r3, [r0, #8]
|
|
8001b1c: 6902 ldr r2, [r0, #16]
|
|
8001b1e: 431a orrs r2, r3
|
|
8001b20: 6943 ldr r3, [r0, #20]
|
|
8001b22: 431a orrs r2, r3
|
|
8001b24: 69c3 ldr r3, [r0, #28]
|
|
8001b26: 431a orrs r2, r3
|
|
MODIFY_REG(huart->Instance->CR1,
|
|
8001b28: 6801 ldr r1, [r0, #0]
|
|
8001b2a: 68cb ldr r3, [r1, #12]
|
|
8001b2c: f423 4316 bic.w r3, r3, #38400 @ 0x9600
|
|
8001b30: f023 030c bic.w r3, r3, #12
|
|
8001b34: 4313 orrs r3, r2
|
|
8001b36: 60cb str r3, [r1, #12]
|
|
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
|
tmpreg);
|
|
|
|
/*-------------------------- USART CR3 Configuration -----------------------*/
|
|
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
|
|
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
|
|
8001b38: 6802 ldr r2, [r0, #0]
|
|
8001b3a: 6953 ldr r3, [r2, #20]
|
|
8001b3c: f423 7340 bic.w r3, r3, #768 @ 0x300
|
|
8001b40: 6981 ldr r1, [r0, #24]
|
|
8001b42: 430b orrs r3, r1
|
|
8001b44: 6153 str r3, [r2, #20]
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10))
|
|
{
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
}
|
|
#elif defined(USART6)
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6))
|
|
8001b46: 6803 ldr r3, [r0, #0]
|
|
8001b48: 4a31 ldr r2, [pc, #196] @ (8001c10 <UART_SetConfig+0x108>)
|
|
8001b4a: 4293 cmp r3, r2
|
|
8001b4c: d006 beq.n 8001b5c <UART_SetConfig+0x54>
|
|
8001b4e: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
8001b52: 4293 cmp r3, r2
|
|
8001b54: d002 beq.n 8001b5c <UART_SetConfig+0x54>
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
}
|
|
#endif /* USART6 */
|
|
else
|
|
{
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8001b56: f7ff ff89 bl 8001a6c <HAL_RCC_GetPCLK1Freq>
|
|
8001b5a: e001 b.n 8001b60 <UART_SetConfig+0x58>
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8001b5c: f7ff ff96 bl 8001a8c <HAL_RCC_GetPCLK2Freq>
|
|
}
|
|
/*-------------------------- USART BRR Configuration ---------------------*/
|
|
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
|
|
8001b60: 69e3 ldr r3, [r4, #28]
|
|
8001b62: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
|
|
8001b66: d029 beq.n 8001bbc <UART_SetConfig+0xb4>
|
|
{
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
}
|
|
else
|
|
{
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8001b68: 2100 movs r1, #0
|
|
8001b6a: 1803 adds r3, r0, r0
|
|
8001b6c: 4149 adcs r1, r1
|
|
8001b6e: 181b adds r3, r3, r0
|
|
8001b70: f141 0100 adc.w r1, r1, #0
|
|
8001b74: 00c9 lsls r1, r1, #3
|
|
8001b76: ea41 7153 orr.w r1, r1, r3, lsr #29
|
|
8001b7a: 00db lsls r3, r3, #3
|
|
8001b7c: 1818 adds r0, r3, r0
|
|
8001b7e: 6863 ldr r3, [r4, #4]
|
|
8001b80: ea4f 0283 mov.w r2, r3, lsl #2
|
|
8001b84: ea4f 7393 mov.w r3, r3, lsr #30
|
|
8001b88: f141 0100 adc.w r1, r1, #0
|
|
8001b8c: f7fe fb78 bl 8000280 <__aeabi_uldivmod>
|
|
8001b90: 4a20 ldr r2, [pc, #128] @ (8001c14 <UART_SetConfig+0x10c>)
|
|
8001b92: fba2 3100 umull r3, r1, r2, r0
|
|
8001b96: 0949 lsrs r1, r1, #5
|
|
8001b98: 2364 movs r3, #100 @ 0x64
|
|
8001b9a: fb03 0311 mls r3, r3, r1, r0
|
|
8001b9e: 011b lsls r3, r3, #4
|
|
8001ba0: 3332 adds r3, #50 @ 0x32
|
|
8001ba2: fba2 2303 umull r2, r3, r2, r3
|
|
8001ba6: 095b lsrs r3, r3, #5
|
|
8001ba8: f003 02f0 and.w r2, r3, #240 @ 0xf0
|
|
8001bac: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001bb0: f003 030f and.w r3, r3, #15
|
|
8001bb4: 6821 ldr r1, [r4, #0]
|
|
8001bb6: 4413 add r3, r2
|
|
8001bb8: 608b str r3, [r1, #8]
|
|
}
|
|
}
|
|
8001bba: bd10 pop {r4, pc}
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
8001bbc: 2300 movs r3, #0
|
|
8001bbe: 1802 adds r2, r0, r0
|
|
8001bc0: eb43 0103 adc.w r1, r3, r3
|
|
8001bc4: 1812 adds r2, r2, r0
|
|
8001bc6: f141 0100 adc.w r1, r1, #0
|
|
8001bca: 00c9 lsls r1, r1, #3
|
|
8001bcc: ea41 7152 orr.w r1, r1, r2, lsr #29
|
|
8001bd0: 00d2 lsls r2, r2, #3
|
|
8001bd2: 1810 adds r0, r2, r0
|
|
8001bd4: f141 0100 adc.w r1, r1, #0
|
|
8001bd8: 6862 ldr r2, [r4, #4]
|
|
8001bda: 1892 adds r2, r2, r2
|
|
8001bdc: 415b adcs r3, r3
|
|
8001bde: f7fe fb4f bl 8000280 <__aeabi_uldivmod>
|
|
8001be2: 4a0c ldr r2, [pc, #48] @ (8001c14 <UART_SetConfig+0x10c>)
|
|
8001be4: fba2 3100 umull r3, r1, r2, r0
|
|
8001be8: 0949 lsrs r1, r1, #5
|
|
8001bea: 2364 movs r3, #100 @ 0x64
|
|
8001bec: fb03 0311 mls r3, r3, r1, r0
|
|
8001bf0: 00db lsls r3, r3, #3
|
|
8001bf2: 3332 adds r3, #50 @ 0x32
|
|
8001bf4: fba2 2303 umull r2, r3, r2, r3
|
|
8001bf8: 095b lsrs r3, r3, #5
|
|
8001bfa: 005a lsls r2, r3, #1
|
|
8001bfc: f402 72f8 and.w r2, r2, #496 @ 0x1f0
|
|
8001c00: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001c04: f003 0307 and.w r3, r3, #7
|
|
8001c08: 6821 ldr r1, [r4, #0]
|
|
8001c0a: 4413 add r3, r2
|
|
8001c0c: 608b str r3, [r1, #8]
|
|
8001c0e: e7d4 b.n 8001bba <UART_SetConfig+0xb2>
|
|
8001c10: 40011000 .word 0x40011000
|
|
8001c14: 51eb851f .word 0x51eb851f
|
|
|
|
08001c18 <UART_WaitOnFlagUntilTimeout>:
|
|
{
|
|
8001c18: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8001c1c: b083 sub sp, #12
|
|
8001c1e: 4605 mov r5, r0
|
|
8001c20: 460e mov r6, r1
|
|
8001c22: 4617 mov r7, r2
|
|
8001c24: 4699 mov r9, r3
|
|
8001c26: f8dd 8028 ldr.w r8, [sp, #40] @ 0x28
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
8001c2a: 682b ldr r3, [r5, #0]
|
|
8001c2c: 681c ldr r4, [r3, #0]
|
|
8001c2e: ea36 0404 bics.w r4, r6, r4
|
|
8001c32: bf0c ite eq
|
|
8001c34: 2401 moveq r4, #1
|
|
8001c36: 2400 movne r4, #0
|
|
8001c38: 42bc cmp r4, r7
|
|
8001c3a: d128 bne.n 8001c8e <UART_WaitOnFlagUntilTimeout+0x76>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8001c3c: f1b8 3fff cmp.w r8, #4294967295 @ 0xffffffff
|
|
8001c40: d0f3 beq.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x12>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8001c42: f7fe fcfd bl 8000640 <HAL_GetTick>
|
|
8001c46: eba0 0009 sub.w r0, r0, r9
|
|
8001c4a: 4540 cmp r0, r8
|
|
8001c4c: d823 bhi.n 8001c96 <UART_WaitOnFlagUntilTimeout+0x7e>
|
|
8001c4e: f1b8 0f00 cmp.w r8, #0
|
|
8001c52: d022 beq.n 8001c9a <UART_WaitOnFlagUntilTimeout+0x82>
|
|
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
|
|
8001c54: 682b ldr r3, [r5, #0]
|
|
8001c56: 68da ldr r2, [r3, #12]
|
|
8001c58: f012 0f04 tst.w r2, #4
|
|
8001c5c: d0e5 beq.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x12>
|
|
8001c5e: 2e80 cmp r6, #128 @ 0x80
|
|
8001c60: d0e3 beq.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x12>
|
|
8001c62: 2e40 cmp r6, #64 @ 0x40
|
|
8001c64: d0e1 beq.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x12>
|
|
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
|
|
8001c66: 681a ldr r2, [r3, #0]
|
|
8001c68: f012 0f08 tst.w r2, #8
|
|
8001c6c: d0dd beq.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x12>
|
|
__HAL_UART_CLEAR_OREFLAG(huart);
|
|
8001c6e: 2400 movs r4, #0
|
|
8001c70: 9401 str r4, [sp, #4]
|
|
8001c72: 681a ldr r2, [r3, #0]
|
|
8001c74: 9201 str r2, [sp, #4]
|
|
8001c76: 685b ldr r3, [r3, #4]
|
|
8001c78: 9301 str r3, [sp, #4]
|
|
8001c7a: 9b01 ldr r3, [sp, #4]
|
|
UART_EndRxTransfer(huart);
|
|
8001c7c: 4628 mov r0, r5
|
|
8001c7e: f7ff ff15 bl 8001aac <UART_EndRxTransfer>
|
|
huart->ErrorCode = HAL_UART_ERROR_ORE;
|
|
8001c82: 2308 movs r3, #8
|
|
8001c84: 646b str r3, [r5, #68] @ 0x44
|
|
__HAL_UNLOCK(huart);
|
|
8001c86: f885 4040 strb.w r4, [r5, #64] @ 0x40
|
|
return HAL_ERROR;
|
|
8001c8a: 2001 movs r0, #1
|
|
8001c8c: e000 b.n 8001c90 <UART_WaitOnFlagUntilTimeout+0x78>
|
|
return HAL_OK;
|
|
8001c8e: 2000 movs r0, #0
|
|
}
|
|
8001c90: b003 add sp, #12
|
|
8001c92: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
return HAL_TIMEOUT;
|
|
8001c96: 2003 movs r0, #3
|
|
8001c98: e7fa b.n 8001c90 <UART_WaitOnFlagUntilTimeout+0x78>
|
|
8001c9a: 2003 movs r0, #3
|
|
8001c9c: e7f8 b.n 8001c90 <UART_WaitOnFlagUntilTimeout+0x78>
|
|
|
|
08001c9e <HAL_UART_Init>:
|
|
if (huart == NULL)
|
|
8001c9e: b360 cbz r0, 8001cfa <HAL_UART_Init+0x5c>
|
|
{
|
|
8001ca0: b510 push {r4, lr}
|
|
8001ca2: 4604 mov r4, r0
|
|
if (huart->gState == HAL_UART_STATE_RESET)
|
|
8001ca4: f890 3041 ldrb.w r3, [r0, #65] @ 0x41
|
|
8001ca8: b313 cbz r3, 8001cf0 <HAL_UART_Init+0x52>
|
|
huart->gState = HAL_UART_STATE_BUSY;
|
|
8001caa: 2324 movs r3, #36 @ 0x24
|
|
8001cac: f884 3041 strb.w r3, [r4, #65] @ 0x41
|
|
__HAL_UART_DISABLE(huart);
|
|
8001cb0: 6822 ldr r2, [r4, #0]
|
|
8001cb2: 68d3 ldr r3, [r2, #12]
|
|
8001cb4: f423 5300 bic.w r3, r3, #8192 @ 0x2000
|
|
8001cb8: 60d3 str r3, [r2, #12]
|
|
UART_SetConfig(huart);
|
|
8001cba: 4620 mov r0, r4
|
|
8001cbc: f7ff ff24 bl 8001b08 <UART_SetConfig>
|
|
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
|
8001cc0: 6822 ldr r2, [r4, #0]
|
|
8001cc2: 6913 ldr r3, [r2, #16]
|
|
8001cc4: f423 4390 bic.w r3, r3, #18432 @ 0x4800
|
|
8001cc8: 6113 str r3, [r2, #16]
|
|
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
|
8001cca: 6822 ldr r2, [r4, #0]
|
|
8001ccc: 6953 ldr r3, [r2, #20]
|
|
8001cce: f023 032a bic.w r3, r3, #42 @ 0x2a
|
|
8001cd2: 6153 str r3, [r2, #20]
|
|
__HAL_UART_ENABLE(huart);
|
|
8001cd4: 6822 ldr r2, [r4, #0]
|
|
8001cd6: 68d3 ldr r3, [r2, #12]
|
|
8001cd8: f443 5300 orr.w r3, r3, #8192 @ 0x2000
|
|
8001cdc: 60d3 str r3, [r2, #12]
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8001cde: 2000 movs r0, #0
|
|
8001ce0: 6460 str r0, [r4, #68] @ 0x44
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001ce2: 2320 movs r3, #32
|
|
8001ce4: f884 3041 strb.w r3, [r4, #65] @ 0x41
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8001ce8: f884 3042 strb.w r3, [r4, #66] @ 0x42
|
|
huart->RxEventType = HAL_UART_RXEVENT_TC;
|
|
8001cec: 6360 str r0, [r4, #52] @ 0x34
|
|
}
|
|
8001cee: bd10 pop {r4, pc}
|
|
huart->Lock = HAL_UNLOCKED;
|
|
8001cf0: f880 3040 strb.w r3, [r0, #64] @ 0x40
|
|
HAL_UART_MspInit(huart);
|
|
8001cf4: f002 fa34 bl 8004160 <HAL_UART_MspInit>
|
|
8001cf8: e7d7 b.n 8001caa <HAL_UART_Init+0xc>
|
|
return HAL_ERROR;
|
|
8001cfa: 2001 movs r0, #1
|
|
}
|
|
8001cfc: 4770 bx lr
|
|
|
|
08001cfe <HAL_UART_Transmit>:
|
|
{
|
|
8001cfe: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
8001d02: b082 sub sp, #8
|
|
8001d04: 461e mov r6, r3
|
|
if (huart->gState == HAL_UART_STATE_READY)
|
|
8001d06: f890 3041 ldrb.w r3, [r0, #65] @ 0x41
|
|
8001d0a: b2db uxtb r3, r3
|
|
8001d0c: 2b20 cmp r3, #32
|
|
8001d0e: d156 bne.n 8001dbe <HAL_UART_Transmit+0xc0>
|
|
8001d10: 4604 mov r4, r0
|
|
8001d12: 460d mov r5, r1
|
|
8001d14: 4690 mov r8, r2
|
|
if ((pData == NULL) || (Size == 0U))
|
|
8001d16: 2900 cmp r1, #0
|
|
8001d18: d055 beq.n 8001dc6 <HAL_UART_Transmit+0xc8>
|
|
8001d1a: b90a cbnz r2, 8001d20 <HAL_UART_Transmit+0x22>
|
|
return HAL_ERROR;
|
|
8001d1c: 2001 movs r0, #1
|
|
8001d1e: e04f b.n 8001dc0 <HAL_UART_Transmit+0xc2>
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8001d20: 2300 movs r3, #0
|
|
8001d22: 6443 str r3, [r0, #68] @ 0x44
|
|
huart->gState = HAL_UART_STATE_BUSY_TX;
|
|
8001d24: 2321 movs r3, #33 @ 0x21
|
|
8001d26: f880 3041 strb.w r3, [r0, #65] @ 0x41
|
|
tickstart = HAL_GetTick();
|
|
8001d2a: f7fe fc89 bl 8000640 <HAL_GetTick>
|
|
8001d2e: 4607 mov r7, r0
|
|
huart->TxXferSize = Size;
|
|
8001d30: f8a4 8024 strh.w r8, [r4, #36] @ 0x24
|
|
huart->TxXferCount = Size;
|
|
8001d34: f8a4 8026 strh.w r8, [r4, #38] @ 0x26
|
|
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
|
8001d38: 68a3 ldr r3, [r4, #8]
|
|
8001d3a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
|
|
8001d3e: d002 beq.n 8001d46 <HAL_UART_Transmit+0x48>
|
|
pdata16bits = NULL;
|
|
8001d40: f04f 0800 mov.w r8, #0
|
|
8001d44: e014 b.n 8001d70 <HAL_UART_Transmit+0x72>
|
|
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
|
|
8001d46: 6923 ldr r3, [r4, #16]
|
|
8001d48: b32b cbz r3, 8001d96 <HAL_UART_Transmit+0x98>
|
|
pdata16bits = NULL;
|
|
8001d4a: f04f 0800 mov.w r8, #0
|
|
8001d4e: e00f b.n 8001d70 <HAL_UART_Transmit+0x72>
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001d50: 2320 movs r3, #32
|
|
8001d52: f884 3041 strb.w r3, [r4, #65] @ 0x41
|
|
return HAL_TIMEOUT;
|
|
8001d56: 2003 movs r0, #3
|
|
8001d58: e032 b.n 8001dc0 <HAL_UART_Transmit+0xc2>
|
|
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
|
|
8001d5a: f838 3b02 ldrh.w r3, [r8], #2
|
|
8001d5e: 6822 ldr r2, [r4, #0]
|
|
8001d60: f3c3 0308 ubfx r3, r3, #0, #9
|
|
8001d64: 6053 str r3, [r2, #4]
|
|
huart->TxXferCount--;
|
|
8001d66: 8ce2 ldrh r2, [r4, #38] @ 0x26
|
|
8001d68: b292 uxth r2, r2
|
|
8001d6a: 3a01 subs r2, #1
|
|
8001d6c: b292 uxth r2, r2
|
|
8001d6e: 84e2 strh r2, [r4, #38] @ 0x26
|
|
while (huart->TxXferCount > 0U)
|
|
8001d70: 8ce3 ldrh r3, [r4, #38] @ 0x26
|
|
8001d72: b29b uxth r3, r3
|
|
8001d74: b193 cbz r3, 8001d9c <HAL_UART_Transmit+0x9e>
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
|
8001d76: 9600 str r6, [sp, #0]
|
|
8001d78: 463b mov r3, r7
|
|
8001d7a: 2200 movs r2, #0
|
|
8001d7c: 2180 movs r1, #128 @ 0x80
|
|
8001d7e: 4620 mov r0, r4
|
|
8001d80: f7ff ff4a bl 8001c18 <UART_WaitOnFlagUntilTimeout>
|
|
8001d84: 2800 cmp r0, #0
|
|
8001d86: d1e3 bne.n 8001d50 <HAL_UART_Transmit+0x52>
|
|
if (pdata8bits == NULL)
|
|
8001d88: 2d00 cmp r5, #0
|
|
8001d8a: d0e6 beq.n 8001d5a <HAL_UART_Transmit+0x5c>
|
|
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
|
|
8001d8c: f815 2b01 ldrb.w r2, [r5], #1
|
|
8001d90: 6823 ldr r3, [r4, #0]
|
|
8001d92: 605a str r2, [r3, #4]
|
|
pdata8bits++;
|
|
8001d94: e7e7 b.n 8001d66 <HAL_UART_Transmit+0x68>
|
|
pdata16bits = (const uint16_t *) pData;
|
|
8001d96: 46a8 mov r8, r5
|
|
pdata8bits = NULL;
|
|
8001d98: 2500 movs r5, #0
|
|
8001d9a: e7e9 b.n 8001d70 <HAL_UART_Transmit+0x72>
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
|
|
8001d9c: 9600 str r6, [sp, #0]
|
|
8001d9e: 463b mov r3, r7
|
|
8001da0: 2200 movs r2, #0
|
|
8001da2: 2140 movs r1, #64 @ 0x40
|
|
8001da4: 4620 mov r0, r4
|
|
8001da6: f7ff ff37 bl 8001c18 <UART_WaitOnFlagUntilTimeout>
|
|
8001daa: b918 cbnz r0, 8001db4 <HAL_UART_Transmit+0xb6>
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001dac: 2320 movs r3, #32
|
|
8001dae: f884 3041 strb.w r3, [r4, #65] @ 0x41
|
|
return HAL_OK;
|
|
8001db2: e005 b.n 8001dc0 <HAL_UART_Transmit+0xc2>
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001db4: 2320 movs r3, #32
|
|
8001db6: f884 3041 strb.w r3, [r4, #65] @ 0x41
|
|
return HAL_TIMEOUT;
|
|
8001dba: 2003 movs r0, #3
|
|
8001dbc: e000 b.n 8001dc0 <HAL_UART_Transmit+0xc2>
|
|
return HAL_BUSY;
|
|
8001dbe: 2002 movs r0, #2
|
|
}
|
|
8001dc0: b002 add sp, #8
|
|
8001dc2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
return HAL_ERROR;
|
|
8001dc6: 2001 movs r0, #1
|
|
8001dc8: e7fa b.n 8001dc0 <HAL_UART_Transmit+0xc2>
|
|
|
|
08001dca <makeFreeRtosPriority>:
|
|
/* Convert from CMSIS type osPriority to FreeRTOS priority number */
|
|
static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority)
|
|
{
|
|
unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
|
|
|
|
if (priority != osPriorityError) {
|
|
8001dca: 2884 cmp r0, #132 @ 0x84
|
|
8001dcc: d001 beq.n 8001dd2 <makeFreeRtosPriority+0x8>
|
|
fpriority += (priority - osPriorityIdle);
|
|
8001dce: 3003 adds r0, #3
|
|
8001dd0: 4770 bx lr
|
|
unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY;
|
|
8001dd2: 2000 movs r0, #0
|
|
}
|
|
|
|
return fpriority;
|
|
}
|
|
8001dd4: 4770 bx lr
|
|
|
|
08001dd6 <osKernelStart>:
|
|
* @param argument pointer that is passed to the thread function as start argument.
|
|
* @retval status code that indicates the execution status of the function
|
|
* @note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
|
|
*/
|
|
osStatus osKernelStart (void)
|
|
{
|
|
8001dd6: b508 push {r3, lr}
|
|
vTaskStartScheduler();
|
|
8001dd8: f000 fa66 bl 80022a8 <vTaskStartScheduler>
|
|
|
|
return osOK;
|
|
}
|
|
8001ddc: 2000 movs r0, #0
|
|
8001dde: bd08 pop {r3, pc}
|
|
|
|
08001de0 <osThreadCreate>:
|
|
* @param argument pointer that is passed to the thread function as start argument.
|
|
* @retval thread ID for reference by other functions or NULL in case of error.
|
|
* @note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
|
|
*/
|
|
osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument)
|
|
{
|
|
8001de0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8001de4: b087 sub sp, #28
|
|
8001de6: 460e mov r6, r1
|
|
TaskHandle_t handle;
|
|
|
|
#if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
|
|
if((thread_def->buffer != NULL) && (thread_def->controlblock != NULL)) {
|
|
8001de8: 6944 ldr r4, [r0, #20]
|
|
8001dea: b1c4 cbz r4, 8001e1e <osThreadCreate+0x3e>
|
|
8001dec: 6985 ldr r5, [r0, #24]
|
|
8001dee: b1b5 cbz r5, 8001e1e <osThreadCreate+0x3e>
|
|
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8001df0: 6847 ldr r7, [r0, #4]
|
|
8001df2: f8d0 8000 ldr.w r8, [r0]
|
|
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
|
|
8001df6: f8d0 9010 ldr.w r9, [r0, #16]
|
|
handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8001dfa: f9b0 0008 ldrsh.w r0, [r0, #8]
|
|
8001dfe: f7ff ffe4 bl 8001dca <makeFreeRtosPriority>
|
|
8001e02: 9502 str r5, [sp, #8]
|
|
8001e04: 9401 str r4, [sp, #4]
|
|
8001e06: 9000 str r0, [sp, #0]
|
|
8001e08: 4633 mov r3, r6
|
|
8001e0a: 464a mov r2, r9
|
|
8001e0c: 4641 mov r1, r8
|
|
8001e0e: 4638 mov r0, r7
|
|
8001e10: f000 f9dc bl 80021cc <xTaskCreateStatic>
|
|
8001e14: 9005 str r0, [sp, #20]
|
|
&handle) != pdPASS) {
|
|
return NULL;
|
|
}
|
|
#endif
|
|
|
|
return handle;
|
|
8001e16: 9805 ldr r0, [sp, #20]
|
|
}
|
|
8001e18: b007 add sp, #28
|
|
8001e1a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8001e1e: 6844 ldr r4, [r0, #4]
|
|
8001e20: 6805 ldr r5, [r0, #0]
|
|
thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority),
|
|
8001e22: 6907 ldr r7, [r0, #16]
|
|
if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name,
|
|
8001e24: f9b0 0008 ldrsh.w r0, [r0, #8]
|
|
8001e28: f7ff ffcf bl 8001dca <makeFreeRtosPriority>
|
|
8001e2c: ab05 add r3, sp, #20
|
|
8001e2e: 9301 str r3, [sp, #4]
|
|
8001e30: 9000 str r0, [sp, #0]
|
|
8001e32: 4633 mov r3, r6
|
|
8001e34: b2ba uxth r2, r7
|
|
8001e36: 4629 mov r1, r5
|
|
8001e38: 4620 mov r0, r4
|
|
8001e3a: f000 fa02 bl 8002242 <xTaskCreate>
|
|
8001e3e: 2801 cmp r0, #1
|
|
8001e40: d0e9 beq.n 8001e16 <osThreadCreate+0x36>
|
|
return NULL;
|
|
8001e42: 2000 movs r0, #0
|
|
8001e44: e7e8 b.n 8001e18 <osThreadCreate+0x38>
|
|
|
|
08001e46 <osDelay>:
|
|
* @brief Wait for Timeout (Time Delay)
|
|
* @param millisec time delay value
|
|
* @retval status code that indicates the execution status of the function.
|
|
*/
|
|
osStatus osDelay (uint32_t millisec)
|
|
{
|
|
8001e46: b508 push {r3, lr}
|
|
#if INCLUDE_vTaskDelay
|
|
TickType_t ticks = millisec / portTICK_PERIOD_MS;
|
|
|
|
vTaskDelay(ticks ? ticks : 1); /* Minimum delay = 1 tick */
|
|
8001e48: b900 cbnz r0, 8001e4c <osDelay+0x6>
|
|
8001e4a: 2001 movs r0, #1
|
|
8001e4c: f000 fbc6 bl 80025dc <vTaskDelay>
|
|
#else
|
|
(void) millisec;
|
|
|
|
return osErrorResource;
|
|
#endif
|
|
}
|
|
8001e50: 2000 movs r0, #0
|
|
8001e52: bd08 pop {r3, pc}
|
|
|
|
08001e54 <vListInitialise>:
|
|
void vListInitialise( List_t * const pxList )
|
|
{
|
|
/* The list structure contains a list item which is used to mark the
|
|
end of the list. To initialise the list the list end is inserted
|
|
as the only list entry. */
|
|
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8001e54: f100 0308 add.w r3, r0, #8
|
|
8001e58: 6043 str r3, [r0, #4]
|
|
|
|
/* The list end value is the highest possible value in the list to
|
|
ensure it remains at the end of the list. */
|
|
pxList->xListEnd.xItemValue = portMAX_DELAY;
|
|
8001e5a: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8001e5e: 6082 str r2, [r0, #8]
|
|
|
|
/* The list end next and previous pointers point to itself so we know
|
|
when the list is empty. */
|
|
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8001e60: 60c3 str r3, [r0, #12]
|
|
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
|
|
8001e62: 6103 str r3, [r0, #16]
|
|
|
|
pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
|
|
8001e64: 2300 movs r3, #0
|
|
8001e66: 6003 str r3, [r0, #0]
|
|
|
|
/* Write known values into the list if
|
|
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
|
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
|
|
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
|
|
}
|
|
8001e68: 4770 bx lr
|
|
|
|
08001e6a <vListInitialiseItem>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInitialiseItem( ListItem_t * const pxItem )
|
|
{
|
|
/* Make sure the list item is not recorded as being on a list. */
|
|
pxItem->pxContainer = NULL;
|
|
8001e6a: 2300 movs r3, #0
|
|
8001e6c: 6103 str r3, [r0, #16]
|
|
|
|
/* Write known values into the list item if
|
|
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
|
|
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
|
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
|
|
}
|
|
8001e6e: 4770 bx lr
|
|
|
|
08001e70 <vListInsertEnd>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
|
|
{
|
|
ListItem_t * const pxIndex = pxList->pxIndex;
|
|
8001e70: 6843 ldr r3, [r0, #4]
|
|
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
|
|
|
|
/* Insert a new list item into pxList, but rather than sort the list,
|
|
makes the new list item the last item to be removed by a call to
|
|
listGET_OWNER_OF_NEXT_ENTRY(). */
|
|
pxNewListItem->pxNext = pxIndex;
|
|
8001e72: 604b str r3, [r1, #4]
|
|
pxNewListItem->pxPrevious = pxIndex->pxPrevious;
|
|
8001e74: 689a ldr r2, [r3, #8]
|
|
8001e76: 608a str r2, [r1, #8]
|
|
|
|
/* Only used during decision coverage testing. */
|
|
mtCOVERAGE_TEST_DELAY();
|
|
|
|
pxIndex->pxPrevious->pxNext = pxNewListItem;
|
|
8001e78: 6051 str r1, [r2, #4]
|
|
pxIndex->pxPrevious = pxNewListItem;
|
|
8001e7a: 6099 str r1, [r3, #8]
|
|
|
|
/* Remember which list the item is in. */
|
|
pxNewListItem->pxContainer = pxList;
|
|
8001e7c: 6108 str r0, [r1, #16]
|
|
|
|
( pxList->uxNumberOfItems )++;
|
|
8001e7e: 6803 ldr r3, [r0, #0]
|
|
8001e80: 3301 adds r3, #1
|
|
8001e82: 6003 str r3, [r0, #0]
|
|
}
|
|
8001e84: 4770 bx lr
|
|
|
|
08001e86 <vListInsert>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
|
|
{
|
|
8001e86: b430 push {r4, r5}
|
|
ListItem_t *pxIterator;
|
|
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
|
|
8001e88: 680d ldr r5, [r1, #0]
|
|
new list item should be placed after it. This ensures that TCBs which are
|
|
stored in ready lists (all of which have the same xItemValue value) get a
|
|
share of the CPU. However, if the xItemValue is the same as the back marker
|
|
the iteration loop below will not end. Therefore the value is checked
|
|
first, and the algorithm slightly modified if necessary. */
|
|
if( xValueOfInsertion == portMAX_DELAY )
|
|
8001e8a: f1b5 3fff cmp.w r5, #4294967295 @ 0xffffffff
|
|
8001e8e: d011 beq.n 8001eb4 <vListInsert+0x2e>
|
|
4) Using a queue or semaphore before it has been initialised or
|
|
before the scheduler has been started (are interrupts firing
|
|
before vTaskStartScheduler() has been called?).
|
|
**********************************************************************/
|
|
|
|
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
|
|
8001e90: f100 0308 add.w r3, r0, #8
|
|
8001e94: 461c mov r4, r3
|
|
8001e96: 685b ldr r3, [r3, #4]
|
|
8001e98: 681a ldr r2, [r3, #0]
|
|
8001e9a: 42aa cmp r2, r5
|
|
8001e9c: d9fa bls.n 8001e94 <vListInsert+0xe>
|
|
/* There is nothing to do here, just iterating to the wanted
|
|
insertion position. */
|
|
}
|
|
}
|
|
|
|
pxNewListItem->pxNext = pxIterator->pxNext;
|
|
8001e9e: 6863 ldr r3, [r4, #4]
|
|
8001ea0: 604b str r3, [r1, #4]
|
|
pxNewListItem->pxNext->pxPrevious = pxNewListItem;
|
|
8001ea2: 6099 str r1, [r3, #8]
|
|
pxNewListItem->pxPrevious = pxIterator;
|
|
8001ea4: 608c str r4, [r1, #8]
|
|
pxIterator->pxNext = pxNewListItem;
|
|
8001ea6: 6061 str r1, [r4, #4]
|
|
|
|
/* Remember which list the item is in. This allows fast removal of the
|
|
item later. */
|
|
pxNewListItem->pxContainer = pxList;
|
|
8001ea8: 6108 str r0, [r1, #16]
|
|
|
|
( pxList->uxNumberOfItems )++;
|
|
8001eaa: 6803 ldr r3, [r0, #0]
|
|
8001eac: 3301 adds r3, #1
|
|
8001eae: 6003 str r3, [r0, #0]
|
|
}
|
|
8001eb0: bc30 pop {r4, r5}
|
|
8001eb2: 4770 bx lr
|
|
pxIterator = pxList->xListEnd.pxPrevious;
|
|
8001eb4: 6904 ldr r4, [r0, #16]
|
|
8001eb6: e7f2 b.n 8001e9e <vListInsert+0x18>
|
|
|
|
08001eb8 <uxListRemove>:
|
|
|
|
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
|
|
{
|
|
/* The list item knows which list it is in. Obtain the list from the list
|
|
item. */
|
|
List_t * const pxList = pxItemToRemove->pxContainer;
|
|
8001eb8: 6903 ldr r3, [r0, #16]
|
|
|
|
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
|
|
8001eba: 6841 ldr r1, [r0, #4]
|
|
8001ebc: 6882 ldr r2, [r0, #8]
|
|
8001ebe: 608a str r2, [r1, #8]
|
|
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
|
|
8001ec0: 6841 ldr r1, [r0, #4]
|
|
8001ec2: 6051 str r1, [r2, #4]
|
|
|
|
/* Only used during decision coverage testing. */
|
|
mtCOVERAGE_TEST_DELAY();
|
|
|
|
/* Make sure the index is left pointing to a valid item. */
|
|
if( pxList->pxIndex == pxItemToRemove )
|
|
8001ec4: 685a ldr r2, [r3, #4]
|
|
8001ec6: 4282 cmp r2, r0
|
|
8001ec8: d006 beq.n 8001ed8 <uxListRemove+0x20>
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
pxItemToRemove->pxContainer = NULL;
|
|
8001eca: 2200 movs r2, #0
|
|
8001ecc: 6102 str r2, [r0, #16]
|
|
( pxList->uxNumberOfItems )--;
|
|
8001ece: 681a ldr r2, [r3, #0]
|
|
8001ed0: 3a01 subs r2, #1
|
|
8001ed2: 601a str r2, [r3, #0]
|
|
|
|
return pxList->uxNumberOfItems;
|
|
8001ed4: 6818 ldr r0, [r3, #0]
|
|
}
|
|
8001ed6: 4770 bx lr
|
|
pxList->pxIndex = pxItemToRemove->pxPrevious;
|
|
8001ed8: 6882 ldr r2, [r0, #8]
|
|
8001eda: 605a str r2, [r3, #4]
|
|
8001edc: e7f5 b.n 8001eca <uxListRemove+0x12>
|
|
...
|
|
|
|
08001ee0 <prvResetNextTaskUnblockTime>:
|
|
|
|
static void prvResetNextTaskUnblockTime( void )
|
|
{
|
|
TCB_t *pxTCB;
|
|
|
|
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
|
|
8001ee0: 4b07 ldr r3, [pc, #28] @ (8001f00 <prvResetNextTaskUnblockTime+0x20>)
|
|
8001ee2: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
8001ee4: 681b ldr r3, [r3, #0]
|
|
8001ee6: b923 cbnz r3, 8001ef2 <prvResetNextTaskUnblockTime+0x12>
|
|
{
|
|
/* The new current delayed list is empty. Set xNextTaskUnblockTime to
|
|
the maximum possible value so it is extremely unlikely that the
|
|
if( xTickCount >= xNextTaskUnblockTime ) test will pass until
|
|
there is an item in the delayed list. */
|
|
xNextTaskUnblockTime = portMAX_DELAY;
|
|
8001ee8: 4b05 ldr r3, [pc, #20] @ (8001f00 <prvResetNextTaskUnblockTime+0x20>)
|
|
8001eea: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8001eee: 62da str r2, [r3, #44] @ 0x2c
|
|
8001ef0: 4770 bx lr
|
|
{
|
|
/* The new current delayed list is not empty, get the value of
|
|
the item at the head of the delayed list. This is the time at
|
|
which the task at the head of the delayed list should be removed
|
|
from the Blocked state. */
|
|
( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
8001ef2: 4b03 ldr r3, [pc, #12] @ (8001f00 <prvResetNextTaskUnblockTime+0x20>)
|
|
8001ef4: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
8001ef6: 68d2 ldr r2, [r2, #12]
|
|
8001ef8: 68d2 ldr r2, [r2, #12]
|
|
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
|
|
8001efa: 6852 ldr r2, [r2, #4]
|
|
8001efc: 62da str r2, [r3, #44] @ 0x2c
|
|
}
|
|
}
|
|
8001efe: 4770 bx lr
|
|
8001f00: 2000009c .word 0x2000009c
|
|
|
|
08001f04 <prvInitialiseNewTask>:
|
|
{
|
|
8001f04: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8001f08: 4607 mov r7, r0
|
|
8001f0a: 4698 mov r8, r3
|
|
8001f0c: 9d08 ldr r5, [sp, #32]
|
|
8001f0e: f8dd 9024 ldr.w r9, [sp, #36] @ 0x24
|
|
8001f12: 9c0a ldr r4, [sp, #40] @ 0x28
|
|
pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
|
|
8001f14: 6b26 ldr r6, [r4, #48] @ 0x30
|
|
8001f16: f102 4280 add.w r2, r2, #1073741824 @ 0x40000000
|
|
8001f1a: 3a01 subs r2, #1
|
|
8001f1c: eb06 0682 add.w r6, r6, r2, lsl #2
|
|
pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
|
|
8001f20: f026 0607 bic.w r6, r6, #7
|
|
if( pcName != NULL )
|
|
8001f24: b3c1 cbz r1, 8001f98 <prvInitialiseNewTask+0x94>
|
|
8001f26: 4608 mov r0, r1
|
|
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
|
|
8001f28: f04f 0c00 mov.w ip, #0
|
|
8001f2c: f1bc 0f0f cmp.w ip, #15
|
|
8001f30: d809 bhi.n 8001f46 <prvInitialiseNewTask+0x42>
|
|
pxNewTCB->pcTaskName[ x ] = pcName[ x ];
|
|
8001f32: f810 200c ldrb.w r2, [r0, ip]
|
|
8001f36: eb04 030c add.w r3, r4, ip
|
|
8001f3a: f883 2034 strb.w r2, [r3, #52] @ 0x34
|
|
if( pcName[ x ] == ( char ) 0x00 )
|
|
8001f3e: b112 cbz r2, 8001f46 <prvInitialiseNewTask+0x42>
|
|
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
|
|
8001f40: f10c 0c01 add.w ip, ip, #1
|
|
8001f44: e7f2 b.n 8001f2c <prvInitialiseNewTask+0x28>
|
|
pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
|
|
8001f46: 2300 movs r3, #0
|
|
8001f48: f884 3043 strb.w r3, [r4, #67] @ 0x43
|
|
if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
|
|
8001f4c: 2d06 cmp r5, #6
|
|
8001f4e: d900 bls.n 8001f52 <prvInitialiseNewTask+0x4e>
|
|
uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
|
|
8001f50: 2506 movs r5, #6
|
|
pxNewTCB->uxPriority = uxPriority;
|
|
8001f52: 62e5 str r5, [r4, #44] @ 0x2c
|
|
pxNewTCB->uxBasePriority = uxPriority;
|
|
8001f54: 6465 str r5, [r4, #68] @ 0x44
|
|
pxNewTCB->uxMutexesHeld = 0;
|
|
8001f56: f04f 0a00 mov.w sl, #0
|
|
8001f5a: f8c4 a048 str.w sl, [r4, #72] @ 0x48
|
|
vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
|
|
8001f5e: 1d20 adds r0, r4, #4
|
|
8001f60: f7ff ff83 bl 8001e6a <vListInitialiseItem>
|
|
vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
|
|
8001f64: f104 0018 add.w r0, r4, #24
|
|
8001f68: f7ff ff7f bl 8001e6a <vListInitialiseItem>
|
|
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
|
|
8001f6c: 6124 str r4, [r4, #16]
|
|
listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
|
|
8001f6e: f1c5 0507 rsb r5, r5, #7
|
|
8001f72: 61a5 str r5, [r4, #24]
|
|
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
|
|
8001f74: 6264 str r4, [r4, #36] @ 0x24
|
|
pxNewTCB->ulNotifiedValue = 0;
|
|
8001f76: f8c4 a04c str.w sl, [r4, #76] @ 0x4c
|
|
pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
|
|
8001f7a: f884 a050 strb.w sl, [r4, #80] @ 0x50
|
|
pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
|
|
8001f7e: 4642 mov r2, r8
|
|
8001f80: 4639 mov r1, r7
|
|
8001f82: 4630 mov r0, r6
|
|
8001f84: f000 fbe6 bl 8002754 <pxPortInitialiseStack>
|
|
8001f88: 6020 str r0, [r4, #0]
|
|
if( pxCreatedTask != NULL )
|
|
8001f8a: f1b9 0f00 cmp.w r9, #0
|
|
8001f8e: d001 beq.n 8001f94 <prvInitialiseNewTask+0x90>
|
|
*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
|
|
8001f90: f8c9 4000 str.w r4, [r9]
|
|
}
|
|
8001f94: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
pxNewTCB->pcTaskName[ 0 ] = 0x00;
|
|
8001f98: 2300 movs r3, #0
|
|
8001f9a: f884 3034 strb.w r3, [r4, #52] @ 0x34
|
|
8001f9e: e7d5 b.n 8001f4c <prvInitialiseNewTask+0x48>
|
|
|
|
08001fa0 <prvInitialiseTaskLists>:
|
|
{
|
|
8001fa0: b570 push {r4, r5, r6, lr}
|
|
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
|
|
8001fa2: 2400 movs r4, #0
|
|
8001fa4: e007 b.n 8001fb6 <prvInitialiseTaskLists+0x16>
|
|
vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
|
|
8001fa6: eb04 0284 add.w r2, r4, r4, lsl #2
|
|
8001faa: 0093 lsls r3, r2, #2
|
|
8001fac: 4810 ldr r0, [pc, #64] @ (8001ff0 <prvInitialiseTaskLists+0x50>)
|
|
8001fae: 4418 add r0, r3
|
|
8001fb0: f7ff ff50 bl 8001e54 <vListInitialise>
|
|
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
|
|
8001fb4: 3401 adds r4, #1
|
|
8001fb6: 2c06 cmp r4, #6
|
|
8001fb8: d9f5 bls.n 8001fa6 <prvInitialiseTaskLists+0x6>
|
|
vListInitialise( &xDelayedTaskList1 );
|
|
8001fba: 4c0e ldr r4, [pc, #56] @ (8001ff4 <prvInitialiseTaskLists+0x54>)
|
|
8001fbc: f104 06bc add.w r6, r4, #188 @ 0xbc
|
|
8001fc0: 4630 mov r0, r6
|
|
8001fc2: f7ff ff47 bl 8001e54 <vListInitialise>
|
|
vListInitialise( &xDelayedTaskList2 );
|
|
8001fc6: f104 05d0 add.w r5, r4, #208 @ 0xd0
|
|
8001fca: 4628 mov r0, r5
|
|
8001fcc: f7ff ff42 bl 8001e54 <vListInitialise>
|
|
vListInitialise( &xPendingReadyList );
|
|
8001fd0: f104 0014 add.w r0, r4, #20
|
|
8001fd4: f7ff ff3e bl 8001e54 <vListInitialise>
|
|
vListInitialise( &xTasksWaitingTermination );
|
|
8001fd8: f104 00e4 add.w r0, r4, #228 @ 0xe4
|
|
8001fdc: f7ff ff3a bl 8001e54 <vListInitialise>
|
|
vListInitialise( &xSuspendedTaskList );
|
|
8001fe0: 4620 mov r0, r4
|
|
8001fe2: f7ff ff37 bl 8001e54 <vListInitialise>
|
|
pxDelayedTaskList = &xDelayedTaskList1;
|
|
8001fe6: 62a6 str r6, [r4, #40] @ 0x28
|
|
pxOverflowDelayedTaskList = &xDelayedTaskList2;
|
|
8001fe8: f8c4 50f8 str.w r5, [r4, #248] @ 0xf8
|
|
}
|
|
8001fec: bd70 pop {r4, r5, r6, pc}
|
|
8001fee: bf00 nop
|
|
8001ff0: 200000cc .word 0x200000cc
|
|
8001ff4: 2000009c .word 0x2000009c
|
|
|
|
08001ff8 <prvAddNewTaskToReadyList>:
|
|
{
|
|
8001ff8: b538 push {r3, r4, r5, lr}
|
|
8001ffa: 4605 mov r5, r0
|
|
taskENTER_CRITICAL();
|
|
8001ffc: f000 fbd2 bl 80027a4 <vPortEnterCritical>
|
|
uxCurrentNumberOfTasks++;
|
|
8002000: 4b27 ldr r3, [pc, #156] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
8002002: f8d3 20fc ldr.w r2, [r3, #252] @ 0xfc
|
|
8002006: 3201 adds r2, #1
|
|
8002008: f8c3 20fc str.w r2, [r3, #252] @ 0xfc
|
|
if( pxCurrentTCB == NULL )
|
|
800200c: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100
|
|
8002010: b173 cbz r3, 8002030 <prvAddNewTaskToReadyList+0x38>
|
|
if( xSchedulerRunning == pdFALSE )
|
|
8002012: 4b23 ldr r3, [pc, #140] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
8002014: f8d3 3104 ldr.w r3, [r3, #260] @ 0x104
|
|
8002018: b98b cbnz r3, 800203e <prvAddNewTaskToReadyList+0x46>
|
|
if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
|
|
800201a: 4b21 ldr r3, [pc, #132] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
800201c: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100
|
|
8002020: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
8002022: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
8002024: 429a cmp r2, r3
|
|
8002026: d80a bhi.n 800203e <prvAddNewTaskToReadyList+0x46>
|
|
pxCurrentTCB = pxNewTCB;
|
|
8002028: 4b1d ldr r3, [pc, #116] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
800202a: f8c3 5100 str.w r5, [r3, #256] @ 0x100
|
|
800202e: e006 b.n 800203e <prvAddNewTaskToReadyList+0x46>
|
|
pxCurrentTCB = pxNewTCB;
|
|
8002030: 4b1b ldr r3, [pc, #108] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
8002032: f8c3 5100 str.w r5, [r3, #256] @ 0x100
|
|
if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
|
|
8002036: f8d3 30fc ldr.w r3, [r3, #252] @ 0xfc
|
|
800203a: 2b01 cmp r3, #1
|
|
800203c: d02c beq.n 8002098 <prvAddNewTaskToReadyList+0xa0>
|
|
uxTaskNumber++;
|
|
800203e: 4c18 ldr r4, [pc, #96] @ (80020a0 <prvAddNewTaskToReadyList+0xa8>)
|
|
8002040: f8d4 3108 ldr.w r3, [r4, #264] @ 0x108
|
|
8002044: 3301 adds r3, #1
|
|
8002046: f8c4 3108 str.w r3, [r4, #264] @ 0x108
|
|
prvAddTaskToReadyList( pxNewTCB );
|
|
800204a: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
800204c: 2201 movs r2, #1
|
|
800204e: 409a lsls r2, r3
|
|
8002050: f8d4 110c ldr.w r1, [r4, #268] @ 0x10c
|
|
8002054: 430a orrs r2, r1
|
|
8002056: f8c4 210c str.w r2, [r4, #268] @ 0x10c
|
|
800205a: f104 0030 add.w r0, r4, #48 @ 0x30
|
|
800205e: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
8002062: 1d29 adds r1, r5, #4
|
|
8002064: eb00 0083 add.w r0, r0, r3, lsl #2
|
|
8002068: f7ff ff02 bl 8001e70 <vListInsertEnd>
|
|
taskEXIT_CRITICAL();
|
|
800206c: f000 fbbc bl 80027e8 <vPortExitCritical>
|
|
if( xSchedulerRunning != pdFALSE )
|
|
8002070: f8d4 3104 ldr.w r3, [r4, #260] @ 0x104
|
|
8002074: b17b cbz r3, 8002096 <prvAddNewTaskToReadyList+0x9e>
|
|
if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
|
|
8002076: f8d4 3100 ldr.w r3, [r4, #256] @ 0x100
|
|
800207a: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
800207c: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
800207e: 429a cmp r2, r3
|
|
8002080: d209 bcs.n 8002096 <prvAddNewTaskToReadyList+0x9e>
|
|
taskYIELD_IF_USING_PREEMPTION();
|
|
8002082: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
8002086: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
800208a: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
800208e: f3bf 8f4f dsb sy
|
|
8002092: f3bf 8f6f isb sy
|
|
}
|
|
8002096: bd38 pop {r3, r4, r5, pc}
|
|
prvInitialiseTaskLists();
|
|
8002098: f7ff ff82 bl 8001fa0 <prvInitialiseTaskLists>
|
|
800209c: e7cf b.n 800203e <prvAddNewTaskToReadyList+0x46>
|
|
800209e: bf00 nop
|
|
80020a0: 2000009c .word 0x2000009c
|
|
|
|
080020a4 <prvDeleteTCB>:
|
|
{
|
|
80020a4: b510 push {r4, lr}
|
|
80020a6: 4604 mov r4, r0
|
|
if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
|
|
80020a8: f890 3051 ldrb.w r3, [r0, #81] @ 0x51
|
|
80020ac: b163 cbz r3, 80020c8 <prvDeleteTCB+0x24>
|
|
else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
|
|
80020ae: 2b01 cmp r3, #1
|
|
80020b0: d011 beq.n 80020d6 <prvDeleteTCB+0x32>
|
|
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
|
|
80020b2: 2b02 cmp r3, #2
|
|
80020b4: d00e beq.n 80020d4 <prvDeleteTCB+0x30>
|
|
|
|
portFORCE_INLINE static void vPortRaiseBASEPRI( void )
|
|
{
|
|
uint32_t ulNewBASEPRI;
|
|
|
|
__asm volatile
|
|
80020b6: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80020ba: f383 8811 msr BASEPRI, r3
|
|
80020be: f3bf 8f6f isb sy
|
|
80020c2: f3bf 8f4f dsb sy
|
|
80020c6: e7fe b.n 80020c6 <prvDeleteTCB+0x22>
|
|
vPortFree( pxTCB->pxStack );
|
|
80020c8: 6b00 ldr r0, [r0, #48] @ 0x30
|
|
80020ca: f000 fd5b bl 8002b84 <vPortFree>
|
|
vPortFree( pxTCB );
|
|
80020ce: 4620 mov r0, r4
|
|
80020d0: f000 fd58 bl 8002b84 <vPortFree>
|
|
}
|
|
80020d4: bd10 pop {r4, pc}
|
|
vPortFree( pxTCB );
|
|
80020d6: f000 fd55 bl 8002b84 <vPortFree>
|
|
80020da: e7fb b.n 80020d4 <prvDeleteTCB+0x30>
|
|
|
|
080020dc <prvCheckTasksWaitingTermination>:
|
|
{
|
|
80020dc: b538 push {r3, r4, r5, lr}
|
|
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
|
|
80020de: e017 b.n 8002110 <prvCheckTasksWaitingTermination+0x34>
|
|
taskENTER_CRITICAL();
|
|
80020e0: f000 fb60 bl 80027a4 <vPortEnterCritical>
|
|
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
80020e4: 4c0d ldr r4, [pc, #52] @ (800211c <prvCheckTasksWaitingTermination+0x40>)
|
|
80020e6: f8d4 30f0 ldr.w r3, [r4, #240] @ 0xf0
|
|
80020ea: 68dd ldr r5, [r3, #12]
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
80020ec: 1d28 adds r0, r5, #4
|
|
80020ee: f7ff fee3 bl 8001eb8 <uxListRemove>
|
|
--uxCurrentNumberOfTasks;
|
|
80020f2: f8d4 30fc ldr.w r3, [r4, #252] @ 0xfc
|
|
80020f6: 3b01 subs r3, #1
|
|
80020f8: f8c4 30fc str.w r3, [r4, #252] @ 0xfc
|
|
--uxDeletedTasksWaitingCleanUp;
|
|
80020fc: f8d4 3110 ldr.w r3, [r4, #272] @ 0x110
|
|
8002100: 3b01 subs r3, #1
|
|
8002102: f8c4 3110 str.w r3, [r4, #272] @ 0x110
|
|
taskEXIT_CRITICAL();
|
|
8002106: f000 fb6f bl 80027e8 <vPortExitCritical>
|
|
prvDeleteTCB( pxTCB );
|
|
800210a: 4628 mov r0, r5
|
|
800210c: f7ff ffca bl 80020a4 <prvDeleteTCB>
|
|
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
|
|
8002110: 4b02 ldr r3, [pc, #8] @ (800211c <prvCheckTasksWaitingTermination+0x40>)
|
|
8002112: f8d3 3110 ldr.w r3, [r3, #272] @ 0x110
|
|
8002116: 2b00 cmp r3, #0
|
|
8002118: d1e2 bne.n 80020e0 <prvCheckTasksWaitingTermination+0x4>
|
|
}
|
|
800211a: bd38 pop {r3, r4, r5, pc}
|
|
800211c: 2000009c .word 0x2000009c
|
|
|
|
08002120 <prvIdleTask>:
|
|
{
|
|
8002120: b508 push {r3, lr}
|
|
prvCheckTasksWaitingTermination();
|
|
8002122: f7ff ffdb bl 80020dc <prvCheckTasksWaitingTermination>
|
|
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
|
|
8002126: 4b07 ldr r3, [pc, #28] @ (8002144 <prvIdleTask+0x24>)
|
|
8002128: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
800212a: 2b01 cmp r3, #1
|
|
800212c: d9f9 bls.n 8002122 <prvIdleTask+0x2>
|
|
taskYIELD();
|
|
800212e: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
8002132: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
8002136: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
800213a: f3bf 8f4f dsb sy
|
|
800213e: f3bf 8f6f isb sy
|
|
8002142: e7ee b.n 8002122 <prvIdleTask+0x2>
|
|
8002144: 2000009c .word 0x2000009c
|
|
|
|
08002148 <prvAddCurrentTaskToDelayedList>:
|
|
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
|
|
{
|
|
8002148: b570 push {r4, r5, r6, lr}
|
|
800214a: 4604 mov r4, r0
|
|
800214c: 460d mov r5, r1
|
|
TickType_t xTimeToWake;
|
|
const TickType_t xConstTickCount = xTickCount;
|
|
800214e: 4b1e ldr r3, [pc, #120] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
8002150: f8d3 6114 ldr.w r6, [r3, #276] @ 0x114
|
|
}
|
|
#endif
|
|
|
|
/* Remove the task from the ready list before adding it to the blocked list
|
|
as the same list item is used for both lists. */
|
|
if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
|
|
8002154: f8d3 0100 ldr.w r0, [r3, #256] @ 0x100
|
|
8002158: 3004 adds r0, #4
|
|
800215a: f7ff fead bl 8001eb8 <uxListRemove>
|
|
800215e: b958 cbnz r0, 8002178 <prvAddCurrentTaskToDelayedList+0x30>
|
|
{
|
|
/* The current task must be in a ready list, so there is no need to
|
|
check, and the port reset macro can be called directly. */
|
|
portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task. pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
|
|
8002160: 4b19 ldr r3, [pc, #100] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
8002162: f8d3 2100 ldr.w r2, [r3, #256] @ 0x100
|
|
8002166: 6ad2 ldr r2, [r2, #44] @ 0x2c
|
|
8002168: 2101 movs r1, #1
|
|
800216a: 4091 lsls r1, r2
|
|
800216c: f8d3 210c ldr.w r2, [r3, #268] @ 0x10c
|
|
8002170: ea22 0201 bic.w r2, r2, r1
|
|
8002174: f8c3 210c str.w r2, [r3, #268] @ 0x10c
|
|
mtCOVERAGE_TEST_MARKER();
|
|
}
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
{
|
|
if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
|
|
8002178: f1b4 3fff cmp.w r4, #4294967295 @ 0xffffffff
|
|
800217c: d00f beq.n 800219e <prvAddCurrentTaskToDelayedList+0x56>
|
|
else
|
|
{
|
|
/* Calculate the time at which the task should be woken if the event
|
|
does not occur. This may overflow but this doesn't matter, the
|
|
kernel will manage it correctly. */
|
|
xTimeToWake = xConstTickCount + xTicksToWait;
|
|
800217e: 4434 add r4, r6
|
|
|
|
/* The list item will be inserted in wake time order. */
|
|
listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
|
|
8002180: 4b11 ldr r3, [pc, #68] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
8002182: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100
|
|
8002186: 605c str r4, [r3, #4]
|
|
|
|
if( xTimeToWake < xConstTickCount )
|
|
8002188: 42a6 cmp r6, r4
|
|
800218a: d911 bls.n 80021b0 <prvAddCurrentTaskToDelayedList+0x68>
|
|
{
|
|
/* Wake time has overflowed. Place this item in the overflow
|
|
list. */
|
|
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
800218c: 4b0e ldr r3, [pc, #56] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
800218e: f8d3 00f8 ldr.w r0, [r3, #248] @ 0xf8
|
|
8002192: f8d3 1100 ldr.w r1, [r3, #256] @ 0x100
|
|
8002196: 3104 adds r1, #4
|
|
8002198: f7ff fe75 bl 8001e86 <vListInsert>
|
|
|
|
/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
|
|
( void ) xCanBlockIndefinitely;
|
|
}
|
|
#endif /* INCLUDE_vTaskSuspend */
|
|
}
|
|
800219c: bd70 pop {r4, r5, r6, pc}
|
|
if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
|
|
800219e: 2d00 cmp r5, #0
|
|
80021a0: d0ed beq.n 800217e <prvAddCurrentTaskToDelayedList+0x36>
|
|
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
80021a2: 4809 ldr r0, [pc, #36] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
80021a4: f8d0 1100 ldr.w r1, [r0, #256] @ 0x100
|
|
80021a8: 3104 adds r1, #4
|
|
80021aa: f7ff fe61 bl 8001e70 <vListInsertEnd>
|
|
80021ae: e7f5 b.n 800219c <prvAddCurrentTaskToDelayedList+0x54>
|
|
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
|
|
80021b0: 4d05 ldr r5, [pc, #20] @ (80021c8 <prvAddCurrentTaskToDelayedList+0x80>)
|
|
80021b2: 6aa8 ldr r0, [r5, #40] @ 0x28
|
|
80021b4: f8d5 1100 ldr.w r1, [r5, #256] @ 0x100
|
|
80021b8: 3104 adds r1, #4
|
|
80021ba: f7ff fe64 bl 8001e86 <vListInsert>
|
|
if( xTimeToWake < xNextTaskUnblockTime )
|
|
80021be: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
80021c0: 42a3 cmp r3, r4
|
|
80021c2: d9eb bls.n 800219c <prvAddCurrentTaskToDelayedList+0x54>
|
|
xNextTaskUnblockTime = xTimeToWake;
|
|
80021c4: 62ec str r4, [r5, #44] @ 0x2c
|
|
}
|
|
80021c6: e7e9 b.n 800219c <prvAddCurrentTaskToDelayedList+0x54>
|
|
80021c8: 2000009c .word 0x2000009c
|
|
|
|
080021cc <xTaskCreateStatic>:
|
|
{
|
|
80021cc: b530 push {r4, r5, lr}
|
|
80021ce: b087 sub sp, #28
|
|
80021d0: 9c0b ldr r4, [sp, #44] @ 0x2c
|
|
configASSERT( puxStackBuffer != NULL );
|
|
80021d2: b17c cbz r4, 80021f4 <xTaskCreateStatic+0x28>
|
|
configASSERT( pxTaskBuffer != NULL );
|
|
80021d4: 9d0c ldr r5, [sp, #48] @ 0x30
|
|
80021d6: b1b5 cbz r5, 8002206 <xTaskCreateStatic+0x3a>
|
|
volatile size_t xSize = sizeof( StaticTask_t );
|
|
80021d8: 2554 movs r5, #84 @ 0x54
|
|
80021da: 9504 str r5, [sp, #16]
|
|
configASSERT( xSize == sizeof( TCB_t ) );
|
|
80021dc: 9d04 ldr r5, [sp, #16]
|
|
80021de: 2d54 cmp r5, #84 @ 0x54
|
|
80021e0: d01a beq.n 8002218 <xTaskCreateStatic+0x4c>
|
|
80021e2: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80021e6: f383 8811 msr BASEPRI, r3
|
|
80021ea: f3bf 8f6f isb sy
|
|
80021ee: f3bf 8f4f dsb sy
|
|
80021f2: e7fe b.n 80021f2 <xTaskCreateStatic+0x26>
|
|
80021f4: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80021f8: f383 8811 msr BASEPRI, r3
|
|
80021fc: f3bf 8f6f isb sy
|
|
8002200: f3bf 8f4f dsb sy
|
|
configASSERT( puxStackBuffer != NULL );
|
|
8002204: e7fe b.n 8002204 <xTaskCreateStatic+0x38>
|
|
8002206: f04f 0350 mov.w r3, #80 @ 0x50
|
|
800220a: f383 8811 msr BASEPRI, r3
|
|
800220e: f3bf 8f6f isb sy
|
|
8002212: f3bf 8f4f dsb sy
|
|
configASSERT( pxTaskBuffer != NULL );
|
|
8002216: e7fe b.n 8002216 <xTaskCreateStatic+0x4a>
|
|
( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
|
|
8002218: 9d04 ldr r5, [sp, #16]
|
|
pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
|
|
800221a: 9d0c ldr r5, [sp, #48] @ 0x30
|
|
800221c: 632c str r4, [r5, #48] @ 0x30
|
|
pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
|
|
800221e: 2402 movs r4, #2
|
|
8002220: f885 4051 strb.w r4, [r5, #81] @ 0x51
|
|
prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
|
|
8002224: 2400 movs r4, #0
|
|
8002226: 9403 str r4, [sp, #12]
|
|
8002228: 9502 str r5, [sp, #8]
|
|
800222a: ac05 add r4, sp, #20
|
|
800222c: 9401 str r4, [sp, #4]
|
|
800222e: 9c0a ldr r4, [sp, #40] @ 0x28
|
|
8002230: 9400 str r4, [sp, #0]
|
|
8002232: f7ff fe67 bl 8001f04 <prvInitialiseNewTask>
|
|
prvAddNewTaskToReadyList( pxNewTCB );
|
|
8002236: 980c ldr r0, [sp, #48] @ 0x30
|
|
8002238: f7ff fede bl 8001ff8 <prvAddNewTaskToReadyList>
|
|
}
|
|
800223c: 9805 ldr r0, [sp, #20]
|
|
800223e: b007 add sp, #28
|
|
8002240: bd30 pop {r4, r5, pc}
|
|
|
|
08002242 <xTaskCreate>:
|
|
{
|
|
8002242: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8002246: b085 sub sp, #20
|
|
8002248: 4607 mov r7, r0
|
|
800224a: 4688 mov r8, r1
|
|
800224c: 4614 mov r4, r2
|
|
800224e: 461e mov r6, r3
|
|
pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
|
|
8002250: 0090 lsls r0, r2, #2
|
|
8002252: f000 fc21 bl 8002a98 <pvPortMalloc>
|
|
if( pxStack != NULL )
|
|
8002256: b308 cbz r0, 800229c <xTaskCreate+0x5a>
|
|
8002258: 4681 mov r9, r0
|
|
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
|
|
800225a: 2054 movs r0, #84 @ 0x54
|
|
800225c: f000 fc1c bl 8002a98 <pvPortMalloc>
|
|
if( pxNewTCB != NULL )
|
|
8002260: 4605 mov r5, r0
|
|
8002262: b1a8 cbz r0, 8002290 <xTaskCreate+0x4e>
|
|
pxNewTCB->pxStack = pxStack;
|
|
8002264: f8c0 9030 str.w r9, [r0, #48] @ 0x30
|
|
pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
|
|
8002268: 2300 movs r3, #0
|
|
800226a: f880 3051 strb.w r3, [r0, #81] @ 0x51
|
|
prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
|
|
800226e: 9303 str r3, [sp, #12]
|
|
8002270: 9002 str r0, [sp, #8]
|
|
8002272: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
8002274: 9301 str r3, [sp, #4]
|
|
8002276: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
8002278: 9300 str r3, [sp, #0]
|
|
800227a: 4633 mov r3, r6
|
|
800227c: 4622 mov r2, r4
|
|
800227e: 4641 mov r1, r8
|
|
8002280: 4638 mov r0, r7
|
|
8002282: f7ff fe3f bl 8001f04 <prvInitialiseNewTask>
|
|
prvAddNewTaskToReadyList( pxNewTCB );
|
|
8002286: 4628 mov r0, r5
|
|
8002288: f7ff feb6 bl 8001ff8 <prvAddNewTaskToReadyList>
|
|
xReturn = pdPASS;
|
|
800228c: 2001 movs r0, #1
|
|
800228e: e007 b.n 80022a0 <xTaskCreate+0x5e>
|
|
vPortFree( pxStack );
|
|
8002290: 4648 mov r0, r9
|
|
8002292: f000 fc77 bl 8002b84 <vPortFree>
|
|
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
|
|
8002296: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
800229a: e001 b.n 80022a0 <xTaskCreate+0x5e>
|
|
800229c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
}
|
|
80022a0: b005 add sp, #20
|
|
80022a2: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
...
|
|
|
|
080022a8 <vTaskStartScheduler>:
|
|
{
|
|
80022a8: b510 push {r4, lr}
|
|
80022aa: b088 sub sp, #32
|
|
StaticTask_t *pxIdleTaskTCBBuffer = NULL;
|
|
80022ac: 2400 movs r4, #0
|
|
80022ae: 9405 str r4, [sp, #20]
|
|
StackType_t *pxIdleTaskStackBuffer = NULL;
|
|
80022b0: 9406 str r4, [sp, #24]
|
|
vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
|
|
80022b2: aa07 add r2, sp, #28
|
|
80022b4: a906 add r1, sp, #24
|
|
80022b6: a805 add r0, sp, #20
|
|
80022b8: f000 fca2 bl 8002c00 <vApplicationGetIdleTaskMemory>
|
|
xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
|
|
80022bc: 9b05 ldr r3, [sp, #20]
|
|
80022be: 9302 str r3, [sp, #8]
|
|
80022c0: 9b06 ldr r3, [sp, #24]
|
|
80022c2: 9301 str r3, [sp, #4]
|
|
80022c4: 9400 str r4, [sp, #0]
|
|
80022c6: 4623 mov r3, r4
|
|
80022c8: 9a07 ldr r2, [sp, #28]
|
|
80022ca: 490e ldr r1, [pc, #56] @ (8002304 <vTaskStartScheduler+0x5c>)
|
|
80022cc: 480e ldr r0, [pc, #56] @ (8002308 <vTaskStartScheduler+0x60>)
|
|
80022ce: f7ff ff7d bl 80021cc <xTaskCreateStatic>
|
|
80022d2: 4b0e ldr r3, [pc, #56] @ (800230c <vTaskStartScheduler+0x64>)
|
|
80022d4: f8c3 011c str.w r0, [r3, #284] @ 0x11c
|
|
if( xIdleTaskHandle != NULL )
|
|
80022d8: b190 cbz r0, 8002300 <vTaskStartScheduler+0x58>
|
|
80022da: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80022de: f383 8811 msr BASEPRI, r3
|
|
80022e2: f3bf 8f6f isb sy
|
|
80022e6: f3bf 8f4f dsb sy
|
|
xNextTaskUnblockTime = portMAX_DELAY;
|
|
80022ea: 4b08 ldr r3, [pc, #32] @ (800230c <vTaskStartScheduler+0x64>)
|
|
80022ec: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
80022f0: 62da str r2, [r3, #44] @ 0x2c
|
|
xSchedulerRunning = pdTRUE;
|
|
80022f2: 2201 movs r2, #1
|
|
80022f4: f8c3 2104 str.w r2, [r3, #260] @ 0x104
|
|
xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
|
|
80022f8: f8c3 4114 str.w r4, [r3, #276] @ 0x114
|
|
if( xPortStartScheduler() != pdFALSE )
|
|
80022fc: f000 faec bl 80028d8 <xPortStartScheduler>
|
|
}
|
|
8002300: b008 add sp, #32
|
|
8002302: bd10 pop {r4, pc}
|
|
8002304: 08007f20 .word 0x08007f20
|
|
8002308: 08002121 .word 0x08002121
|
|
800230c: 2000009c .word 0x2000009c
|
|
|
|
08002310 <vTaskSuspendAll>:
|
|
++uxSchedulerSuspended;
|
|
8002310: 4a03 ldr r2, [pc, #12] @ (8002320 <vTaskSuspendAll+0x10>)
|
|
8002312: f8d2 3118 ldr.w r3, [r2, #280] @ 0x118
|
|
8002316: 3301 adds r3, #1
|
|
8002318: f8c2 3118 str.w r3, [r2, #280] @ 0x118
|
|
}
|
|
800231c: 4770 bx lr
|
|
800231e: bf00 nop
|
|
8002320: 2000009c .word 0x2000009c
|
|
|
|
08002324 <xTaskGetTickCount>:
|
|
xTicks = xTickCount;
|
|
8002324: 4b01 ldr r3, [pc, #4] @ (800232c <xTaskGetTickCount+0x8>)
|
|
8002326: f8d3 0114 ldr.w r0, [r3, #276] @ 0x114
|
|
}
|
|
800232a: 4770 bx lr
|
|
800232c: 2000009c .word 0x2000009c
|
|
|
|
08002330 <xTaskIncrementTick>:
|
|
{
|
|
8002330: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
8002334: 4b43 ldr r3, [pc, #268] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
8002336: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
800233a: 2b00 cmp r3, #0
|
|
800233c: d176 bne.n 800242c <xTaskIncrementTick+0xfc>
|
|
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
|
|
800233e: 4b41 ldr r3, [pc, #260] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
8002340: f8d3 6114 ldr.w r6, [r3, #276] @ 0x114
|
|
8002344: 3601 adds r6, #1
|
|
xTickCount = xConstTickCount;
|
|
8002346: f8c3 6114 str.w r6, [r3, #276] @ 0x114
|
|
if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
|
|
800234a: b9ce cbnz r6, 8002380 <xTaskIncrementTick+0x50>
|
|
taskSWITCH_DELAYED_LISTS();
|
|
800234c: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
800234e: 681b ldr r3, [r3, #0]
|
|
8002350: b143 cbz r3, 8002364 <xTaskIncrementTick+0x34>
|
|
8002352: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002356: f383 8811 msr BASEPRI, r3
|
|
800235a: f3bf 8f6f isb sy
|
|
800235e: f3bf 8f4f dsb sy
|
|
8002362: e7fe b.n 8002362 <xTaskIncrementTick+0x32>
|
|
8002364: 4b37 ldr r3, [pc, #220] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
8002366: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
8002368: f8d3 10f8 ldr.w r1, [r3, #248] @ 0xf8
|
|
800236c: 6299 str r1, [r3, #40] @ 0x28
|
|
800236e: f8c3 20f8 str.w r2, [r3, #248] @ 0xf8
|
|
8002372: f8d3 2120 ldr.w r2, [r3, #288] @ 0x120
|
|
8002376: 3201 adds r2, #1
|
|
8002378: f8c3 2120 str.w r2, [r3, #288] @ 0x120
|
|
800237c: f7ff fdb0 bl 8001ee0 <prvResetNextTaskUnblockTime>
|
|
if( xConstTickCount >= xNextTaskUnblockTime )
|
|
8002380: 4b30 ldr r3, [pc, #192] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
8002382: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8002384: 42b3 cmp r3, r6
|
|
8002386: d946 bls.n 8002416 <xTaskIncrementTick+0xe6>
|
|
BaseType_t xSwitchRequired = pdFALSE;
|
|
8002388: f04f 0800 mov.w r8, #0
|
|
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
|
|
800238c: 4a2d ldr r2, [pc, #180] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
800238e: f8d2 3100 ldr.w r3, [r2, #256] @ 0x100
|
|
8002392: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8002394: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
8002398: 0099 lsls r1, r3, #2
|
|
800239a: 440a add r2, r1
|
|
800239c: 6b13 ldr r3, [r2, #48] @ 0x30
|
|
800239e: 2b01 cmp r3, #1
|
|
80023a0: d901 bls.n 80023a6 <xTaskIncrementTick+0x76>
|
|
xSwitchRequired = pdTRUE;
|
|
80023a2: f04f 0801 mov.w r8, #1
|
|
if( xYieldPending != pdFALSE )
|
|
80023a6: 4b27 ldr r3, [pc, #156] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
80023a8: f8d3 3124 ldr.w r3, [r3, #292] @ 0x124
|
|
80023ac: 2b00 cmp r3, #0
|
|
80023ae: d045 beq.n 800243c <xTaskIncrementTick+0x10c>
|
|
xSwitchRequired = pdTRUE;
|
|
80023b0: f04f 0801 mov.w r8, #1
|
|
return xSwitchRequired;
|
|
80023b4: e042 b.n 800243c <xTaskIncrementTick+0x10c>
|
|
xSwitchRequired = pdTRUE;
|
|
80023b6: f04f 0801 mov.w r8, #1
|
|
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
|
|
80023ba: 4b22 ldr r3, [pc, #136] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
80023bc: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
80023be: 681b ldr r3, [r3, #0]
|
|
80023c0: b363 cbz r3, 800241c <xTaskIncrementTick+0xec>
|
|
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
80023c2: 4b20 ldr r3, [pc, #128] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
80023c4: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
80023c6: 68db ldr r3, [r3, #12]
|
|
80023c8: 68dc ldr r4, [r3, #12]
|
|
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
|
|
80023ca: 6863 ldr r3, [r4, #4]
|
|
if( xConstTickCount < xItemValue )
|
|
80023cc: 429e cmp r6, r3
|
|
80023ce: d32a bcc.n 8002426 <xTaskIncrementTick+0xf6>
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
80023d0: 1d27 adds r7, r4, #4
|
|
80023d2: 4638 mov r0, r7
|
|
80023d4: f7ff fd70 bl 8001eb8 <uxListRemove>
|
|
if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
|
|
80023d8: 6aa3 ldr r3, [r4, #40] @ 0x28
|
|
80023da: b11b cbz r3, 80023e4 <xTaskIncrementTick+0xb4>
|
|
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
|
|
80023dc: f104 0018 add.w r0, r4, #24
|
|
80023e0: f7ff fd6a bl 8001eb8 <uxListRemove>
|
|
prvAddTaskToReadyList( pxTCB );
|
|
80023e4: 6ae3 ldr r3, [r4, #44] @ 0x2c
|
|
80023e6: 2201 movs r2, #1
|
|
80023e8: 409a lsls r2, r3
|
|
80023ea: 4d16 ldr r5, [pc, #88] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
80023ec: f8d5 110c ldr.w r1, [r5, #268] @ 0x10c
|
|
80023f0: 430a orrs r2, r1
|
|
80023f2: f8c5 210c str.w r2, [r5, #268] @ 0x10c
|
|
80023f6: f105 0030 add.w r0, r5, #48 @ 0x30
|
|
80023fa: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
80023fe: 009a lsls r2, r3, #2
|
|
8002400: 4639 mov r1, r7
|
|
8002402: 4410 add r0, r2
|
|
8002404: f7ff fd34 bl 8001e70 <vListInsertEnd>
|
|
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
|
|
8002408: 6ae2 ldr r2, [r4, #44] @ 0x2c
|
|
800240a: f8d5 3100 ldr.w r3, [r5, #256] @ 0x100
|
|
800240e: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
8002410: 429a cmp r2, r3
|
|
8002412: d2d0 bcs.n 80023b6 <xTaskIncrementTick+0x86>
|
|
8002414: e7d1 b.n 80023ba <xTaskIncrementTick+0x8a>
|
|
BaseType_t xSwitchRequired = pdFALSE;
|
|
8002416: f04f 0800 mov.w r8, #0
|
|
800241a: e7ce b.n 80023ba <xTaskIncrementTick+0x8a>
|
|
xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
|
|
800241c: 4b09 ldr r3, [pc, #36] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
800241e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8002422: 62da str r2, [r3, #44] @ 0x2c
|
|
break;
|
|
8002424: e7b2 b.n 800238c <xTaskIncrementTick+0x5c>
|
|
xNextTaskUnblockTime = xItemValue;
|
|
8002426: 4a07 ldr r2, [pc, #28] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
8002428: 62d3 str r3, [r2, #44] @ 0x2c
|
|
break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
|
|
800242a: e7af b.n 800238c <xTaskIncrementTick+0x5c>
|
|
++xPendedTicks;
|
|
800242c: 4a05 ldr r2, [pc, #20] @ (8002444 <xTaskIncrementTick+0x114>)
|
|
800242e: f8d2 3128 ldr.w r3, [r2, #296] @ 0x128
|
|
8002432: 3301 adds r3, #1
|
|
8002434: f8c2 3128 str.w r3, [r2, #296] @ 0x128
|
|
BaseType_t xSwitchRequired = pdFALSE;
|
|
8002438: f04f 0800 mov.w r8, #0
|
|
}
|
|
800243c: 4640 mov r0, r8
|
|
800243e: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
8002442: bf00 nop
|
|
8002444: 2000009c .word 0x2000009c
|
|
|
|
08002448 <xTaskResumeAll>:
|
|
configASSERT( uxSchedulerSuspended );
|
|
8002448: 4b3a ldr r3, [pc, #232] @ (8002534 <xTaskResumeAll+0xec>)
|
|
800244a: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
800244e: b943 cbnz r3, 8002462 <xTaskResumeAll+0x1a>
|
|
8002450: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002454: f383 8811 msr BASEPRI, r3
|
|
8002458: f3bf 8f6f isb sy
|
|
800245c: f3bf 8f4f dsb sy
|
|
8002460: e7fe b.n 8002460 <xTaskResumeAll+0x18>
|
|
{
|
|
8002462: b570 push {r4, r5, r6, lr}
|
|
taskENTER_CRITICAL();
|
|
8002464: f000 f99e bl 80027a4 <vPortEnterCritical>
|
|
--uxSchedulerSuspended;
|
|
8002468: 4b32 ldr r3, [pc, #200] @ (8002534 <xTaskResumeAll+0xec>)
|
|
800246a: f8d3 2118 ldr.w r2, [r3, #280] @ 0x118
|
|
800246e: 3a01 subs r2, #1
|
|
8002470: f8c3 2118 str.w r2, [r3, #280] @ 0x118
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
8002474: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
8002478: 2b00 cmp r3, #0
|
|
800247a: d156 bne.n 800252a <xTaskResumeAll+0xe2>
|
|
if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
|
|
800247c: 4b2d ldr r3, [pc, #180] @ (8002534 <xTaskResumeAll+0xec>)
|
|
800247e: f8d3 30fc ldr.w r3, [r3, #252] @ 0xfc
|
|
8002482: b90b cbnz r3, 8002488 <xTaskResumeAll+0x40>
|
|
BaseType_t xAlreadyYielded = pdFALSE;
|
|
8002484: 2400 movs r4, #0
|
|
8002486: e051 b.n 800252c <xTaskResumeAll+0xe4>
|
|
TCB_t *pxTCB = NULL;
|
|
8002488: 2500 movs r5, #0
|
|
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
|
|
800248a: 4b2a ldr r3, [pc, #168] @ (8002534 <xTaskResumeAll+0xec>)
|
|
800248c: 695b ldr r3, [r3, #20]
|
|
800248e: b32b cbz r3, 80024dc <xTaskResumeAll+0x94>
|
|
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
8002490: 4c28 ldr r4, [pc, #160] @ (8002534 <xTaskResumeAll+0xec>)
|
|
8002492: 6a23 ldr r3, [r4, #32]
|
|
8002494: 68dd ldr r5, [r3, #12]
|
|
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
|
|
8002496: f105 0018 add.w r0, r5, #24
|
|
800249a: f7ff fd0d bl 8001eb8 <uxListRemove>
|
|
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
|
|
800249e: 1d2e adds r6, r5, #4
|
|
80024a0: 4630 mov r0, r6
|
|
80024a2: f7ff fd09 bl 8001eb8 <uxListRemove>
|
|
prvAddTaskToReadyList( pxTCB );
|
|
80024a6: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
80024a8: 2201 movs r2, #1
|
|
80024aa: 409a lsls r2, r3
|
|
80024ac: f8d4 110c ldr.w r1, [r4, #268] @ 0x10c
|
|
80024b0: 430a orrs r2, r1
|
|
80024b2: f8c4 210c str.w r2, [r4, #268] @ 0x10c
|
|
80024b6: f104 0030 add.w r0, r4, #48 @ 0x30
|
|
80024ba: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
80024be: 4631 mov r1, r6
|
|
80024c0: eb00 0083 add.w r0, r0, r3, lsl #2
|
|
80024c4: f7ff fcd4 bl 8001e70 <vListInsertEnd>
|
|
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
|
|
80024c8: 6aea ldr r2, [r5, #44] @ 0x2c
|
|
80024ca: f8d4 3100 ldr.w r3, [r4, #256] @ 0x100
|
|
80024ce: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
80024d0: 429a cmp r2, r3
|
|
80024d2: d3da bcc.n 800248a <xTaskResumeAll+0x42>
|
|
xYieldPending = pdTRUE;
|
|
80024d4: 2201 movs r2, #1
|
|
80024d6: f8c4 2124 str.w r2, [r4, #292] @ 0x124
|
|
80024da: e7d6 b.n 800248a <xTaskResumeAll+0x42>
|
|
if( pxTCB != NULL )
|
|
80024dc: b10d cbz r5, 80024e2 <xTaskResumeAll+0x9a>
|
|
prvResetNextTaskUnblockTime();
|
|
80024de: f7ff fcff bl 8001ee0 <prvResetNextTaskUnblockTime>
|
|
TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
|
|
80024e2: 4b14 ldr r3, [pc, #80] @ (8002534 <xTaskResumeAll+0xec>)
|
|
80024e4: f8d3 4128 ldr.w r4, [r3, #296] @ 0x128
|
|
if( xPendedCounts > ( TickType_t ) 0U )
|
|
80024e8: b98c cbnz r4, 800250e <xTaskResumeAll+0xc6>
|
|
if( xYieldPending != pdFALSE )
|
|
80024ea: 4b12 ldr r3, [pc, #72] @ (8002534 <xTaskResumeAll+0xec>)
|
|
80024ec: f8d3 4124 ldr.w r4, [r3, #292] @ 0x124
|
|
80024f0: b1e4 cbz r4, 800252c <xTaskResumeAll+0xe4>
|
|
taskYIELD_IF_USING_PREEMPTION();
|
|
80024f2: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80024f6: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
80024fa: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
80024fe: f3bf 8f4f dsb sy
|
|
8002502: f3bf 8f6f isb sy
|
|
xAlreadyYielded = pdTRUE;
|
|
8002506: 2401 movs r4, #1
|
|
8002508: e010 b.n 800252c <xTaskResumeAll+0xe4>
|
|
} while( xPendedCounts > ( TickType_t ) 0U );
|
|
800250a: 3c01 subs r4, #1
|
|
800250c: d008 beq.n 8002520 <xTaskResumeAll+0xd8>
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
800250e: f7ff ff0f bl 8002330 <xTaskIncrementTick>
|
|
8002512: 2800 cmp r0, #0
|
|
8002514: d0f9 beq.n 800250a <xTaskResumeAll+0xc2>
|
|
xYieldPending = pdTRUE;
|
|
8002516: 4b07 ldr r3, [pc, #28] @ (8002534 <xTaskResumeAll+0xec>)
|
|
8002518: 2201 movs r2, #1
|
|
800251a: f8c3 2124 str.w r2, [r3, #292] @ 0x124
|
|
800251e: e7f4 b.n 800250a <xTaskResumeAll+0xc2>
|
|
xPendedTicks = 0;
|
|
8002520: 4b04 ldr r3, [pc, #16] @ (8002534 <xTaskResumeAll+0xec>)
|
|
8002522: 2200 movs r2, #0
|
|
8002524: f8c3 2128 str.w r2, [r3, #296] @ 0x128
|
|
8002528: e7df b.n 80024ea <xTaskResumeAll+0xa2>
|
|
BaseType_t xAlreadyYielded = pdFALSE;
|
|
800252a: 2400 movs r4, #0
|
|
taskEXIT_CRITICAL();
|
|
800252c: f000 f95c bl 80027e8 <vPortExitCritical>
|
|
}
|
|
8002530: 4620 mov r0, r4
|
|
8002532: bd70 pop {r4, r5, r6, pc}
|
|
8002534: 2000009c .word 0x2000009c
|
|
|
|
08002538 <vTaskDelayUntil>:
|
|
{
|
|
8002538: b538 push {r3, r4, r5, lr}
|
|
configASSERT( pxPreviousWakeTime );
|
|
800253a: b158 cbz r0, 8002554 <vTaskDelayUntil+0x1c>
|
|
800253c: 460c mov r4, r1
|
|
800253e: 4605 mov r5, r0
|
|
configASSERT( ( xTimeIncrement > 0U ) );
|
|
8002540: b989 cbnz r1, 8002566 <vTaskDelayUntil+0x2e>
|
|
8002542: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002546: f383 8811 msr BASEPRI, r3
|
|
800254a: f3bf 8f6f isb sy
|
|
800254e: f3bf 8f4f dsb sy
|
|
8002552: e7fe b.n 8002552 <vTaskDelayUntil+0x1a>
|
|
8002554: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002558: f383 8811 msr BASEPRI, r3
|
|
800255c: f3bf 8f6f isb sy
|
|
8002560: f3bf 8f4f dsb sy
|
|
configASSERT( pxPreviousWakeTime );
|
|
8002564: e7fe b.n 8002564 <vTaskDelayUntil+0x2c>
|
|
configASSERT( uxSchedulerSuspended == 0 );
|
|
8002566: 4b1c ldr r3, [pc, #112] @ (80025d8 <vTaskDelayUntil+0xa0>)
|
|
8002568: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
800256c: b143 cbz r3, 8002580 <vTaskDelayUntil+0x48>
|
|
800256e: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002572: f383 8811 msr BASEPRI, r3
|
|
8002576: f3bf 8f6f isb sy
|
|
800257a: f3bf 8f4f dsb sy
|
|
800257e: e7fe b.n 800257e <vTaskDelayUntil+0x46>
|
|
vTaskSuspendAll();
|
|
8002580: f7ff fec6 bl 8002310 <vTaskSuspendAll>
|
|
const TickType_t xConstTickCount = xTickCount;
|
|
8002584: 4b14 ldr r3, [pc, #80] @ (80025d8 <vTaskDelayUntil+0xa0>)
|
|
8002586: f8d3 0114 ldr.w r0, [r3, #276] @ 0x114
|
|
xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
|
|
800258a: 682b ldr r3, [r5, #0]
|
|
800258c: 441c add r4, r3
|
|
if( xConstTickCount < *pxPreviousWakeTime )
|
|
800258e: 4283 cmp r3, r0
|
|
8002590: d909 bls.n 80025a6 <vTaskDelayUntil+0x6e>
|
|
if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
|
|
8002592: 42a3 cmp r3, r4
|
|
8002594: d801 bhi.n 800259a <vTaskDelayUntil+0x62>
|
|
*pxPreviousWakeTime = xTimeToWake;
|
|
8002596: 602c str r4, [r5, #0]
|
|
if( xShouldDelay != pdFALSE )
|
|
8002598: e00e b.n 80025b8 <vTaskDelayUntil+0x80>
|
|
if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
|
|
800259a: 42a0 cmp r0, r4
|
|
800259c: d301 bcc.n 80025a2 <vTaskDelayUntil+0x6a>
|
|
*pxPreviousWakeTime = xTimeToWake;
|
|
800259e: 602c str r4, [r5, #0]
|
|
if( xShouldDelay != pdFALSE )
|
|
80025a0: e00a b.n 80025b8 <vTaskDelayUntil+0x80>
|
|
*pxPreviousWakeTime = xTimeToWake;
|
|
80025a2: 602c str r4, [r5, #0]
|
|
if( xShouldDelay != pdFALSE )
|
|
80025a4: e004 b.n 80025b0 <vTaskDelayUntil+0x78>
|
|
if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
|
|
80025a6: 42a3 cmp r3, r4
|
|
80025a8: d801 bhi.n 80025ae <vTaskDelayUntil+0x76>
|
|
80025aa: 42a0 cmp r0, r4
|
|
80025ac: d212 bcs.n 80025d4 <vTaskDelayUntil+0x9c>
|
|
*pxPreviousWakeTime = xTimeToWake;
|
|
80025ae: 602c str r4, [r5, #0]
|
|
prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
|
|
80025b0: 2100 movs r1, #0
|
|
80025b2: 1a20 subs r0, r4, r0
|
|
80025b4: f7ff fdc8 bl 8002148 <prvAddCurrentTaskToDelayedList>
|
|
xAlreadyYielded = xTaskResumeAll();
|
|
80025b8: f7ff ff46 bl 8002448 <xTaskResumeAll>
|
|
if( xAlreadyYielded == pdFALSE )
|
|
80025bc: b948 cbnz r0, 80025d2 <vTaskDelayUntil+0x9a>
|
|
portYIELD_WITHIN_API();
|
|
80025be: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80025c2: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
80025c6: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
80025ca: f3bf 8f4f dsb sy
|
|
80025ce: f3bf 8f6f isb sy
|
|
}
|
|
80025d2: bd38 pop {r3, r4, r5, pc}
|
|
*pxPreviousWakeTime = xTimeToWake;
|
|
80025d4: 602c str r4, [r5, #0]
|
|
if( xShouldDelay != pdFALSE )
|
|
80025d6: e7ef b.n 80025b8 <vTaskDelayUntil+0x80>
|
|
80025d8: 2000009c .word 0x2000009c
|
|
|
|
080025dc <vTaskDelay>:
|
|
{
|
|
80025dc: b510 push {r4, lr}
|
|
if( xTicksToDelay > ( TickType_t ) 0U )
|
|
80025de: b1b0 cbz r0, 800260e <vTaskDelay+0x32>
|
|
80025e0: 4604 mov r4, r0
|
|
configASSERT( uxSchedulerSuspended == 0 );
|
|
80025e2: 4b10 ldr r3, [pc, #64] @ (8002624 <vTaskDelay+0x48>)
|
|
80025e4: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
80025e8: b143 cbz r3, 80025fc <vTaskDelay+0x20>
|
|
80025ea: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80025ee: f383 8811 msr BASEPRI, r3
|
|
80025f2: f3bf 8f6f isb sy
|
|
80025f6: f3bf 8f4f dsb sy
|
|
80025fa: e7fe b.n 80025fa <vTaskDelay+0x1e>
|
|
vTaskSuspendAll();
|
|
80025fc: f7ff fe88 bl 8002310 <vTaskSuspendAll>
|
|
prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
|
|
8002600: 2100 movs r1, #0
|
|
8002602: 4620 mov r0, r4
|
|
8002604: f7ff fda0 bl 8002148 <prvAddCurrentTaskToDelayedList>
|
|
xAlreadyYielded = xTaskResumeAll();
|
|
8002608: f7ff ff1e bl 8002448 <xTaskResumeAll>
|
|
if( xAlreadyYielded == pdFALSE )
|
|
800260c: b948 cbnz r0, 8002622 <vTaskDelay+0x46>
|
|
portYIELD_WITHIN_API();
|
|
800260e: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
8002612: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
8002616: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
800261a: f3bf 8f4f dsb sy
|
|
800261e: f3bf 8f6f isb sy
|
|
}
|
|
8002622: bd10 pop {r4, pc}
|
|
8002624: 2000009c .word 0x2000009c
|
|
|
|
08002628 <vTaskSwitchContext>:
|
|
if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
|
|
8002628: 4b22 ldr r3, [pc, #136] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
800262a: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
800262e: b123 cbz r3, 800263a <vTaskSwitchContext+0x12>
|
|
xYieldPending = pdTRUE;
|
|
8002630: 4b20 ldr r3, [pc, #128] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
8002632: 2201 movs r2, #1
|
|
8002634: f8c3 2124 str.w r2, [r3, #292] @ 0x124
|
|
8002638: 4770 bx lr
|
|
xYieldPending = pdFALSE;
|
|
800263a: 4a1e ldr r2, [pc, #120] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
800263c: 2300 movs r3, #0
|
|
800263e: f8c2 3124 str.w r3, [r2, #292] @ 0x124
|
|
taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
8002642: f8d2 310c ldr.w r3, [r2, #268] @ 0x10c
|
|
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
|
|
8002646: fab3 f383 clz r3, r3
|
|
800264a: b2db uxtb r3, r3
|
|
800264c: f1c3 031f rsb r3, r3, #31
|
|
8002650: eb03 0083 add.w r0, r3, r3, lsl #2
|
|
8002654: 0081 lsls r1, r0, #2
|
|
8002656: 440a add r2, r1
|
|
8002658: 6b12 ldr r2, [r2, #48] @ 0x30
|
|
800265a: b942 cbnz r2, 800266e <vTaskSwitchContext+0x46>
|
|
__asm volatile
|
|
800265c: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002660: f383 8811 msr BASEPRI, r3
|
|
8002664: f3bf 8f6f isb sy
|
|
8002668: f3bf 8f4f dsb sy
|
|
800266c: e7fe b.n 800266c <vTaskSwitchContext+0x44>
|
|
800266e: 4a11 ldr r2, [pc, #68] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
8002670: eb03 0083 add.w r0, r3, r3, lsl #2
|
|
8002674: 0081 lsls r1, r0, #2
|
|
8002676: 4411 add r1, r2
|
|
8002678: 6b48 ldr r0, [r1, #52] @ 0x34
|
|
800267a: 6840 ldr r0, [r0, #4]
|
|
800267c: 6348 str r0, [r1, #52] @ 0x34
|
|
800267e: 3230 adds r2, #48 @ 0x30
|
|
8002680: eb03 0c83 add.w ip, r3, r3, lsl #2
|
|
8002684: ea4f 018c mov.w r1, ip, lsl #2
|
|
8002688: 3108 adds r1, #8
|
|
800268a: 440a add r2, r1
|
|
800268c: 4290 cmp r0, r2
|
|
800268e: d009 beq.n 80026a4 <vTaskSwitchContext+0x7c>
|
|
8002690: 4908 ldr r1, [pc, #32] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
8002692: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
8002696: 009a lsls r2, r3, #2
|
|
8002698: 440a add r2, r1
|
|
800269a: 6b53 ldr r3, [r2, #52] @ 0x34
|
|
800269c: 68db ldr r3, [r3, #12]
|
|
800269e: f8c1 3100 str.w r3, [r1, #256] @ 0x100
|
|
}
|
|
80026a2: 4770 bx lr
|
|
taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
|
|
80026a4: 6840 ldr r0, [r0, #4]
|
|
80026a6: 4662 mov r2, ip
|
|
80026a8: 0091 lsls r1, r2, #2
|
|
80026aa: 4a02 ldr r2, [pc, #8] @ (80026b4 <vTaskSwitchContext+0x8c>)
|
|
80026ac: 440a add r2, r1
|
|
80026ae: 6350 str r0, [r2, #52] @ 0x34
|
|
80026b0: e7ee b.n 8002690 <vTaskSwitchContext+0x68>
|
|
80026b2: bf00 nop
|
|
80026b4: 2000009c .word 0x2000009c
|
|
|
|
080026b8 <xTaskGetSchedulerState>:
|
|
if( xSchedulerRunning == pdFALSE )
|
|
80026b8: 4b06 ldr r3, [pc, #24] @ (80026d4 <xTaskGetSchedulerState+0x1c>)
|
|
80026ba: f8d3 3104 ldr.w r3, [r3, #260] @ 0x104
|
|
80026be: b13b cbz r3, 80026d0 <xTaskGetSchedulerState+0x18>
|
|
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
|
|
80026c0: 4b04 ldr r3, [pc, #16] @ (80026d4 <xTaskGetSchedulerState+0x1c>)
|
|
80026c2: f8d3 3118 ldr.w r3, [r3, #280] @ 0x118
|
|
80026c6: b10b cbz r3, 80026cc <xTaskGetSchedulerState+0x14>
|
|
xReturn = taskSCHEDULER_SUSPENDED;
|
|
80026c8: 2000 movs r0, #0
|
|
}
|
|
80026ca: 4770 bx lr
|
|
xReturn = taskSCHEDULER_RUNNING;
|
|
80026cc: 2002 movs r0, #2
|
|
80026ce: 4770 bx lr
|
|
xReturn = taskSCHEDULER_NOT_STARTED;
|
|
80026d0: 2001 movs r0, #1
|
|
80026d2: 4770 bx lr
|
|
80026d4: 2000009c .word 0x2000009c
|
|
|
|
080026d8 <prvTaskExitError>:
|
|
return pxTopOfStack;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static void prvTaskExitError( void )
|
|
{
|
|
80026d8: b082 sub sp, #8
|
|
volatile uint32_t ulDummy = 0;
|
|
80026da: 2300 movs r3, #0
|
|
80026dc: 9301 str r3, [sp, #4]
|
|
its caller as there is nothing to return to. If a task wants to exit it
|
|
should instead call vTaskDelete( NULL ).
|
|
|
|
Artificially force an assert() to be triggered if configASSERT() is
|
|
defined, then stop here so application writers can catch the error. */
|
|
configASSERT( uxCriticalNesting == ~0UL );
|
|
80026de: 4b0d ldr r3, [pc, #52] @ (8002714 <prvTaskExitError+0x3c>)
|
|
80026e0: 681b ldr r3, [r3, #0]
|
|
80026e2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
|
|
80026e6: d008 beq.n 80026fa <prvTaskExitError+0x22>
|
|
80026e8: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80026ec: f383 8811 msr BASEPRI, r3
|
|
80026f0: f3bf 8f6f isb sy
|
|
80026f4: f3bf 8f4f dsb sy
|
|
80026f8: e7fe b.n 80026f8 <prvTaskExitError+0x20>
|
|
80026fa: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80026fe: f383 8811 msr BASEPRI, r3
|
|
8002702: f3bf 8f6f isb sy
|
|
8002706: f3bf 8f4f dsb sy
|
|
portDISABLE_INTERRUPTS();
|
|
while( ulDummy == 0 )
|
|
800270a: 9b01 ldr r3, [sp, #4]
|
|
800270c: 2b00 cmp r3, #0
|
|
800270e: d0fc beq.n 800270a <prvTaskExitError+0x32>
|
|
about code appearing after this function is called - making ulDummy
|
|
volatile makes the compiler think the function could return and
|
|
therefore not output an 'unreachable code' warning for code that appears
|
|
after it. */
|
|
}
|
|
}
|
|
8002710: b002 add sp, #8
|
|
8002712: 4770 bx lr
|
|
8002714: 20000008 .word 0x20000008
|
|
|
|
08002718 <prvPortStartFirstTask>:
|
|
{
|
|
/* Start the first task. This also clears the bit that indicates the FPU is
|
|
in use in case the FPU was used before the scheduler was started - which
|
|
would otherwise result in the unnecessary leaving of space in the SVC stack
|
|
for lazy saving of FPU registers. */
|
|
__asm volatile(
|
|
8002718: 4808 ldr r0, [pc, #32] @ (800273c <prvPortStartFirstTask+0x24>)
|
|
800271a: 6800 ldr r0, [r0, #0]
|
|
800271c: 6800 ldr r0, [r0, #0]
|
|
800271e: f380 8808 msr MSP, r0
|
|
8002722: f04f 0000 mov.w r0, #0
|
|
8002726: f380 8814 msr CONTROL, r0
|
|
800272a: b662 cpsie i
|
|
800272c: b661 cpsie f
|
|
800272e: f3bf 8f4f dsb sy
|
|
8002732: f3bf 8f6f isb sy
|
|
8002736: df00 svc 0
|
|
8002738: bf00 nop
|
|
" dsb \n"
|
|
" isb \n"
|
|
" svc 0 \n" /* System call to start first task. */
|
|
" nop \n"
|
|
);
|
|
}
|
|
800273a: 0000 .short 0x0000
|
|
800273c: e000ed08 .word 0xe000ed08
|
|
|
|
08002740 <vPortEnableVFP>:
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/* This is a naked function. */
|
|
static void vPortEnableVFP( void )
|
|
{
|
|
__asm volatile
|
|
8002740: f8df 000c ldr.w r0, [pc, #12] @ 8002750 <vPortEnableVFP+0x10>
|
|
8002744: 6801 ldr r1, [r0, #0]
|
|
8002746: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
|
|
800274a: 6001 str r1, [r0, #0]
|
|
800274c: 4770 bx lr
|
|
" \n"
|
|
" orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */
|
|
" str r1, [r0] \n"
|
|
" bx r14 "
|
|
);
|
|
}
|
|
800274e: 0000 .short 0x0000
|
|
8002750: e000ed88 .word 0xe000ed88
|
|
|
|
08002754 <pxPortInitialiseStack>:
|
|
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
|
|
8002754: f04f 7380 mov.w r3, #16777216 @ 0x1000000
|
|
8002758: f840 3c04 str.w r3, [r0, #-4]
|
|
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
|
|
800275c: f021 0101 bic.w r1, r1, #1
|
|
8002760: f840 1c08 str.w r1, [r0, #-8]
|
|
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
|
|
8002764: 4b05 ldr r3, [pc, #20] @ (800277c <pxPortInitialiseStack+0x28>)
|
|
8002766: f840 3c0c str.w r3, [r0, #-12]
|
|
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
|
800276a: f840 2c20 str.w r2, [r0, #-32]
|
|
*pxTopOfStack = portINITIAL_EXC_RETURN;
|
|
800276e: f06f 0302 mvn.w r3, #2
|
|
8002772: f840 3c24 str.w r3, [r0, #-36]
|
|
}
|
|
8002776: 3844 subs r0, #68 @ 0x44
|
|
8002778: 4770 bx lr
|
|
800277a: bf00 nop
|
|
800277c: 080026d9 .word 0x080026d9
|
|
|
|
08002780 <SVC_Handler>:
|
|
__asm volatile (
|
|
8002780: 4b07 ldr r3, [pc, #28] @ (80027a0 <pxCurrentTCBConst2>)
|
|
8002782: 6819 ldr r1, [r3, #0]
|
|
8002784: 6808 ldr r0, [r1, #0]
|
|
8002786: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800278a: f380 8809 msr PSP, r0
|
|
800278e: f3bf 8f6f isb sy
|
|
8002792: f04f 0000 mov.w r0, #0
|
|
8002796: f380 8811 msr BASEPRI, r0
|
|
800279a: 4770 bx lr
|
|
800279c: f3af 8000 nop.w
|
|
|
|
080027a0 <pxCurrentTCBConst2>:
|
|
80027a0: 2000019c .word 0x2000019c
|
|
|
|
080027a4 <vPortEnterCritical>:
|
|
80027a4: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80027a8: f383 8811 msr BASEPRI, r3
|
|
80027ac: f3bf 8f6f isb sy
|
|
80027b0: f3bf 8f4f dsb sy
|
|
uxCriticalNesting++;
|
|
80027b4: 4a0b ldr r2, [pc, #44] @ (80027e4 <vPortEnterCritical+0x40>)
|
|
80027b6: 6813 ldr r3, [r2, #0]
|
|
80027b8: 3301 adds r3, #1
|
|
80027ba: 6013 str r3, [r2, #0]
|
|
if( uxCriticalNesting == 1 )
|
|
80027bc: 2b01 cmp r3, #1
|
|
80027be: d000 beq.n 80027c2 <vPortEnterCritical+0x1e>
|
|
}
|
|
80027c0: 4770 bx lr
|
|
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
|
|
80027c2: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80027c6: f8d3 3d04 ldr.w r3, [r3, #3332] @ 0xd04
|
|
80027ca: f013 0fff tst.w r3, #255 @ 0xff
|
|
80027ce: d0f7 beq.n 80027c0 <vPortEnterCritical+0x1c>
|
|
80027d0: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80027d4: f383 8811 msr BASEPRI, r3
|
|
80027d8: f3bf 8f6f isb sy
|
|
80027dc: f3bf 8f4f dsb sy
|
|
80027e0: e7fe b.n 80027e0 <vPortEnterCritical+0x3c>
|
|
80027e2: bf00 nop
|
|
80027e4: 20000008 .word 0x20000008
|
|
|
|
080027e8 <vPortExitCritical>:
|
|
configASSERT( uxCriticalNesting );
|
|
80027e8: 4b09 ldr r3, [pc, #36] @ (8002810 <vPortExitCritical+0x28>)
|
|
80027ea: 681b ldr r3, [r3, #0]
|
|
80027ec: b943 cbnz r3, 8002800 <vPortExitCritical+0x18>
|
|
80027ee: f04f 0350 mov.w r3, #80 @ 0x50
|
|
80027f2: f383 8811 msr BASEPRI, r3
|
|
80027f6: f3bf 8f6f isb sy
|
|
80027fa: f3bf 8f4f dsb sy
|
|
80027fe: e7fe b.n 80027fe <vPortExitCritical+0x16>
|
|
uxCriticalNesting--;
|
|
8002800: 3b01 subs r3, #1
|
|
8002802: 4a03 ldr r2, [pc, #12] @ (8002810 <vPortExitCritical+0x28>)
|
|
8002804: 6013 str r3, [r2, #0]
|
|
if( uxCriticalNesting == 0 )
|
|
8002806: b90b cbnz r3, 800280c <vPortExitCritical+0x24>
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
|
|
{
|
|
__asm volatile
|
|
8002808: f383 8811 msr BASEPRI, r3
|
|
}
|
|
800280c: 4770 bx lr
|
|
800280e: bf00 nop
|
|
8002810: 20000008 .word 0x20000008
|
|
...
|
|
|
|
08002820 <PendSV_Handler>:
|
|
__asm volatile
|
|
8002820: f3ef 8009 mrs r0, PSP
|
|
8002824: f3bf 8f6f isb sy
|
|
8002828: 4b15 ldr r3, [pc, #84] @ (8002880 <pxCurrentTCBConst>)
|
|
800282a: 681a ldr r2, [r3, #0]
|
|
800282c: f01e 0f10 tst.w lr, #16
|
|
8002830: bf08 it eq
|
|
8002832: ed20 8a10 vstmdbeq r0!, {s16-s31}
|
|
8002836: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800283a: 6010 str r0, [r2, #0]
|
|
800283c: e92d 0009 stmdb sp!, {r0, r3}
|
|
8002840: f04f 0050 mov.w r0, #80 @ 0x50
|
|
8002844: f380 8811 msr BASEPRI, r0
|
|
8002848: f3bf 8f4f dsb sy
|
|
800284c: f3bf 8f6f isb sy
|
|
8002850: f7ff feea bl 8002628 <vTaskSwitchContext>
|
|
8002854: f04f 0000 mov.w r0, #0
|
|
8002858: f380 8811 msr BASEPRI, r0
|
|
800285c: bc09 pop {r0, r3}
|
|
800285e: 6819 ldr r1, [r3, #0]
|
|
8002860: 6808 ldr r0, [r1, #0]
|
|
8002862: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8002866: f01e 0f10 tst.w lr, #16
|
|
800286a: bf08 it eq
|
|
800286c: ecb0 8a10 vldmiaeq r0!, {s16-s31}
|
|
8002870: f380 8809 msr PSP, r0
|
|
8002874: f3bf 8f6f isb sy
|
|
8002878: 4770 bx lr
|
|
800287a: bf00 nop
|
|
800287c: f3af 8000 nop.w
|
|
|
|
08002880 <pxCurrentTCBConst>:
|
|
8002880: 2000019c .word 0x2000019c
|
|
|
|
08002884 <xPortSysTickHandler>:
|
|
{
|
|
8002884: b508 push {r3, lr}
|
|
__asm volatile
|
|
8002886: f04f 0350 mov.w r3, #80 @ 0x50
|
|
800288a: f383 8811 msr BASEPRI, r3
|
|
800288e: f3bf 8f6f isb sy
|
|
8002892: f3bf 8f4f dsb sy
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
8002896: f7ff fd4b bl 8002330 <xTaskIncrementTick>
|
|
800289a: b128 cbz r0, 80028a8 <xPortSysTickHandler+0x24>
|
|
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
|
800289c: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80028a0: f04f 5280 mov.w r2, #268435456 @ 0x10000000
|
|
80028a4: f8c3 2d04 str.w r2, [r3, #3332] @ 0xd04
|
|
__asm volatile
|
|
80028a8: 2300 movs r3, #0
|
|
80028aa: f383 8811 msr BASEPRI, r3
|
|
}
|
|
80028ae: bd08 pop {r3, pc}
|
|
|
|
080028b0 <vPortSetupTimerInterrupt>:
|
|
portNVIC_SYSTICK_CTRL_REG = 0UL;
|
|
80028b0: f04f 22e0 mov.w r2, #3758153728 @ 0xe000e000
|
|
80028b4: 2300 movs r3, #0
|
|
80028b6: 6113 str r3, [r2, #16]
|
|
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
|
80028b8: 6193 str r3, [r2, #24]
|
|
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
|
80028ba: 4b05 ldr r3, [pc, #20] @ (80028d0 <vPortSetupTimerInterrupt+0x20>)
|
|
80028bc: 681b ldr r3, [r3, #0]
|
|
80028be: 4905 ldr r1, [pc, #20] @ (80028d4 <vPortSetupTimerInterrupt+0x24>)
|
|
80028c0: fba1 1303 umull r1, r3, r1, r3
|
|
80028c4: 099b lsrs r3, r3, #6
|
|
80028c6: 3b01 subs r3, #1
|
|
80028c8: 6153 str r3, [r2, #20]
|
|
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
|
80028ca: 2307 movs r3, #7
|
|
80028cc: 6113 str r3, [r2, #16]
|
|
}
|
|
80028ce: 4770 bx lr
|
|
80028d0: 20000028 .word 0x20000028
|
|
80028d4: 10624dd3 .word 0x10624dd3
|
|
|
|
080028d8 <xPortStartScheduler>:
|
|
configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
|
|
80028d8: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80028dc: f8d3 2d00 ldr.w r2, [r3, #3328] @ 0xd00
|
|
80028e0: 4b3d ldr r3, [pc, #244] @ (80029d8 <xPortStartScheduler+0x100>)
|
|
80028e2: 429a cmp r2, r3
|
|
80028e4: d01b beq.n 800291e <xPortStartScheduler+0x46>
|
|
configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
|
|
80028e6: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
80028ea: f8d3 2d00 ldr.w r2, [r3, #3328] @ 0xd00
|
|
80028ee: 4b3b ldr r3, [pc, #236] @ (80029dc <xPortStartScheduler+0x104>)
|
|
80028f0: 429a cmp r2, r3
|
|
80028f2: d01d beq.n 8002930 <xPortStartScheduler+0x58>
|
|
{
|
|
80028f4: b530 push {r4, r5, lr}
|
|
80028f6: b083 sub sp, #12
|
|
ulOriginalPriority = *pucFirstUserPriorityRegister;
|
|
80028f8: 4b39 ldr r3, [pc, #228] @ (80029e0 <xPortStartScheduler+0x108>)
|
|
80028fa: 781a ldrb r2, [r3, #0]
|
|
80028fc: b2d2 uxtb r2, r2
|
|
80028fe: 9201 str r2, [sp, #4]
|
|
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
|
|
8002900: 22ff movs r2, #255 @ 0xff
|
|
8002902: 701a strb r2, [r3, #0]
|
|
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
|
|
8002904: 781b ldrb r3, [r3, #0]
|
|
8002906: b2db uxtb r3, r3
|
|
8002908: f88d 3003 strb.w r3, [sp, #3]
|
|
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
|
|
800290c: f89d 3003 ldrb.w r3, [sp, #3]
|
|
8002910: f003 0350 and.w r3, r3, #80 @ 0x50
|
|
8002914: 4a33 ldr r2, [pc, #204] @ (80029e4 <xPortStartScheduler+0x10c>)
|
|
8002916: 7013 strb r3, [r2, #0]
|
|
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
|
|
8002918: 2307 movs r3, #7
|
|
800291a: 6053 str r3, [r2, #4]
|
|
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
|
|
800291c: e01b b.n 8002956 <xPortStartScheduler+0x7e>
|
|
__asm volatile
|
|
800291e: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002922: f383 8811 msr BASEPRI, r3
|
|
8002926: f3bf 8f6f isb sy
|
|
800292a: f3bf 8f4f dsb sy
|
|
configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
|
|
800292e: e7fe b.n 800292e <xPortStartScheduler+0x56>
|
|
8002930: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002934: f383 8811 msr BASEPRI, r3
|
|
8002938: f3bf 8f6f isb sy
|
|
800293c: f3bf 8f4f dsb sy
|
|
configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
|
|
8002940: e7fe b.n 8002940 <xPortStartScheduler+0x68>
|
|
ulMaxPRIGROUPValue--;
|
|
8002942: 4a28 ldr r2, [pc, #160] @ (80029e4 <xPortStartScheduler+0x10c>)
|
|
8002944: 6853 ldr r3, [r2, #4]
|
|
8002946: 3b01 subs r3, #1
|
|
8002948: 6053 str r3, [r2, #4]
|
|
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
|
|
800294a: f89d 3003 ldrb.w r3, [sp, #3]
|
|
800294e: 005b lsls r3, r3, #1
|
|
8002950: b2db uxtb r3, r3
|
|
8002952: f88d 3003 strb.w r3, [sp, #3]
|
|
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
|
|
8002956: f89d 3003 ldrb.w r3, [sp, #3]
|
|
800295a: f013 0f80 tst.w r3, #128 @ 0x80
|
|
800295e: d1f0 bne.n 8002942 <xPortStartScheduler+0x6a>
|
|
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
|
|
8002960: 4b20 ldr r3, [pc, #128] @ (80029e4 <xPortStartScheduler+0x10c>)
|
|
8002962: 685b ldr r3, [r3, #4]
|
|
8002964: 2b03 cmp r3, #3
|
|
8002966: d008 beq.n 800297a <xPortStartScheduler+0xa2>
|
|
8002968: f04f 0350 mov.w r3, #80 @ 0x50
|
|
800296c: f383 8811 msr BASEPRI, r3
|
|
8002970: f3bf 8f6f isb sy
|
|
8002974: f3bf 8f4f dsb sy
|
|
8002978: e7fe b.n 8002978 <xPortStartScheduler+0xa0>
|
|
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
|
|
800297a: 021b lsls r3, r3, #8
|
|
800297c: 4a19 ldr r2, [pc, #100] @ (80029e4 <xPortStartScheduler+0x10c>)
|
|
800297e: 6053 str r3, [r2, #4]
|
|
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
|
|
8002980: f403 63e0 and.w r3, r3, #1792 @ 0x700
|
|
8002984: 6053 str r3, [r2, #4]
|
|
*pucFirstUserPriorityRegister = ulOriginalPriority;
|
|
8002986: 9b01 ldr r3, [sp, #4]
|
|
8002988: b2db uxtb r3, r3
|
|
800298a: 4a15 ldr r2, [pc, #84] @ (80029e0 <xPortStartScheduler+0x108>)
|
|
800298c: 7013 strb r3, [r2, #0]
|
|
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
|
800298e: f04f 24e0 mov.w r4, #3758153728 @ 0xe000e000
|
|
8002992: f8d4 3d20 ldr.w r3, [r4, #3360] @ 0xd20
|
|
8002996: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
|
|
800299a: f8c4 3d20 str.w r3, [r4, #3360] @ 0xd20
|
|
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
|
800299e: f8d4 3d20 ldr.w r3, [r4, #3360] @ 0xd20
|
|
80029a2: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000
|
|
80029a6: f8c4 3d20 str.w r3, [r4, #3360] @ 0xd20
|
|
vPortSetupTimerInterrupt();
|
|
80029aa: f7ff ff81 bl 80028b0 <vPortSetupTimerInterrupt>
|
|
uxCriticalNesting = 0;
|
|
80029ae: 2500 movs r5, #0
|
|
80029b0: 4b0d ldr r3, [pc, #52] @ (80029e8 <xPortStartScheduler+0x110>)
|
|
80029b2: 601d str r5, [r3, #0]
|
|
vPortEnableVFP();
|
|
80029b4: f7ff fec4 bl 8002740 <vPortEnableVFP>
|
|
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
|
|
80029b8: f8d4 3f34 ldr.w r3, [r4, #3892] @ 0xf34
|
|
80029bc: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000
|
|
80029c0: f8c4 3f34 str.w r3, [r4, #3892] @ 0xf34
|
|
prvPortStartFirstTask();
|
|
80029c4: f7ff fea8 bl 8002718 <prvPortStartFirstTask>
|
|
vTaskSwitchContext();
|
|
80029c8: f7ff fe2e bl 8002628 <vTaskSwitchContext>
|
|
prvTaskExitError();
|
|
80029cc: f7ff fe84 bl 80026d8 <prvTaskExitError>
|
|
}
|
|
80029d0: 4628 mov r0, r5
|
|
80029d2: b003 add sp, #12
|
|
80029d4: bd30 pop {r4, r5, pc}
|
|
80029d6: bf00 nop
|
|
80029d8: 410fc271 .word 0x410fc271
|
|
80029dc: 410fc270 .word 0x410fc270
|
|
80029e0: e000e400 .word 0xe000e400
|
|
80029e4: 200001c8 .word 0x200001c8
|
|
80029e8: 20000008 .word 0x20000008
|
|
|
|
080029ec <prvHeapInit>:
|
|
uint8_t *pucAlignedHeap;
|
|
size_t uxAddress;
|
|
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
|
|
|
|
/* Ensure the heap starts on a correctly aligned boundary. */
|
|
uxAddress = ( size_t ) ucHeap;
|
|
80029ec: 4a10 ldr r2, [pc, #64] @ (8002a30 <prvHeapInit+0x44>)
|
|
|
|
if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
|
|
80029ee: f012 0f07 tst.w r2, #7
|
|
80029f2: d01a beq.n 8002a2a <prvHeapInit+0x3e>
|
|
{
|
|
uxAddress += ( portBYTE_ALIGNMENT - 1 );
|
|
80029f4: 1dd1 adds r1, r2, #7
|
|
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
|
|
80029f6: f021 0107 bic.w r1, r1, #7
|
|
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
|
|
80029fa: f5c1 5370 rsb r3, r1, #15360 @ 0x3c00
|
|
80029fe: 4413 add r3, r2
|
|
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
|
|
8002a00: 460a mov r2, r1
|
|
|
|
pucAlignedHeap = ( uint8_t * ) uxAddress;
|
|
|
|
/* xStart is used to hold a pointer to the first item in the list of free
|
|
blocks. The void cast is used to prevent compiler warnings. */
|
|
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
|
|
8002a02: 490c ldr r1, [pc, #48] @ (8002a34 <prvHeapInit+0x48>)
|
|
8002a04: 600a str r2, [r1, #0]
|
|
xStart.xBlockSize = ( size_t ) 0;
|
|
8002a06: 2000 movs r0, #0
|
|
8002a08: 6048 str r0, [r1, #4]
|
|
|
|
/* pxEnd is used to mark the end of the list of free blocks and is inserted
|
|
at the end of the heap space. */
|
|
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
|
|
8002a0a: 4413 add r3, r2
|
|
uxAddress -= xHeapStructSize;
|
|
8002a0c: 3b08 subs r3, #8
|
|
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
|
|
8002a0e: f023 0307 bic.w r3, r3, #7
|
|
pxEnd = ( void * ) uxAddress;
|
|
8002a12: 608b str r3, [r1, #8]
|
|
pxEnd->xBlockSize = 0;
|
|
8002a14: 6058 str r0, [r3, #4]
|
|
pxEnd->pxNextFreeBlock = NULL;
|
|
8002a16: 6018 str r0, [r3, #0]
|
|
|
|
/* To start with there is a single free block that is sized to take up the
|
|
entire heap space, minus the space taken by pxEnd. */
|
|
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
|
|
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
|
|
8002a18: 1a98 subs r0, r3, r2
|
|
8002a1a: 6050 str r0, [r2, #4]
|
|
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
|
|
8002a1c: 6013 str r3, [r2, #0]
|
|
|
|
/* Only one block exists - and it covers the entire usable heap space. */
|
|
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
|
|
8002a1e: 60c8 str r0, [r1, #12]
|
|
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
|
|
8002a20: 6108 str r0, [r1, #16]
|
|
|
|
/* Work out the position of the top bit in a size_t variable. */
|
|
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
|
|
8002a22: f04f 4300 mov.w r3, #2147483648 @ 0x80000000
|
|
8002a26: 614b str r3, [r1, #20]
|
|
}
|
|
8002a28: 4770 bx lr
|
|
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
|
|
8002a2a: f44f 5370 mov.w r3, #15360 @ 0x3c00
|
|
8002a2e: e7e8 b.n 8002a02 <prvHeapInit+0x16>
|
|
8002a30: 200001f0 .word 0x200001f0
|
|
8002a34: 200001d0 .word 0x200001d0
|
|
|
|
08002a38 <prvInsertBlockIntoFreeList>:
|
|
BlockLink_t *pxIterator;
|
|
uint8_t *puc;
|
|
|
|
/* Iterate through the list until a block is found that has a higher address
|
|
than the block being inserted. */
|
|
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
|
|
8002a38: 4b16 ldr r3, [pc, #88] @ (8002a94 <prvInsertBlockIntoFreeList+0x5c>)
|
|
8002a3a: 461a mov r2, r3
|
|
8002a3c: 681b ldr r3, [r3, #0]
|
|
8002a3e: 4283 cmp r3, r0
|
|
8002a40: d3fb bcc.n 8002a3a <prvInsertBlockIntoFreeList+0x2>
|
|
}
|
|
|
|
/* Do the block being inserted, and the block it is being inserted after
|
|
make a contiguous block of memory? */
|
|
puc = ( uint8_t * ) pxIterator;
|
|
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
|
|
8002a42: 6851 ldr r1, [r2, #4]
|
|
8002a44: eb02 0c01 add.w ip, r2, r1
|
|
8002a48: 4584 cmp ip, r0
|
|
8002a4a: d009 beq.n 8002a60 <prvInsertBlockIntoFreeList+0x28>
|
|
}
|
|
|
|
/* Do the block being inserted, and the block it is being inserted before
|
|
make a contiguous block of memory? */
|
|
puc = ( uint8_t * ) pxBlockToInsert;
|
|
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
|
|
8002a4c: 6841 ldr r1, [r0, #4]
|
|
8002a4e: eb00 0c01 add.w ip, r0, r1
|
|
8002a52: 4563 cmp r3, ip
|
|
8002a54: d009 beq.n 8002a6a <prvInsertBlockIntoFreeList+0x32>
|
|
pxBlockToInsert->pxNextFreeBlock = pxEnd;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
|
8002a56: 6003 str r3, [r0, #0]
|
|
|
|
/* If the block being inserted plugged a gab, so was merged with the block
|
|
before and the block after, then it's pxNextFreeBlock pointer will have
|
|
already been set, and should not be set here as that would make it point
|
|
to itself. */
|
|
if( pxIterator != pxBlockToInsert )
|
|
8002a58: 4290 cmp r0, r2
|
|
8002a5a: d019 beq.n 8002a90 <prvInsertBlockIntoFreeList+0x58>
|
|
{
|
|
pxIterator->pxNextFreeBlock = pxBlockToInsert;
|
|
8002a5c: 6010 str r0, [r2, #0]
|
|
}
|
|
else
|
|
{
|
|
mtCOVERAGE_TEST_MARKER();
|
|
8002a5e: 4770 bx lr
|
|
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
|
|
8002a60: 6840 ldr r0, [r0, #4]
|
|
8002a62: 4401 add r1, r0
|
|
8002a64: 6051 str r1, [r2, #4]
|
|
pxBlockToInsert = pxIterator;
|
|
8002a66: 4610 mov r0, r2
|
|
8002a68: e7f0 b.n 8002a4c <prvInsertBlockIntoFreeList+0x14>
|
|
{
|
|
8002a6a: b410 push {r4}
|
|
if( pxIterator->pxNextFreeBlock != pxEnd )
|
|
8002a6c: 4c09 ldr r4, [pc, #36] @ (8002a94 <prvInsertBlockIntoFreeList+0x5c>)
|
|
8002a6e: 68a4 ldr r4, [r4, #8]
|
|
8002a70: 42a3 cmp r3, r4
|
|
8002a72: d00b beq.n 8002a8c <prvInsertBlockIntoFreeList+0x54>
|
|
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
|
|
8002a74: 685b ldr r3, [r3, #4]
|
|
8002a76: 4419 add r1, r3
|
|
8002a78: 6041 str r1, [r0, #4]
|
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
|
|
8002a7a: 6813 ldr r3, [r2, #0]
|
|
8002a7c: 681b ldr r3, [r3, #0]
|
|
8002a7e: 6003 str r3, [r0, #0]
|
|
if( pxIterator != pxBlockToInsert )
|
|
8002a80: 4290 cmp r0, r2
|
|
8002a82: d000 beq.n 8002a86 <prvInsertBlockIntoFreeList+0x4e>
|
|
pxIterator->pxNextFreeBlock = pxBlockToInsert;
|
|
8002a84: 6010 str r0, [r2, #0]
|
|
}
|
|
}
|
|
8002a86: f85d 4b04 ldr.w r4, [sp], #4
|
|
8002a8a: 4770 bx lr
|
|
pxBlockToInsert->pxNextFreeBlock = pxEnd;
|
|
8002a8c: 6004 str r4, [r0, #0]
|
|
8002a8e: e7f7 b.n 8002a80 <prvInsertBlockIntoFreeList+0x48>
|
|
8002a90: 4770 bx lr
|
|
8002a92: bf00 nop
|
|
8002a94: 200001d0 .word 0x200001d0
|
|
|
|
08002a98 <pvPortMalloc>:
|
|
{
|
|
8002a98: b538 push {r3, r4, r5, lr}
|
|
8002a9a: 4604 mov r4, r0
|
|
vTaskSuspendAll();
|
|
8002a9c: f7ff fc38 bl 8002310 <vTaskSuspendAll>
|
|
if( pxEnd == NULL )
|
|
8002aa0: 4b37 ldr r3, [pc, #220] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002aa2: 689b ldr r3, [r3, #8]
|
|
8002aa4: b1b3 cbz r3, 8002ad4 <pvPortMalloc+0x3c>
|
|
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
|
|
8002aa6: 4b36 ldr r3, [pc, #216] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002aa8: 695b ldr r3, [r3, #20]
|
|
8002aaa: 421c tst r4, r3
|
|
8002aac: d14e bne.n 8002b4c <pvPortMalloc+0xb4>
|
|
if( xWantedSize > 0 )
|
|
8002aae: 2c00 cmp r4, #0
|
|
8002ab0: d04e beq.n 8002b50 <pvPortMalloc+0xb8>
|
|
xWantedSize += xHeapStructSize;
|
|
8002ab2: f104 0208 add.w r2, r4, #8
|
|
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
|
|
8002ab6: f014 0f07 tst.w r4, #7
|
|
8002aba: d002 beq.n 8002ac2 <pvPortMalloc+0x2a>
|
|
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
|
|
8002abc: f022 0207 bic.w r2, r2, #7
|
|
8002ac0: 3208 adds r2, #8
|
|
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
|
|
8002ac2: 2a00 cmp r2, #0
|
|
8002ac4: d053 beq.n 8002b6e <pvPortMalloc+0xd6>
|
|
8002ac6: 4b2e ldr r3, [pc, #184] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002ac8: 691b ldr r3, [r3, #16]
|
|
8002aca: 4293 cmp r3, r2
|
|
8002acc: d351 bcc.n 8002b72 <pvPortMalloc+0xda>
|
|
pxBlock = xStart.pxNextFreeBlock;
|
|
8002ace: 492c ldr r1, [pc, #176] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002ad0: 680c ldr r4, [r1, #0]
|
|
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
|
|
8002ad2: e004 b.n 8002ade <pvPortMalloc+0x46>
|
|
prvHeapInit();
|
|
8002ad4: f7ff ff8a bl 80029ec <prvHeapInit>
|
|
8002ad8: e7e5 b.n 8002aa6 <pvPortMalloc+0xe>
|
|
pxPreviousBlock = pxBlock;
|
|
8002ada: 4621 mov r1, r4
|
|
pxBlock = pxBlock->pxNextFreeBlock;
|
|
8002adc: 461c mov r4, r3
|
|
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
|
|
8002ade: 6863 ldr r3, [r4, #4]
|
|
8002ae0: 4293 cmp r3, r2
|
|
8002ae2: d202 bcs.n 8002aea <pvPortMalloc+0x52>
|
|
8002ae4: 6823 ldr r3, [r4, #0]
|
|
8002ae6: 2b00 cmp r3, #0
|
|
8002ae8: d1f7 bne.n 8002ada <pvPortMalloc+0x42>
|
|
if( pxBlock != pxEnd )
|
|
8002aea: 4b25 ldr r3, [pc, #148] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002aec: 689b ldr r3, [r3, #8]
|
|
8002aee: 42a3 cmp r3, r4
|
|
8002af0: d041 beq.n 8002b76 <pvPortMalloc+0xde>
|
|
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
|
|
8002af2: 680d ldr r5, [r1, #0]
|
|
8002af4: 3508 adds r5, #8
|
|
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
|
|
8002af6: 6823 ldr r3, [r4, #0]
|
|
8002af8: 600b str r3, [r1, #0]
|
|
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
|
|
8002afa: 6863 ldr r3, [r4, #4]
|
|
8002afc: 1a9b subs r3, r3, r2
|
|
8002afe: 2b10 cmp r3, #16
|
|
8002b00: d910 bls.n 8002b24 <pvPortMalloc+0x8c>
|
|
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
|
|
8002b02: 18a0 adds r0, r4, r2
|
|
configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
|
|
8002b04: f010 0f07 tst.w r0, #7
|
|
8002b08: d008 beq.n 8002b1c <pvPortMalloc+0x84>
|
|
8002b0a: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002b0e: f383 8811 msr BASEPRI, r3
|
|
8002b12: f3bf 8f6f isb sy
|
|
8002b16: f3bf 8f4f dsb sy
|
|
8002b1a: e7fe b.n 8002b1a <pvPortMalloc+0x82>
|
|
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
|
|
8002b1c: 6043 str r3, [r0, #4]
|
|
pxBlock->xBlockSize = xWantedSize;
|
|
8002b1e: 6062 str r2, [r4, #4]
|
|
prvInsertBlockIntoFreeList( pxNewBlockLink );
|
|
8002b20: f7ff ff8a bl 8002a38 <prvInsertBlockIntoFreeList>
|
|
xFreeBytesRemaining -= pxBlock->xBlockSize;
|
|
8002b24: 6861 ldr r1, [r4, #4]
|
|
8002b26: 4a16 ldr r2, [pc, #88] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002b28: 6913 ldr r3, [r2, #16]
|
|
8002b2a: 1a5b subs r3, r3, r1
|
|
8002b2c: 6113 str r3, [r2, #16]
|
|
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
|
|
8002b2e: 68d2 ldr r2, [r2, #12]
|
|
8002b30: 4293 cmp r3, r2
|
|
8002b32: d201 bcs.n 8002b38 <pvPortMalloc+0xa0>
|
|
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
|
|
8002b34: 4a12 ldr r2, [pc, #72] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002b36: 60d3 str r3, [r2, #12]
|
|
pxBlock->xBlockSize |= xBlockAllocatedBit;
|
|
8002b38: 4b11 ldr r3, [pc, #68] @ (8002b80 <pvPortMalloc+0xe8>)
|
|
8002b3a: 695a ldr r2, [r3, #20]
|
|
8002b3c: 430a orrs r2, r1
|
|
8002b3e: 6062 str r2, [r4, #4]
|
|
pxBlock->pxNextFreeBlock = NULL;
|
|
8002b40: 2200 movs r2, #0
|
|
8002b42: 6022 str r2, [r4, #0]
|
|
xNumberOfSuccessfulAllocations++;
|
|
8002b44: 699a ldr r2, [r3, #24]
|
|
8002b46: 3201 adds r2, #1
|
|
8002b48: 619a str r2, [r3, #24]
|
|
8002b4a: e002 b.n 8002b52 <pvPortMalloc+0xba>
|
|
void *pvReturn = NULL;
|
|
8002b4c: 2500 movs r5, #0
|
|
8002b4e: e000 b.n 8002b52 <pvPortMalloc+0xba>
|
|
8002b50: 2500 movs r5, #0
|
|
( void ) xTaskResumeAll();
|
|
8002b52: f7ff fc79 bl 8002448 <xTaskResumeAll>
|
|
configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
|
|
8002b56: f015 0f07 tst.w r5, #7
|
|
8002b5a: d00e beq.n 8002b7a <pvPortMalloc+0xe2>
|
|
8002b5c: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002b60: f383 8811 msr BASEPRI, r3
|
|
8002b64: f3bf 8f6f isb sy
|
|
8002b68: f3bf 8f4f dsb sy
|
|
8002b6c: e7fe b.n 8002b6c <pvPortMalloc+0xd4>
|
|
void *pvReturn = NULL;
|
|
8002b6e: 2500 movs r5, #0
|
|
8002b70: e7ef b.n 8002b52 <pvPortMalloc+0xba>
|
|
8002b72: 2500 movs r5, #0
|
|
8002b74: e7ed b.n 8002b52 <pvPortMalloc+0xba>
|
|
8002b76: 2500 movs r5, #0
|
|
8002b78: e7eb b.n 8002b52 <pvPortMalloc+0xba>
|
|
}
|
|
8002b7a: 4628 mov r0, r5
|
|
8002b7c: bd38 pop {r3, r4, r5, pc}
|
|
8002b7e: bf00 nop
|
|
8002b80: 200001d0 .word 0x200001d0
|
|
|
|
08002b84 <vPortFree>:
|
|
if( pv != NULL )
|
|
8002b84: b398 cbz r0, 8002bee <vPortFree+0x6a>
|
|
{
|
|
8002b86: b538 push {r3, r4, r5, lr}
|
|
8002b88: 4604 mov r4, r0
|
|
puc -= xHeapStructSize;
|
|
8002b8a: f1a0 0508 sub.w r5, r0, #8
|
|
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
|
|
8002b8e: f850 3c04 ldr.w r3, [r0, #-4]
|
|
8002b92: 4a17 ldr r2, [pc, #92] @ (8002bf0 <vPortFree+0x6c>)
|
|
8002b94: 6952 ldr r2, [r2, #20]
|
|
8002b96: 4213 tst r3, r2
|
|
8002b98: d108 bne.n 8002bac <vPortFree+0x28>
|
|
8002b9a: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002b9e: f383 8811 msr BASEPRI, r3
|
|
8002ba2: f3bf 8f6f isb sy
|
|
8002ba6: f3bf 8f4f dsb sy
|
|
8002baa: e7fe b.n 8002baa <vPortFree+0x26>
|
|
configASSERT( pxLink->pxNextFreeBlock == NULL );
|
|
8002bac: f850 1c08 ldr.w r1, [r0, #-8]
|
|
8002bb0: b141 cbz r1, 8002bc4 <vPortFree+0x40>
|
|
8002bb2: f04f 0350 mov.w r3, #80 @ 0x50
|
|
8002bb6: f383 8811 msr BASEPRI, r3
|
|
8002bba: f3bf 8f6f isb sy
|
|
8002bbe: f3bf 8f4f dsb sy
|
|
8002bc2: e7fe b.n 8002bc2 <vPortFree+0x3e>
|
|
pxLink->xBlockSize &= ~xBlockAllocatedBit;
|
|
8002bc4: ea23 0302 bic.w r3, r3, r2
|
|
8002bc8: f840 3c04 str.w r3, [r0, #-4]
|
|
vTaskSuspendAll();
|
|
8002bcc: f7ff fba0 bl 8002310 <vTaskSuspendAll>
|
|
xFreeBytesRemaining += pxLink->xBlockSize;
|
|
8002bd0: f854 2c04 ldr.w r2, [r4, #-4]
|
|
8002bd4: 4c06 ldr r4, [pc, #24] @ (8002bf0 <vPortFree+0x6c>)
|
|
8002bd6: 6923 ldr r3, [r4, #16]
|
|
8002bd8: 4413 add r3, r2
|
|
8002bda: 6123 str r3, [r4, #16]
|
|
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
|
|
8002bdc: 4628 mov r0, r5
|
|
8002bde: f7ff ff2b bl 8002a38 <prvInsertBlockIntoFreeList>
|
|
xNumberOfSuccessfulFrees++;
|
|
8002be2: 69e3 ldr r3, [r4, #28]
|
|
8002be4: 3301 adds r3, #1
|
|
8002be6: 61e3 str r3, [r4, #28]
|
|
( void ) xTaskResumeAll();
|
|
8002be8: f7ff fc2e bl 8002448 <xTaskResumeAll>
|
|
}
|
|
8002bec: bd38 pop {r3, r4, r5, pc}
|
|
8002bee: 4770 bx lr
|
|
8002bf0: 200001d0 .word 0x200001d0
|
|
|
|
08002bf4 <StartDefaultTask>:
|
|
* @param argument: Not used
|
|
* @retval None
|
|
*/
|
|
/* USER CODE END Header_StartDefaultTask */
|
|
void StartDefaultTask(void const * argument)
|
|
{
|
|
8002bf4: b508 push {r3, lr}
|
|
/* USER CODE BEGIN StartDefaultTask */
|
|
/* Infinite loop */
|
|
for(;;)
|
|
{
|
|
osDelay(1);
|
|
8002bf6: 2001 movs r0, #1
|
|
8002bf8: f7ff f925 bl 8001e46 <osDelay>
|
|
for(;;)
|
|
8002bfc: e7fb b.n 8002bf6 <StartDefaultTask+0x2>
|
|
...
|
|
|
|
08002c00 <vApplicationGetIdleTaskMemory>:
|
|
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
|
|
8002c00: 4b03 ldr r3, [pc, #12] @ (8002c10 <vApplicationGetIdleTaskMemory+0x10>)
|
|
8002c02: 6003 str r3, [r0, #0]
|
|
*ppxIdleTaskStackBuffer = &xIdleStack[0];
|
|
8002c04: 3354 adds r3, #84 @ 0x54
|
|
8002c06: 600b str r3, [r1, #0]
|
|
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
|
|
8002c08: 2380 movs r3, #128 @ 0x80
|
|
8002c0a: 6013 str r3, [r2, #0]
|
|
}
|
|
8002c0c: 4770 bx lr
|
|
8002c0e: bf00 nop
|
|
8002c10: 20003df0 .word 0x20003df0
|
|
|
|
08002c14 <MX_FREERTOS_Init>:
|
|
void MX_FREERTOS_Init(void) {
|
|
8002c14: b510 push {r4, lr}
|
|
8002c16: b088 sub sp, #32
|
|
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
|
|
8002c18: f10d 0c04 add.w ip, sp, #4
|
|
8002c1c: 4c08 ldr r4, [pc, #32] @ (8002c40 <MX_FREERTOS_Init+0x2c>)
|
|
8002c1e: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
8002c20: e8ac 000f stmia.w ip!, {r0, r1, r2, r3}
|
|
8002c24: e894 0007 ldmia.w r4, {r0, r1, r2}
|
|
8002c28: e88c 0007 stmia.w ip, {r0, r1, r2}
|
|
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
|
|
8002c2c: 2100 movs r1, #0
|
|
8002c2e: a801 add r0, sp, #4
|
|
8002c30: f7ff f8d6 bl 8001de0 <osThreadCreate>
|
|
8002c34: 4b03 ldr r3, [pc, #12] @ (8002c44 <MX_FREERTOS_Init+0x30>)
|
|
8002c36: f8c3 0254 str.w r0, [r3, #596] @ 0x254
|
|
}
|
|
8002c3a: b008 add sp, #32
|
|
8002c3c: bd10 pop {r4, pc}
|
|
8002c3e: bf00 nop
|
|
8002c40: 08007ebc .word 0x08007ebc
|
|
8002c44: 20003df0 .word 0x20003df0
|
|
|
|
08002c48 <clampi>:
|
|
}
|
|
|
|
// ===================== Utils =====================
|
|
static int clampi(int v, int lo, int hi)
|
|
{
|
|
if (v < lo) return lo;
|
|
8002c48: 4288 cmp r0, r1
|
|
8002c4a: db02 blt.n 8002c52 <clampi+0xa>
|
|
if (v > hi) return hi;
|
|
8002c4c: 4290 cmp r0, r2
|
|
8002c4e: dc02 bgt.n 8002c56 <clampi+0xe>
|
|
8002c50: 4770 bx lr
|
|
if (v < lo) return lo;
|
|
8002c52: 4608 mov r0, r1
|
|
8002c54: 4770 bx lr
|
|
if (v > hi) return hi;
|
|
8002c56: 4610 mov r0, r2
|
|
return v;
|
|
}
|
|
8002c58: 4770 bx lr
|
|
...
|
|
|
|
08002c5c <terrain_generate>:
|
|
static void terrain_generate(void)
|
|
{
|
|
int y = 50;
|
|
uint32_t s = 1234567u;
|
|
|
|
for (int x = 0; x < OLED_W; x++) {
|
|
8002c5c: 2100 movs r1, #0
|
|
uint32_t s = 1234567u;
|
|
8002c5e: 4813 ldr r0, [pc, #76] @ (8002cac <terrain_generate+0x50>)
|
|
int y = 50;
|
|
8002c60: 2332 movs r3, #50 @ 0x32
|
|
for (int x = 0; x < OLED_W; x++) {
|
|
8002c62: 297f cmp r1, #127 @ 0x7f
|
|
8002c64: dc21 bgt.n 8002caa <terrain_generate+0x4e>
|
|
{
|
|
8002c66: b410 push {r4}
|
|
8002c68: e00b b.n 8002c82 <terrain_generate+0x26>
|
|
s = s * 1103515245u + 12345u;
|
|
int n = (int)((s >> 28) & 0x0F) - 7; // [-7..8]
|
|
y += (n > 0 ? 1 : (n < 0 ? -1 : 0));
|
|
8002c6a: db01 blt.n 8002c70 <terrain_generate+0x14>
|
|
8002c6c: 2200 movs r2, #0
|
|
8002c6e: e012 b.n 8002c96 <terrain_generate+0x3a>
|
|
8002c70: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8002c74: e00f b.n 8002c96 <terrain_generate+0x3a>
|
|
if (y < 35) y = 35;
|
|
8002c76: 2323 movs r3, #35 @ 0x23
|
|
if (y > 58) y = 58;
|
|
ground_y[x] = (uint8_t)y;
|
|
8002c78: 4a0d ldr r2, [pc, #52] @ (8002cb0 <terrain_generate+0x54>)
|
|
8002c7a: 5453 strb r3, [r2, r1]
|
|
for (int x = 0; x < OLED_W; x++) {
|
|
8002c7c: 3101 adds r1, #1
|
|
8002c7e: 297f cmp r1, #127 @ 0x7f
|
|
8002c80: dc10 bgt.n 8002ca4 <terrain_generate+0x48>
|
|
s = s * 1103515245u + 12345u;
|
|
8002c82: 4c0c ldr r4, [pc, #48] @ (8002cb4 <terrain_generate+0x58>)
|
|
8002c84: f243 0239 movw r2, #12345 @ 0x3039
|
|
8002c88: fb04 2000 mla r0, r4, r0, r2
|
|
int n = (int)((s >> 28) & 0x0F) - 7; // [-7..8]
|
|
8002c8c: 0f02 lsrs r2, r0, #28
|
|
8002c8e: 3a07 subs r2, #7
|
|
y += (n > 0 ? 1 : (n < 0 ? -1 : 0));
|
|
8002c90: 2a00 cmp r2, #0
|
|
8002c92: ddea ble.n 8002c6a <terrain_generate+0xe>
|
|
8002c94: 2201 movs r2, #1
|
|
8002c96: 4413 add r3, r2
|
|
if (y < 35) y = 35;
|
|
8002c98: 2b22 cmp r3, #34 @ 0x22
|
|
8002c9a: ddec ble.n 8002c76 <terrain_generate+0x1a>
|
|
if (y > 58) y = 58;
|
|
8002c9c: 2b3a cmp r3, #58 @ 0x3a
|
|
8002c9e: ddeb ble.n 8002c78 <terrain_generate+0x1c>
|
|
8002ca0: 233a movs r3, #58 @ 0x3a
|
|
8002ca2: e7e9 b.n 8002c78 <terrain_generate+0x1c>
|
|
}
|
|
}
|
|
8002ca4: f85d 4b04 ldr.w r4, [sp], #4
|
|
8002ca8: 4770 bx lr
|
|
8002caa: 4770 bx lr
|
|
8002cac: 0012d687 .word 0x0012d687
|
|
8002cb0: 20004048 .word 0x20004048
|
|
8002cb4: 41c64e6d .word 0x41c64e6d
|
|
|
|
08002cb8 <place_worm>:
|
|
|
|
static void place_worm(uint8_t id, int x)
|
|
{
|
|
8002cb8: b510 push {r4, lr}
|
|
8002cba: 4604 mov r4, r0
|
|
8002cbc: 4608 mov r0, r1
|
|
x = clampi(x, 2, OLED_W - 3);
|
|
8002cbe: 227d movs r2, #125 @ 0x7d
|
|
8002cc0: 2102 movs r1, #2
|
|
8002cc2: f7ff ffc1 bl 8002c48 <clampi>
|
|
int y = (int)ground_y[x] - 3;
|
|
8002cc6: 4b06 ldr r3, [pc, #24] @ (8002ce0 <place_worm+0x28>)
|
|
8002cc8: 5c1a ldrb r2, [r3, r0]
|
|
8002cca: 3a03 subs r2, #3
|
|
worms[id].x = x;
|
|
8002ccc: eb04 0184 add.w r1, r4, r4, lsl #2
|
|
8002cd0: eb03 0181 add.w r1, r3, r1, lsl #2
|
|
8002cd4: f8c1 0080 str.w r0, [r1, #128] @ 0x80
|
|
worms[id].y = y;
|
|
8002cd8: f8c1 2084 str.w r2, [r1, #132] @ 0x84
|
|
}
|
|
8002cdc: bd10 pop {r4, pc}
|
|
8002cde: bf00 nop
|
|
8002ce0: 20004048 .word 0x20004048
|
|
|
|
08002ce4 <next_player>:
|
|
}
|
|
|
|
// ===================== Game flow =====================
|
|
static void next_player(void)
|
|
{
|
|
current_player ^= 1u;
|
|
8002ce4: 4b08 ldr r3, [pc, #32] @ (8002d08 <next_player+0x24>)
|
|
8002ce6: f893 20a8 ldrb.w r2, [r3, #168] @ 0xa8
|
|
8002cea: f082 0201 eor.w r2, r2, #1
|
|
8002cee: f883 20a8 strb.w r2, [r3, #168] @ 0xa8
|
|
gs = GS_AIM;
|
|
8002cf2: 2200 movs r2, #0
|
|
8002cf4: f883 20a9 strb.w r2, [r3, #169] @ 0xa9
|
|
charge_power = 0.0f;
|
|
8002cf8: 2200 movs r2, #0
|
|
8002cfa: f8c3 20ac str.w r2, [r3, #172] @ 0xac
|
|
charge_dir = 1.0f;
|
|
8002cfe: 4b03 ldr r3, [pc, #12] @ (8002d0c <next_player+0x28>)
|
|
8002d00: f04f 527e mov.w r2, #1065353216 @ 0x3f800000
|
|
8002d04: 601a str r2, [r3, #0]
|
|
}
|
|
8002d06: 4770 bx lr
|
|
8002d08: 20004048 .word 0x20004048
|
|
8002d0c: 20000024 .word 0x20000024
|
|
|
|
08002d10 <update_charge>:
|
|
}
|
|
|
|
static void update_charge(void)
|
|
{
|
|
const float step = 0.035f;
|
|
charge_power += charge_dir * step;
|
|
8002d10: 4b15 ldr r3, [pc, #84] @ (8002d68 <update_charge+0x58>)
|
|
8002d12: edd3 7a00 vldr s15, [r3]
|
|
8002d16: ed9f 7a15 vldr s14, [pc, #84] @ 8002d6c <update_charge+0x5c>
|
|
8002d1a: ee67 7a87 vmul.f32 s15, s15, s14
|
|
8002d1e: 4b14 ldr r3, [pc, #80] @ (8002d70 <update_charge+0x60>)
|
|
8002d20: ed93 7a2b vldr s14, [r3, #172] @ 0xac
|
|
8002d24: ee77 7a87 vadd.f32 s15, s15, s14
|
|
8002d28: edc3 7a2b vstr s15, [r3, #172] @ 0xac
|
|
if (charge_power >= 1.0f) { charge_power = 1.0f; charge_dir = -1.0f; }
|
|
8002d2c: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
|
|
8002d30: eef4 7ac7 vcmpe.f32 s15, s14
|
|
8002d34: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8002d38: db04 blt.n 8002d44 <update_charge+0x34>
|
|
8002d3a: ed83 7a2b vstr s14, [r3, #172] @ 0xac
|
|
8002d3e: 4b0a ldr r3, [pc, #40] @ (8002d68 <update_charge+0x58>)
|
|
8002d40: 4a0c ldr r2, [pc, #48] @ (8002d74 <update_charge+0x64>)
|
|
8002d42: 601a str r2, [r3, #0]
|
|
if (charge_power <= 0.0f) { charge_power = 0.0f; charge_dir = 1.0f; }
|
|
8002d44: 4b0a ldr r3, [pc, #40] @ (8002d70 <update_charge+0x60>)
|
|
8002d46: edd3 7a2b vldr s15, [r3, #172] @ 0xac
|
|
8002d4a: eef5 7ac0 vcmpe.f32 s15, #0.0
|
|
8002d4e: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8002d52: d900 bls.n 8002d56 <update_charge+0x46>
|
|
}
|
|
8002d54: 4770 bx lr
|
|
if (charge_power <= 0.0f) { charge_power = 0.0f; charge_dir = 1.0f; }
|
|
8002d56: 2200 movs r2, #0
|
|
8002d58: f8c3 20ac str.w r2, [r3, #172] @ 0xac
|
|
8002d5c: 4b02 ldr r3, [pc, #8] @ (8002d68 <update_charge+0x58>)
|
|
8002d5e: f04f 527e mov.w r2, #1065353216 @ 0x3f800000
|
|
8002d62: 601a str r2, [r3, #0]
|
|
}
|
|
8002d64: e7f6 b.n 8002d54 <update_charge+0x44>
|
|
8002d66: bf00 nop
|
|
8002d68: 20000024 .word 0x20000024
|
|
8002d6c: 3d0f5c29 .word 0x3d0f5c29
|
|
8002d70: 20004048 .word 0x20004048
|
|
8002d74: bf800000 .word 0xbf800000
|
|
|
|
08002d78 <update_explosion>:
|
|
}
|
|
|
|
}
|
|
|
|
static void update_explosion(void)
|
|
{
|
|
8002d78: b508 push {r3, lr}
|
|
if (expl_r < expl_rmax) {
|
|
8002d7a: 4a0a ldr r2, [pc, #40] @ (8002da4 <update_explosion+0x2c>)
|
|
8002d7c: f892 30b0 ldrb.w r3, [r2, #176] @ 0xb0
|
|
8002d80: f892 20b1 ldrb.w r2, [r2, #177] @ 0xb1
|
|
8002d84: 4293 cmp r3, r2
|
|
8002d86: d209 bcs.n 8002d9c <update_explosion+0x24>
|
|
expl_r += 2;
|
|
8002d88: 3302 adds r3, #2
|
|
8002d8a: b2db uxtb r3, r3
|
|
8002d8c: 4905 ldr r1, [pc, #20] @ (8002da4 <update_explosion+0x2c>)
|
|
8002d8e: f881 30b0 strb.w r3, [r1, #176] @ 0xb0
|
|
if (expl_r > expl_rmax) expl_r = expl_rmax;
|
|
8002d92: 429a cmp r2, r3
|
|
8002d94: d201 bcs.n 8002d9a <update_explosion+0x22>
|
|
8002d96: f881 20b0 strb.w r2, [r1, #176] @ 0xb0
|
|
} else {
|
|
next_player();
|
|
}
|
|
}
|
|
8002d9a: bd08 pop {r3, pc}
|
|
next_player();
|
|
8002d9c: f7ff ffa2 bl 8002ce4 <next_player>
|
|
}
|
|
8002da0: e7fb b.n 8002d9a <update_explosion+0x22>
|
|
8002da2: bf00 nop
|
|
8002da4: 20004048 .word 0x20004048
|
|
|
|
08002da8 <weapon_next>:
|
|
|
|
// ===================== Weapon switching =====================
|
|
static void weapon_next(void)
|
|
{
|
|
Worm *w = &worms[current_player];
|
|
8002da8: 490c ldr r1, [pc, #48] @ (8002ddc <weapon_next+0x34>)
|
|
8002daa: f891 30a8 ldrb.w r3, [r1, #168] @ 0xa8
|
|
w->weapon_id = (uint8_t)((w->weapon_id + 1u) % WEAPON_COUNT);
|
|
8002dae: eb03 0083 add.w r0, r3, r3, lsl #2
|
|
8002db2: 0082 lsls r2, r0, #2
|
|
8002db4: 440a add r2, r1
|
|
8002db6: f892 2090 ldrb.w r2, [r2, #144] @ 0x90
|
|
8002dba: 3201 adds r2, #1
|
|
8002dbc: 4808 ldr r0, [pc, #32] @ (8002de0 <weapon_next+0x38>)
|
|
8002dbe: fba0 c002 umull ip, r0, r0, r2
|
|
8002dc2: f400 7cff and.w ip, r0, #510 @ 0x1fe
|
|
8002dc6: eb0c 0050 add.w r0, ip, r0, lsr #1
|
|
8002dca: 1a12 subs r2, r2, r0
|
|
8002dcc: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
8002dd0: 0098 lsls r0, r3, #2
|
|
8002dd2: 4401 add r1, r0
|
|
8002dd4: f881 2090 strb.w r2, [r1, #144] @ 0x90
|
|
}
|
|
8002dd8: 4770 bx lr
|
|
8002dda: bf00 nop
|
|
8002ddc: 20004048 .word 0x20004048
|
|
8002de0: aaaaaaab .word 0xaaaaaaab
|
|
|
|
08002de4 <weapon_prev>:
|
|
|
|
static void weapon_prev(void)
|
|
{
|
|
Worm *w = &worms[current_player];
|
|
8002de4: 490c ldr r1, [pc, #48] @ (8002e18 <weapon_prev+0x34>)
|
|
8002de6: f891 30a8 ldrb.w r3, [r1, #168] @ 0xa8
|
|
w->weapon_id = (uint8_t)((w->weapon_id + WEAPON_COUNT - 1u) % WEAPON_COUNT);
|
|
8002dea: eb03 0083 add.w r0, r3, r3, lsl #2
|
|
8002dee: 0082 lsls r2, r0, #2
|
|
8002df0: 440a add r2, r1
|
|
8002df2: f892 2090 ldrb.w r2, [r2, #144] @ 0x90
|
|
8002df6: 3202 adds r2, #2
|
|
8002df8: 4808 ldr r0, [pc, #32] @ (8002e1c <weapon_prev+0x38>)
|
|
8002dfa: fba0 c002 umull ip, r0, r0, r2
|
|
8002dfe: f400 7cff and.w ip, r0, #510 @ 0x1fe
|
|
8002e02: eb0c 0050 add.w r0, ip, r0, lsr #1
|
|
8002e06: 1a12 subs r2, r2, r0
|
|
8002e08: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
8002e0c: 0098 lsls r0, r3, #2
|
|
8002e0e: 4401 add r1, r0
|
|
8002e10: f881 2090 strb.w r2, [r1, #144] @ 0x90
|
|
}
|
|
8002e14: 4770 bx lr
|
|
8002e16: bf00 nop
|
|
8002e18: 20004048 .word 0x20004048
|
|
8002e1c: aaaaaaab .word 0xaaaaaaab
|
|
|
|
08002e20 <get_key>:
|
|
{
|
|
8002e20: b508 push {r3, lr}
|
|
k = Check_Row(ROW1);
|
|
8002e22: 20fe movs r0, #254 @ 0xfe
|
|
8002e24: f000 fea4 bl 8003b70 <Check_Row>
|
|
if (k == 0x04) return 1;
|
|
8002e28: 2804 cmp r0, #4
|
|
8002e2a: d021 beq.n 8002e70 <get_key+0x50>
|
|
if (k == 0x02) return 2; // UP
|
|
8002e2c: 2802 cmp r0, #2
|
|
8002e2e: d021 beq.n 8002e74 <get_key+0x54>
|
|
if (k == 0x01) return 3;
|
|
8002e30: 2801 cmp r0, #1
|
|
8002e32: d021 beq.n 8002e78 <get_key+0x58>
|
|
k = Check_Row(ROW2);
|
|
8002e34: 20fd movs r0, #253 @ 0xfd
|
|
8002e36: f000 fe9b bl 8003b70 <Check_Row>
|
|
if (k == 0x04) return 4; // LEFT
|
|
8002e3a: 2804 cmp r0, #4
|
|
8002e3c: d01e beq.n 8002e7c <get_key+0x5c>
|
|
if (k == 0x02) return 5; // FIRE
|
|
8002e3e: 2802 cmp r0, #2
|
|
8002e40: d01e beq.n 8002e80 <get_key+0x60>
|
|
if (k == 0x01) return 6; // RIGHT
|
|
8002e42: 2801 cmp r0, #1
|
|
8002e44: d01e beq.n 8002e84 <get_key+0x64>
|
|
k = Check_Row(ROW3);
|
|
8002e46: 20fb movs r0, #251 @ 0xfb
|
|
8002e48: f000 fe92 bl 8003b70 <Check_Row>
|
|
if (k == 0x04) return 7;
|
|
8002e4c: 2804 cmp r0, #4
|
|
8002e4e: d01b beq.n 8002e88 <get_key+0x68>
|
|
if (k == 0x02) return 8; // DOWN
|
|
8002e50: 2802 cmp r0, #2
|
|
8002e52: d01b beq.n 8002e8c <get_key+0x6c>
|
|
if (k == 0x01) return 9;
|
|
8002e54: 2801 cmp r0, #1
|
|
8002e56: d01b beq.n 8002e90 <get_key+0x70>
|
|
k = Check_Row(ROW4);
|
|
8002e58: 20f7 movs r0, #247 @ 0xf7
|
|
8002e5a: f000 fe89 bl 8003b70 <Check_Row>
|
|
if (k == 0x04) return -1; // *
|
|
8002e5e: 2804 cmp r0, #4
|
|
8002e60: d018 beq.n 8002e94 <get_key+0x74>
|
|
if (k == 0x02) return 0; // 0
|
|
8002e62: 2802 cmp r0, #2
|
|
8002e64: d019 beq.n 8002e9a <get_key+0x7a>
|
|
if (k == 0x01) return -2; // #
|
|
8002e66: 2801 cmp r0, #1
|
|
8002e68: d019 beq.n 8002e9e <get_key+0x7e>
|
|
return -100;
|
|
8002e6a: f06f 0063 mvn.w r0, #99 @ 0x63
|
|
8002e6e: e000 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x04) return 1;
|
|
8002e70: 2001 movs r0, #1
|
|
}
|
|
8002e72: bd08 pop {r3, pc}
|
|
if (k == 0x02) return 2; // UP
|
|
8002e74: 2002 movs r0, #2
|
|
8002e76: e7fc b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x01) return 3;
|
|
8002e78: 2003 movs r0, #3
|
|
8002e7a: e7fa b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x04) return 4; // LEFT
|
|
8002e7c: 2004 movs r0, #4
|
|
8002e7e: e7f8 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x02) return 5; // FIRE
|
|
8002e80: 2005 movs r0, #5
|
|
8002e82: e7f6 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x01) return 6; // RIGHT
|
|
8002e84: 2006 movs r0, #6
|
|
8002e86: e7f4 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x04) return 7;
|
|
8002e88: 2007 movs r0, #7
|
|
8002e8a: e7f2 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x02) return 8; // DOWN
|
|
8002e8c: 2008 movs r0, #8
|
|
8002e8e: e7f0 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x01) return 9;
|
|
8002e90: 2009 movs r0, #9
|
|
8002e92: e7ee b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x04) return -1; // *
|
|
8002e94: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002e98: e7eb b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x02) return 0; // 0
|
|
8002e9a: 2000 movs r0, #0
|
|
8002e9c: e7e9 b.n 8002e72 <get_key+0x52>
|
|
if (k == 0x01) return -2; // #
|
|
8002e9e: f06f 0001 mvn.w r0, #1
|
|
8002ea2: e7e6 b.n 8002e72 <get_key+0x52>
|
|
|
|
08002ea4 <start_shot>:
|
|
{
|
|
8002ea4: b570 push {r4, r5, r6, lr}
|
|
8002ea6: ed2d 8b06 vpush {d8-d10}
|
|
Worm *w = &worms[current_player];
|
|
8002eaa: 4c2d ldr r4, [pc, #180] @ (8002f60 <start_shot+0xbc>)
|
|
8002eac: f894 50a8 ldrb.w r5, [r4, #168] @ 0xa8
|
|
const Weapon *wp = &weapons[w->weapon_id];
|
|
8002eb0: 00ae lsls r6, r5, #2
|
|
8002eb2: eb05 0385 add.w r3, r5, r5, lsl #2
|
|
8002eb6: eb04 0383 add.w r3, r4, r3, lsl #2
|
|
8002eba: f893 1090 ldrb.w r1, [r3, #144] @ 0x90
|
|
float speed = wp->vmin + charge_power * (wp->vmax - wp->vmin);
|
|
8002ebe: 4a29 ldr r2, [pc, #164] @ (8002f64 <start_shot+0xc0>)
|
|
8002ec0: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8002ec4: edd2 8a02 vldr s17, [r2, #8]
|
|
8002ec8: edd2 7a03 vldr s15, [r2, #12]
|
|
8002ecc: ee77 7ae8 vsub.f32 s15, s15, s17
|
|
8002ed0: ed94 7a2b vldr s14, [r4, #172] @ 0xac
|
|
8002ed4: ee67 7a87 vmul.f32 s15, s15, s14
|
|
8002ed8: ee78 8aa7 vadd.f32 s17, s17, s15
|
|
float rad = (float)w->angle_deg * 3.1415926f / 180.0f;
|
|
8002edc: edd3 7a23 vldr s15, [r3, #140] @ 0x8c
|
|
8002ee0: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
8002ee4: ed9f 7a20 vldr s14, [pc, #128] @ 8002f68 <start_shot+0xc4>
|
|
8002ee8: ee67 7a87 vmul.f32 s15, s15, s14
|
|
8002eec: ed9f 7a1f vldr s14, [pc, #124] @ 8002f6c <start_shot+0xc8>
|
|
8002ef0: ee87 aa87 vdiv.f32 s20, s15, s14
|
|
proj_x = (float)w->x + cosf(rad) * MUZZLE;
|
|
8002ef4: ed93 9a20 vldr s18, [r3, #128] @ 0x80
|
|
8002ef8: eeb8 9ac9 vcvt.f32.s32 s18, s18
|
|
8002efc: eeb0 0a4a vmov.f32 s0, s20
|
|
8002f00: f001 fe4e bl 8004ba0 <cosf>
|
|
8002f04: eeb0 8a40 vmov.f32 s16, s0
|
|
8002f08: eef1 9a0c vmov.f32 s19, #28 @ 0x40e00000 7.0
|
|
8002f0c: ee60 7a29 vmul.f32 s15, s0, s19
|
|
8002f10: ee39 9a27 vadd.f32 s18, s18, s15
|
|
8002f14: ed84 9a2d vstr s18, [r4, #180] @ 0xb4
|
|
proj_y = (float)w->y - sinf(rad) * MUZZLE;
|
|
8002f18: 442e add r6, r5
|
|
8002f1a: eb04 0686 add.w r6, r4, r6, lsl #2
|
|
8002f1e: ed96 9a21 vldr s18, [r6, #132] @ 0x84
|
|
8002f22: eeb8 9ac9 vcvt.f32.s32 s18, s18
|
|
8002f26: eeb0 0a4a vmov.f32 s0, s20
|
|
8002f2a: f001 fe7d bl 8004c28 <sinf>
|
|
8002f2e: ee60 9a29 vmul.f32 s19, s0, s19
|
|
8002f32: ee39 9a69 vsub.f32 s18, s18, s19
|
|
8002f36: ed84 9a2e vstr s18, [r4, #184] @ 0xb8
|
|
proj_vx = cosf(rad) * speed;
|
|
8002f3a: ee28 8a28 vmul.f32 s16, s16, s17
|
|
8002f3e: ed84 8a2f vstr s16, [r4, #188] @ 0xbc
|
|
proj_vy = -sinf(rad) * speed;
|
|
8002f42: ee20 0a68 vnmul.f32 s0, s0, s17
|
|
8002f46: ed84 0a30 vstr s0, [r4, #192] @ 0xc0
|
|
proj_owner = current_player;
|
|
8002f4a: f884 50c4 strb.w r5, [r4, #196] @ 0xc4
|
|
proj_age = 0.0f;
|
|
8002f4e: 2300 movs r3, #0
|
|
8002f50: f8c4 30c8 str.w r3, [r4, #200] @ 0xc8
|
|
gs = GS_FLIGHT;
|
|
8002f54: 2302 movs r3, #2
|
|
8002f56: f884 30a9 strb.w r3, [r4, #169] @ 0xa9
|
|
}
|
|
8002f5a: ecbd 8b06 vpop {d8-d10}
|
|
8002f5e: bd70 pop {r4, r5, r6, pc}
|
|
8002f60: 20004048 .word 0x20004048
|
|
8002f64: 08007ed8 .word 0x08007ed8
|
|
8002f68: 40490fda .word 0x40490fda
|
|
8002f6c: 43340000 .word 0x43340000
|
|
|
|
08002f70 <handle_key_press>:
|
|
|
|
// ===================== Input handling =====================
|
|
static void handle_key_press(int8_t key)
|
|
{
|
|
8002f70: b538 push {r3, r4, r5, lr}
|
|
if (key == 0) { // restart
|
|
8002f72: b1d0 cbz r0, 8002faa <handle_key_press+0x3a>
|
|
8002f74: 4603 mov r3, r0
|
|
charge_power = 0.0f;
|
|
charge_dir = 1.0f;
|
|
return;
|
|
}
|
|
|
|
if (gs == GS_GAMEOVER) return;
|
|
8002f76: 4a4b ldr r2, [pc, #300] @ (80030a4 <handle_key_press+0x134>)
|
|
8002f78: f892 20a9 ldrb.w r2, [r2, #169] @ 0xa9
|
|
8002f7c: 2a04 cmp r2, #4
|
|
8002f7e: d03a beq.n 8002ff6 <handle_key_press+0x86>
|
|
|
|
if (key == -1) { // *
|
|
8002f80: f1b0 3fff cmp.w r0, #4294967295 @ 0xffffffff
|
|
8002f84: d038 beq.n 8002ff8 <handle_key_press+0x88>
|
|
if (gs == GS_AIM) weapon_next();
|
|
return;
|
|
}
|
|
if (key == -2) { // #
|
|
8002f86: f110 0f02 cmn.w r0, #2
|
|
8002f8a: d03a beq.n 8003002 <handle_key_press+0x92>
|
|
if (gs == GS_AIM) weapon_prev();
|
|
return;
|
|
}
|
|
|
|
if (gs == GS_AIM) {
|
|
8002f8c: 2a00 cmp r2, #0
|
|
8002f8e: f040 8081 bne.w 8003094 <handle_key_press+0x124>
|
|
Worm *w = &worms[current_player];
|
|
8002f92: 4a44 ldr r2, [pc, #272] @ (80030a4 <handle_key_press+0x134>)
|
|
8002f94: f892 00a8 ldrb.w r0, [r2, #168] @ 0xa8
|
|
|
|
if (key == 2) { // UP (исправлено)
|
|
8002f98: 3b02 subs r3, #2
|
|
8002f9a: 2b06 cmp r3, #6
|
|
8002f9c: d82b bhi.n 8002ff6 <handle_key_press+0x86>
|
|
8002f9e: e8df f003 tbb [pc, r3]
|
|
8002fa2: 2a35 .short 0x2a35
|
|
8002fa4: 2a626d57 .word 0x2a626d57
|
|
8002fa8: 46 .byte 0x46
|
|
8002fa9: 00 .byte 0x00
|
|
terrain_generate();
|
|
8002faa: f7ff fe57 bl 8002c5c <terrain_generate>
|
|
worms[0].hp = 100; worms[1].hp = 100;
|
|
8002fae: 4c3d ldr r4, [pc, #244] @ (80030a4 <handle_key_press+0x134>)
|
|
8002fb0: 2364 movs r3, #100 @ 0x64
|
|
8002fb2: f8c4 3088 str.w r3, [r4, #136] @ 0x88
|
|
8002fb6: f8c4 309c str.w r3, [r4, #156] @ 0x9c
|
|
worms[0].angle_deg = 45; worms[1].angle_deg = 135;
|
|
8002fba: 232d movs r3, #45 @ 0x2d
|
|
8002fbc: f8c4 308c str.w r3, [r4, #140] @ 0x8c
|
|
8002fc0: 2387 movs r3, #135 @ 0x87
|
|
8002fc2: f8c4 30a0 str.w r3, [r4, #160] @ 0xa0
|
|
worms[0].weapon_id = 0; worms[1].weapon_id = 0;
|
|
8002fc6: 2500 movs r5, #0
|
|
8002fc8: f884 5090 strb.w r5, [r4, #144] @ 0x90
|
|
8002fcc: f884 50a4 strb.w r5, [r4, #164] @ 0xa4
|
|
place_worm(0, 12);
|
|
8002fd0: 210c movs r1, #12
|
|
8002fd2: 4628 mov r0, r5
|
|
8002fd4: f7ff fe70 bl 8002cb8 <place_worm>
|
|
place_worm(1, OLED_W - 13);
|
|
8002fd8: 2173 movs r1, #115 @ 0x73
|
|
8002fda: 2001 movs r0, #1
|
|
8002fdc: f7ff fe6c bl 8002cb8 <place_worm>
|
|
current_player = 0;
|
|
8002fe0: f884 50a8 strb.w r5, [r4, #168] @ 0xa8
|
|
gs = GS_AIM;
|
|
8002fe4: f884 50a9 strb.w r5, [r4, #169] @ 0xa9
|
|
charge_power = 0.0f;
|
|
8002fe8: 2300 movs r3, #0
|
|
8002fea: f8c4 30ac str.w r3, [r4, #172] @ 0xac
|
|
charge_dir = 1.0f;
|
|
8002fee: 4b2e ldr r3, [pc, #184] @ (80030a8 <handle_key_press+0x138>)
|
|
8002ff0: f04f 527e mov.w r2, #1065353216 @ 0x3f800000
|
|
8002ff4: 601a str r2, [r3, #0]
|
|
else if (gs == GS_CHARGE) {
|
|
if (key == 5) { // второй FIRE -> shot
|
|
start_shot();
|
|
}
|
|
}
|
|
}
|
|
8002ff6: bd38 pop {r3, r4, r5, pc}
|
|
if (gs == GS_AIM) weapon_next();
|
|
8002ff8: 2a00 cmp r2, #0
|
|
8002ffa: d1fc bne.n 8002ff6 <handle_key_press+0x86>
|
|
8002ffc: f7ff fed4 bl 8002da8 <weapon_next>
|
|
return;
|
|
8003000: e7f9 b.n 8002ff6 <handle_key_press+0x86>
|
|
if (gs == GS_AIM) weapon_prev();
|
|
8003002: 2a00 cmp r2, #0
|
|
8003004: d1f7 bne.n 8002ff6 <handle_key_press+0x86>
|
|
8003006: f7ff feed bl 8002de4 <weapon_prev>
|
|
return;
|
|
800300a: e7f4 b.n 8002ff6 <handle_key_press+0x86>
|
|
w->angle_deg += 2;
|
|
800300c: eb00 0380 add.w r3, r0, r0, lsl #2
|
|
8003010: 4a24 ldr r2, [pc, #144] @ (80030a4 <handle_key_press+0x134>)
|
|
8003012: eb02 0283 add.w r2, r2, r3, lsl #2
|
|
8003016: f8d2 308c ldr.w r3, [r2, #140] @ 0x8c
|
|
800301a: 3302 adds r3, #2
|
|
800301c: f8c2 308c str.w r3, [r2, #140] @ 0x8c
|
|
if (w->angle_deg > 180) w->angle_deg = 180;
|
|
8003020: 2bb4 cmp r3, #180 @ 0xb4
|
|
8003022: dde8 ble.n 8002ff6 <handle_key_press+0x86>
|
|
8003024: 4613 mov r3, r2
|
|
8003026: 22b4 movs r2, #180 @ 0xb4
|
|
8003028: f8c3 208c str.w r2, [r3, #140] @ 0x8c
|
|
800302c: e7e3 b.n 8002ff6 <handle_key_press+0x86>
|
|
w->angle_deg -= 2;
|
|
800302e: eb00 0380 add.w r3, r0, r0, lsl #2
|
|
8003032: 4a1c ldr r2, [pc, #112] @ (80030a4 <handle_key_press+0x134>)
|
|
8003034: eb02 0283 add.w r2, r2, r3, lsl #2
|
|
8003038: f8d2 308c ldr.w r3, [r2, #140] @ 0x8c
|
|
800303c: 3b02 subs r3, #2
|
|
800303e: f8c2 308c str.w r3, [r2, #140] @ 0x8c
|
|
if (w->angle_deg < 0) w->angle_deg = 0;
|
|
8003042: 2b00 cmp r3, #0
|
|
8003044: dad7 bge.n 8002ff6 <handle_key_press+0x86>
|
|
8003046: 4613 mov r3, r2
|
|
8003048: 2200 movs r2, #0
|
|
800304a: f8c3 208c str.w r2, [r3, #140] @ 0x8c
|
|
800304e: e7d2 b.n 8002ff6 <handle_key_press+0x86>
|
|
place_worm(current_player, w->x - 1);
|
|
8003050: eb00 0280 add.w r2, r0, r0, lsl #2
|
|
8003054: 4b13 ldr r3, [pc, #76] @ (80030a4 <handle_key_press+0x134>)
|
|
8003056: eb03 0382 add.w r3, r3, r2, lsl #2
|
|
800305a: f8d3 1080 ldr.w r1, [r3, #128] @ 0x80
|
|
800305e: 3901 subs r1, #1
|
|
8003060: f7ff fe2a bl 8002cb8 <place_worm>
|
|
8003064: e7c7 b.n 8002ff6 <handle_key_press+0x86>
|
|
place_worm(current_player, w->x + 1);
|
|
8003066: eb00 0280 add.w r2, r0, r0, lsl #2
|
|
800306a: 4b0e ldr r3, [pc, #56] @ (80030a4 <handle_key_press+0x134>)
|
|
800306c: eb03 0382 add.w r3, r3, r2, lsl #2
|
|
8003070: f8d3 1080 ldr.w r1, [r3, #128] @ 0x80
|
|
8003074: 3101 adds r1, #1
|
|
8003076: f7ff fe1f bl 8002cb8 <place_worm>
|
|
800307a: e7bc b.n 8002ff6 <handle_key_press+0x86>
|
|
gs = GS_CHARGE;
|
|
800307c: 4b09 ldr r3, [pc, #36] @ (80030a4 <handle_key_press+0x134>)
|
|
800307e: 2201 movs r2, #1
|
|
8003080: f883 20a9 strb.w r2, [r3, #169] @ 0xa9
|
|
charge_power = 0.0f;
|
|
8003084: 2200 movs r2, #0
|
|
8003086: f8c3 20ac str.w r2, [r3, #172] @ 0xac
|
|
charge_dir = 1.0f;
|
|
800308a: 4b07 ldr r3, [pc, #28] @ (80030a8 <handle_key_press+0x138>)
|
|
800308c: f04f 527e mov.w r2, #1065353216 @ 0x3f800000
|
|
8003090: 601a str r2, [r3, #0]
|
|
8003092: e7b0 b.n 8002ff6 <handle_key_press+0x86>
|
|
else if (gs == GS_CHARGE) {
|
|
8003094: 2a01 cmp r2, #1
|
|
8003096: d1ae bne.n 8002ff6 <handle_key_press+0x86>
|
|
if (key == 5) { // второй FIRE -> shot
|
|
8003098: 2805 cmp r0, #5
|
|
800309a: d1ac bne.n 8002ff6 <handle_key_press+0x86>
|
|
start_shot();
|
|
800309c: f7ff ff02 bl 8002ea4 <start_shot>
|
|
80030a0: e7a9 b.n 8002ff6 <handle_key_press+0x86>
|
|
80030a2: bf00 nop
|
|
80030a4: 20004048 .word 0x20004048
|
|
80030a8: 20000024 .word 0x20000024
|
|
|
|
080030ac <crater>:
|
|
{
|
|
80030ac: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
80030ae: 4606 mov r6, r0
|
|
80030b0: 460d mov r5, r1
|
|
int x0 = clampi(cx - r, 0, OLED_W - 1);
|
|
80030b2: 227f movs r2, #127 @ 0x7f
|
|
80030b4: 2100 movs r1, #0
|
|
80030b6: 1b40 subs r0, r0, r5
|
|
80030b8: f7ff fdc6 bl 8002c48 <clampi>
|
|
80030bc: 4604 mov r4, r0
|
|
int x1 = clampi(cx + r, 0, OLED_W - 1);
|
|
80030be: 227f movs r2, #127 @ 0x7f
|
|
80030c0: 2100 movs r1, #0
|
|
80030c2: 1970 adds r0, r6, r5
|
|
80030c4: f7ff fdc0 bl 8002c48 <clampi>
|
|
80030c8: 4607 mov r7, r0
|
|
for (int x = x0; x <= x1; x++) {
|
|
80030ca: e002 b.n 80030d2 <crater+0x26>
|
|
ground_y[x] = (uint8_t)ny;
|
|
80030cc: 4a11 ldr r2, [pc, #68] @ (8003114 <crater+0x68>)
|
|
80030ce: 5513 strb r3, [r2, r4]
|
|
for (int x = x0; x <= x1; x++) {
|
|
80030d0: 3401 adds r4, #1
|
|
80030d2: 42bc cmp r4, r7
|
|
80030d4: dc1c bgt.n 8003110 <crater+0x64>
|
|
int dx = x - cx;
|
|
80030d6: 1ba3 subs r3, r4, r6
|
|
int rr2 = r*r;
|
|
80030d8: fb05 f205 mul.w r2, r5, r5
|
|
int d2 = dx*dx;
|
|
80030dc: fb03 f303 mul.w r3, r3, r3
|
|
if (d2 > rr2) continue;
|
|
80030e0: 429a cmp r2, r3
|
|
80030e2: dbf5 blt.n 80030d0 <crater+0x24>
|
|
int drop = (int)(sqrtf((float)(rr2 - d2)) * 0.55f);
|
|
80030e4: 1ad3 subs r3, r2, r3
|
|
80030e6: ee00 3a10 vmov s0, r3
|
|
80030ea: eeb8 0ac0 vcvt.f32.s32 s0, s0
|
|
80030ee: f001 fd39 bl 8004b64 <sqrtf>
|
|
80030f2: eddf 7a09 vldr s15, [pc, #36] @ 8003118 <crater+0x6c>
|
|
80030f6: ee20 0a27 vmul.f32 s0, s0, s15
|
|
80030fa: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
int ny = (int)ground_y[x] + drop;
|
|
80030fe: 4b05 ldr r3, [pc, #20] @ (8003114 <crater+0x68>)
|
|
8003100: 5d1b ldrb r3, [r3, r4]
|
|
8003102: ee10 2a10 vmov r2, s0
|
|
8003106: 4413 add r3, r2
|
|
if (ny > 63) ny = 63;
|
|
8003108: 2b3f cmp r3, #63 @ 0x3f
|
|
800310a: dddf ble.n 80030cc <crater+0x20>
|
|
800310c: 233f movs r3, #63 @ 0x3f
|
|
800310e: e7dd b.n 80030cc <crater+0x20>
|
|
}
|
|
8003110: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
8003112: bf00 nop
|
|
8003114: 20004048 .word 0x20004048
|
|
8003118: 3f0ccccd .word 0x3f0ccccd
|
|
|
|
0800311c <apply_damage>:
|
|
{
|
|
800311c: b570 push {r4, r5, r6, lr}
|
|
800311e: ed2d 8b02 vpush {d8}
|
|
8003122: 4606 mov r6, r0
|
|
8003124: 460d mov r5, r1
|
|
8003126: ee08 2a10 vmov s16, r2
|
|
800312a: ee08 3a90 vmov s17, r3
|
|
for (int i = 0; i < 2; i++) {
|
|
800312e: 2400 movs r4, #0
|
|
8003130: e002 b.n 8003138 <apply_damage+0x1c>
|
|
if (dmg < 0) dmg = 0;
|
|
8003132: 2300 movs r3, #0
|
|
8003134: e02e b.n 8003194 <apply_damage+0x78>
|
|
for (int i = 0; i < 2; i++) {
|
|
8003136: 3401 adds r4, #1
|
|
8003138: 2c01 cmp r4, #1
|
|
800313a: dc3b bgt.n 80031b4 <apply_damage+0x98>
|
|
int dx = worms[i].x - cx;
|
|
800313c: eb04 0384 add.w r3, r4, r4, lsl #2
|
|
8003140: 4a1e ldr r2, [pc, #120] @ (80031bc <apply_damage+0xa0>)
|
|
8003142: eb02 0283 add.w r2, r2, r3, lsl #2
|
|
8003146: f8d2 3080 ldr.w r3, [r2, #128] @ 0x80
|
|
800314a: 1b9b subs r3, r3, r6
|
|
int dy = worms[i].y - cy;
|
|
800314c: f8d2 2084 ldr.w r2, [r2, #132] @ 0x84
|
|
8003150: 1b52 subs r2, r2, r5
|
|
float dist = sqrtf((float)(dx*dx + dy*dy));
|
|
8003152: fb02 f202 mul.w r2, r2, r2
|
|
8003156: fb03 2303 mla r3, r3, r3, r2
|
|
800315a: ee00 3a10 vmov s0, r3
|
|
800315e: eeb8 0ac0 vcvt.f32.s32 s0, s0
|
|
8003162: f001 fcff bl 8004b64 <sqrtf>
|
|
if (dist > (float)r) continue;
|
|
8003166: eef8 7a48 vcvt.f32.u32 s15, s16
|
|
800316a: eef4 7ac0 vcmpe.f32 s15, s0
|
|
800316e: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8003172: d4e0 bmi.n 8003136 <apply_damage+0x1a>
|
|
float k = 1.0f - (dist / (float)r);
|
|
8003174: eec0 6a27 vdiv.f32 s13, s0, s15
|
|
8003178: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
|
|
800317c: ee37 7a66 vsub.f32 s14, s14, s13
|
|
int dmg = (int)(k * (float)maxdmg);
|
|
8003180: eef8 7a68 vcvt.f32.u32 s15, s17
|
|
8003184: ee67 7a87 vmul.f32 s15, s15, s14
|
|
8003188: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
800318c: ee17 3a90 vmov r3, s15
|
|
if (dmg < 0) dmg = 0;
|
|
8003190: 2b00 cmp r3, #0
|
|
8003192: dbce blt.n 8003132 <apply_damage+0x16>
|
|
worms[i].hp -= dmg;
|
|
8003194: eb04 0284 add.w r2, r4, r4, lsl #2
|
|
8003198: 4908 ldr r1, [pc, #32] @ (80031bc <apply_damage+0xa0>)
|
|
800319a: eb01 0182 add.w r1, r1, r2, lsl #2
|
|
800319e: f8d1 2088 ldr.w r2, [r1, #136] @ 0x88
|
|
80031a2: 1ad3 subs r3, r2, r3
|
|
80031a4: f8c1 3088 str.w r3, [r1, #136] @ 0x88
|
|
if (worms[i].hp < 0) worms[i].hp = 0;
|
|
80031a8: 2b00 cmp r3, #0
|
|
80031aa: dac4 bge.n 8003136 <apply_damage+0x1a>
|
|
80031ac: 2200 movs r2, #0
|
|
80031ae: f8c1 2088 str.w r2, [r1, #136] @ 0x88
|
|
80031b2: e7c0 b.n 8003136 <apply_damage+0x1a>
|
|
}
|
|
80031b4: ecbd 8b02 vpop {d8}
|
|
80031b8: bd70 pop {r4, r5, r6, pc}
|
|
80031ba: bf00 nop
|
|
80031bc: 20004048 .word 0x20004048
|
|
|
|
080031c0 <explode_at>:
|
|
{
|
|
80031c0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
80031c2: 460d mov r5, r1
|
|
Worm *w = &worms[current_player];
|
|
80031c4: 4c1d ldr r4, [pc, #116] @ (800323c <explode_at+0x7c>)
|
|
80031c6: f894 30a8 ldrb.w r3, [r4, #168] @ 0xa8
|
|
const Weapon *wp = &weapons[w->weapon_id];
|
|
80031ca: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
80031ce: eb04 0383 add.w r3, r4, r3, lsl #2
|
|
80031d2: f893 7090 ldrb.w r7, [r3, #144] @ 0x90
|
|
expl_x = clampi(x, 0, OLED_W - 1);
|
|
80031d6: 227f movs r2, #127 @ 0x7f
|
|
80031d8: 2100 movs r1, #0
|
|
80031da: f7ff fd35 bl 8002c48 <clampi>
|
|
80031de: 4606 mov r6, r0
|
|
80031e0: f8c4 00cc str.w r0, [r4, #204] @ 0xcc
|
|
expl_y = clampi(y, 0, OLED_H - 1);
|
|
80031e4: 223f movs r2, #63 @ 0x3f
|
|
80031e6: 2100 movs r1, #0
|
|
80031e8: 4628 mov r0, r5
|
|
80031ea: f7ff fd2d bl 8002c48 <clampi>
|
|
80031ee: f8c4 00d0 str.w r0, [r4, #208] @ 0xd0
|
|
expl_r = 1;
|
|
80031f2: 2301 movs r3, #1
|
|
80031f4: f884 30b0 strb.w r3, [r4, #176] @ 0xb0
|
|
expl_rmax = wp->blast_radius;
|
|
80031f8: 4d11 ldr r5, [pc, #68] @ (8003240 <explode_at+0x80>)
|
|
80031fa: eb05 1507 add.w r5, r5, r7, lsl #4
|
|
80031fe: 792f ldrb r7, [r5, #4]
|
|
8003200: f884 70b1 strb.w r7, [r4, #177] @ 0xb1
|
|
crater(expl_x, wp->blast_radius);
|
|
8003204: 4639 mov r1, r7
|
|
8003206: 4630 mov r0, r6
|
|
8003208: f7ff ff50 bl 80030ac <crater>
|
|
apply_damage(expl_x, expl_y, wp->blast_radius, wp->max_damage);
|
|
800320c: 796b ldrb r3, [r5, #5]
|
|
800320e: 463a mov r2, r7
|
|
8003210: f8d4 10d0 ldr.w r1, [r4, #208] @ 0xd0
|
|
8003214: f8d4 00cc ldr.w r0, [r4, #204] @ 0xcc
|
|
8003218: f7ff ff80 bl 800311c <apply_damage>
|
|
if (worms[0].hp == 0 || worms[1].hp == 0) {
|
|
800321c: f8d4 3088 ldr.w r3, [r4, #136] @ 0x88
|
|
8003220: b13b cbz r3, 8003232 <explode_at+0x72>
|
|
8003222: f8d4 309c ldr.w r3, [r4, #156] @ 0x9c
|
|
8003226: b123 cbz r3, 8003232 <explode_at+0x72>
|
|
gs = GS_EXPLOSION;
|
|
8003228: 4b04 ldr r3, [pc, #16] @ (800323c <explode_at+0x7c>)
|
|
800322a: 2203 movs r2, #3
|
|
800322c: f883 20a9 strb.w r2, [r3, #169] @ 0xa9
|
|
8003230: e003 b.n 800323a <explode_at+0x7a>
|
|
gs = GS_GAMEOVER;
|
|
8003232: 4b02 ldr r3, [pc, #8] @ (800323c <explode_at+0x7c>)
|
|
8003234: 2204 movs r2, #4
|
|
8003236: f883 20a9 strb.w r2, [r3, #169] @ 0xa9
|
|
}
|
|
800323a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800323c: 20004048 .word 0x20004048
|
|
8003240: 08007ed8 .word 0x08007ed8
|
|
|
|
08003244 <update_flight>:
|
|
{
|
|
8003244: b538 push {r3, r4, r5, lr}
|
|
proj_age += dt;
|
|
8003246: 4b3e ldr r3, [pc, #248] @ (8003340 <update_flight+0xfc>)
|
|
8003248: edd3 6a32 vldr s13, [r3, #200] @ 0xc8
|
|
800324c: ee70 6a26 vadd.f32 s13, s0, s13
|
|
8003250: edc3 6a32 vstr s13, [r3, #200] @ 0xc8
|
|
proj_vx += WIND * dt;
|
|
8003254: ed93 7a35 vldr s14, [r3, #212] @ 0xd4
|
|
8003258: ee20 7a07 vmul.f32 s14, s0, s14
|
|
800325c: edd3 7a2f vldr s15, [r3, #188] @ 0xbc
|
|
8003260: ee37 7a27 vadd.f32 s14, s14, s15
|
|
8003264: ed83 7a2f vstr s14, [r3, #188] @ 0xbc
|
|
proj_vy += GRAVITY * dt;
|
|
8003268: eddf 7a36 vldr s15, [pc, #216] @ 8003344 <update_flight+0x100>
|
|
800326c: ee60 7a27 vmul.f32 s15, s0, s15
|
|
8003270: ed93 6a30 vldr s12, [r3, #192] @ 0xc0
|
|
8003274: ee77 7a86 vadd.f32 s15, s15, s12
|
|
8003278: edc3 7a30 vstr s15, [r3, #192] @ 0xc0
|
|
proj_x += proj_vx * dt;
|
|
800327c: ee27 7a00 vmul.f32 s14, s14, s0
|
|
8003280: ed93 6a2d vldr s12, [r3, #180] @ 0xb4
|
|
8003284: ee37 7a06 vadd.f32 s14, s14, s12
|
|
8003288: ed83 7a2d vstr s14, [r3, #180] @ 0xb4
|
|
proj_y += proj_vy * dt;
|
|
800328c: ee67 7a80 vmul.f32 s15, s15, s0
|
|
8003290: ed93 6a2e vldr s12, [r3, #184] @ 0xb8
|
|
8003294: ee77 7a86 vadd.f32 s15, s15, s12
|
|
8003298: edc3 7a2e vstr s15, [r3, #184] @ 0xb8
|
|
int xi = (int)(proj_x + 0.5f);
|
|
800329c: eeb6 6a00 vmov.f32 s12, #96 @ 0x3f000000 0.5
|
|
80032a0: ee37 7a06 vadd.f32 s14, s14, s12
|
|
80032a4: eebd 7ac7 vcvt.s32.f32 s14, s14
|
|
80032a8: ee17 0a10 vmov r0, s14
|
|
int yi = (int)(proj_y + 0.5f);
|
|
80032ac: ee77 7a86 vadd.f32 s15, s15, s12
|
|
80032b0: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80032b4: ee17 4a90 vmov r4, s15
|
|
if (xi < 0 || xi >= OLED_W || yi < 0 || yi >= OLED_H) {
|
|
80032b8: 287f cmp r0, #127 @ 0x7f
|
|
80032ba: d809 bhi.n 80032d0 <update_flight+0x8c>
|
|
80032bc: 2c00 cmp r4, #0
|
|
80032be: db07 blt.n 80032d0 <update_flight+0x8c>
|
|
80032c0: 2c3f cmp r4, #63 @ 0x3f
|
|
80032c2: dc05 bgt.n 80032d0 <update_flight+0x8c>
|
|
if (yi >= (int)ground_y[xi]) {
|
|
80032c4: 4b1e ldr r3, [pc, #120] @ (8003340 <update_flight+0xfc>)
|
|
80032c6: 5c19 ldrb r1, [r3, r0]
|
|
80032c8: 42a1 cmp r1, r4
|
|
80032ca: dd10 ble.n 80032ee <update_flight+0xaa>
|
|
for (int i = 0; i < 2; i++) {
|
|
80032cc: 2300 movs r3, #0
|
|
80032ce: e023 b.n 8003318 <update_flight+0xd4>
|
|
explode_at(clampi(xi, 0, OLED_W - 1), clampi(yi, 0, OLED_H - 1));
|
|
80032d0: 227f movs r2, #127 @ 0x7f
|
|
80032d2: 2100 movs r1, #0
|
|
80032d4: f7ff fcb8 bl 8002c48 <clampi>
|
|
80032d8: 4605 mov r5, r0
|
|
80032da: 223f movs r2, #63 @ 0x3f
|
|
80032dc: 2100 movs r1, #0
|
|
80032de: 4620 mov r0, r4
|
|
80032e0: f7ff fcb2 bl 8002c48 <clampi>
|
|
80032e4: 4601 mov r1, r0
|
|
80032e6: 4628 mov r0, r5
|
|
80032e8: f7ff ff6a bl 80031c0 <explode_at>
|
|
}
|
|
80032ec: bd38 pop {r3, r4, r5, pc}
|
|
explode_at(xi, (int)ground_y[xi]);
|
|
80032ee: f7ff ff67 bl 80031c0 <explode_at>
|
|
return;
|
|
80032f2: e7fb b.n 80032ec <update_flight+0xa8>
|
|
int dx = worms[i].x - xi;
|
|
80032f4: eb03 0283 add.w r2, r3, r3, lsl #2
|
|
80032f8: 4911 ldr r1, [pc, #68] @ (8003340 <update_flight+0xfc>)
|
|
80032fa: eb01 0182 add.w r1, r1, r2, lsl #2
|
|
80032fe: f8d1 2080 ldr.w r2, [r1, #128] @ 0x80
|
|
8003302: 1a12 subs r2, r2, r0
|
|
int dy = worms[i].y - yi;
|
|
8003304: f8d1 1084 ldr.w r1, [r1, #132] @ 0x84
|
|
8003308: 1b09 subs r1, r1, r4
|
|
if (dx*dx + dy*dy <= 9) { // радиус ~3
|
|
800330a: fb01 f101 mul.w r1, r1, r1
|
|
800330e: fb02 1202 mla r2, r2, r2, r1
|
|
8003312: 2a09 cmp r2, #9
|
|
8003314: dd10 ble.n 8003338 <update_flight+0xf4>
|
|
for (int i = 0; i < 2; i++) {
|
|
8003316: 3301 adds r3, #1
|
|
8003318: 2b01 cmp r3, #1
|
|
800331a: dce7 bgt.n 80032ec <update_flight+0xa8>
|
|
if ((uint8_t)i == proj_owner && proj_age < 0.12f) continue;
|
|
800331c: b2da uxtb r2, r3
|
|
800331e: 4908 ldr r1, [pc, #32] @ (8003340 <update_flight+0xfc>)
|
|
8003320: f891 10c4 ldrb.w r1, [r1, #196] @ 0xc4
|
|
8003324: 428a cmp r2, r1
|
|
8003326: d1e5 bne.n 80032f4 <update_flight+0xb0>
|
|
8003328: eddf 7a07 vldr s15, [pc, #28] @ 8003348 <update_flight+0x104>
|
|
800332c: eef4 6ae7 vcmpe.f32 s13, s15
|
|
8003330: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8003334: d5de bpl.n 80032f4 <update_flight+0xb0>
|
|
8003336: e7ee b.n 8003316 <update_flight+0xd2>
|
|
explode_at(xi, yi);
|
|
8003338: 4621 mov r1, r4
|
|
800333a: f7ff ff41 bl 80031c0 <explode_at>
|
|
return;
|
|
800333e: e7d5 b.n 80032ec <update_flight+0xa8>
|
|
8003340: 20004048 .word 0x20004048
|
|
8003344: 42b40000 .word 0x42b40000
|
|
8003348: 3df5c28f .word 0x3df5c28f
|
|
|
|
0800334c <px>:
|
|
if (x < 0 || x >= OLED_W || y < 0 || y >= OLED_H) return;
|
|
800334c: 287f cmp r0, #127 @ 0x7f
|
|
800334e: d803 bhi.n 8003358 <px+0xc>
|
|
8003350: 2900 cmp r1, #0
|
|
8003352: db01 blt.n 8003358 <px+0xc>
|
|
8003354: 293f cmp r1, #63 @ 0x3f
|
|
8003356: dd00 ble.n 800335a <px+0xe>
|
|
8003358: 4770 bx lr
|
|
{
|
|
800335a: b508 push {r3, lr}
|
|
oled_DrawPixel((uint8_t)x, (uint8_t)y, color);
|
|
800335c: b2c9 uxtb r1, r1
|
|
800335e: b2c0 uxtb r0, r0
|
|
8003360: f000 fd84 bl 8003e6c <oled_DrawPixel>
|
|
}
|
|
8003364: bd08 pop {r3, pc}
|
|
...
|
|
|
|
08003368 <draw_terrain>:
|
|
{
|
|
8003368: b538 push {r3, r4, r5, lr}
|
|
for (int x = 0; x < OLED_W; x++) {
|
|
800336a: 2500 movs r5, #0
|
|
800336c: e008 b.n 8003380 <draw_terrain+0x18>
|
|
for (int y = ground_y[x]; y < OLED_H; y++) px(x, y, White);
|
|
800336e: 2201 movs r2, #1
|
|
8003370: 4621 mov r1, r4
|
|
8003372: 4628 mov r0, r5
|
|
8003374: f7ff ffea bl 800334c <px>
|
|
8003378: 3401 adds r4, #1
|
|
800337a: 2c3f cmp r4, #63 @ 0x3f
|
|
800337c: ddf7 ble.n 800336e <draw_terrain+0x6>
|
|
for (int x = 0; x < OLED_W; x++) {
|
|
800337e: 3501 adds r5, #1
|
|
8003380: 2d7f cmp r5, #127 @ 0x7f
|
|
8003382: dc02 bgt.n 800338a <draw_terrain+0x22>
|
|
for (int y = ground_y[x]; y < OLED_H; y++) px(x, y, White);
|
|
8003384: 4b01 ldr r3, [pc, #4] @ (800338c <draw_terrain+0x24>)
|
|
8003386: 5d5c ldrb r4, [r3, r5]
|
|
8003388: e7f7 b.n 800337a <draw_terrain+0x12>
|
|
}
|
|
800338a: bd38 pop {r3, r4, r5, pc}
|
|
800338c: 20004048 .word 0x20004048
|
|
|
|
08003390 <filled_circle>:
|
|
{
|
|
8003390: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8003394: 4681 mov r9, r0
|
|
8003396: 4688 mov r8, r1
|
|
8003398: 4615 mov r5, r2
|
|
800339a: 461f mov r7, r3
|
|
for (int yy = -r; yy <= r; yy++) {
|
|
800339c: f1c2 0a00 rsb sl, r2, #0
|
|
80033a0: 4656 mov r6, sl
|
|
80033a2: e013 b.n 80033cc <filled_circle+0x3c>
|
|
for (int xx = -r; xx <= r; xx++) {
|
|
80033a4: 3401 adds r4, #1
|
|
80033a6: 42ac cmp r4, r5
|
|
80033a8: dc0f bgt.n 80033ca <filled_circle+0x3a>
|
|
if (xx*xx + yy*yy <= r*r) px(cx + xx, cy + yy, color);
|
|
80033aa: fb06 fc06 mul.w ip, r6, r6
|
|
80033ae: fb04 cc04 mla ip, r4, r4, ip
|
|
80033b2: fb05 f305 mul.w r3, r5, r5
|
|
80033b6: 459c cmp ip, r3
|
|
80033b8: dcf4 bgt.n 80033a4 <filled_circle+0x14>
|
|
80033ba: 463a mov r2, r7
|
|
80033bc: eb06 0108 add.w r1, r6, r8
|
|
80033c0: eb04 0009 add.w r0, r4, r9
|
|
80033c4: f7ff ffc2 bl 800334c <px>
|
|
80033c8: e7ec b.n 80033a4 <filled_circle+0x14>
|
|
for (int yy = -r; yy <= r; yy++) {
|
|
80033ca: 3601 adds r6, #1
|
|
80033cc: 42ae cmp r6, r5
|
|
80033ce: dc01 bgt.n 80033d4 <filled_circle+0x44>
|
|
for (int xx = -r; xx <= r; xx++) {
|
|
80033d0: 4654 mov r4, sl
|
|
80033d2: e7e8 b.n 80033a6 <filled_circle+0x16>
|
|
}
|
|
80033d4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
|
|
080033d8 <line>:
|
|
{
|
|
80033d8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
80033dc: b083 sub sp, #12
|
|
80033de: 4605 mov r5, r0
|
|
80033e0: 460e mov r6, r1
|
|
80033e2: 4691 mov r9, r2
|
|
80033e4: 9301 str r3, [sp, #4]
|
|
80033e6: f89d a030 ldrb.w sl, [sp, #48] @ 0x30
|
|
int dx = (x1 > x0) ? (x1 - x0) : (x0 - x1);
|
|
80033ea: 4282 cmp r2, r0
|
|
80033ec: dd23 ble.n 8003436 <line+0x5e>
|
|
80033ee: eba2 0800 sub.w r8, r2, r0
|
|
int sx = (x0 < x1) ? 1 : -1;
|
|
80033f2: 45a9 cmp r9, r5
|
|
80033f4: dd22 ble.n 800343c <line+0x64>
|
|
80033f6: 2301 movs r3, #1
|
|
80033f8: 9300 str r3, [sp, #0]
|
|
int dy = (y1 > y0) ? (y0 - y1) : (y1 - y0);
|
|
80033fa: 9b01 ldr r3, [sp, #4]
|
|
80033fc: 42b3 cmp r3, r6
|
|
80033fe: dd21 ble.n 8003444 <line+0x6c>
|
|
8003400: 1af7 subs r7, r6, r3
|
|
int sy = (y0 < y1) ? 1 : -1;
|
|
8003402: 9b01 ldr r3, [sp, #4]
|
|
8003404: 42b3 cmp r3, r6
|
|
8003406: dd20 ble.n 800344a <line+0x72>
|
|
8003408: f04f 0b01 mov.w fp, #1
|
|
int err = dx + dy;
|
|
800340c: eb08 0407 add.w r4, r8, r7
|
|
px(x0, y0, color);
|
|
8003410: 4652 mov r2, sl
|
|
8003412: 4631 mov r1, r6
|
|
8003414: 4628 mov r0, r5
|
|
8003416: f7ff ff99 bl 800334c <px>
|
|
if (x0 == x1 && y0 == y1) break;
|
|
800341a: 454d cmp r5, r9
|
|
800341c: d018 beq.n 8003450 <line+0x78>
|
|
int e2 = 2 * err;
|
|
800341e: 0063 lsls r3, r4, #1
|
|
if (e2 >= dy) { err += dy; x0 += sx; }
|
|
8003420: ebb7 0f44 cmp.w r7, r4, lsl #1
|
|
8003424: dc02 bgt.n 800342c <line+0x54>
|
|
8003426: 443c add r4, r7
|
|
8003428: 9a00 ldr r2, [sp, #0]
|
|
800342a: 4415 add r5, r2
|
|
if (e2 <= dx) { err += dx; y0 += sy; }
|
|
800342c: 4598 cmp r8, r3
|
|
800342e: dbef blt.n 8003410 <line+0x38>
|
|
8003430: 4444 add r4, r8
|
|
8003432: 445e add r6, fp
|
|
8003434: e7ec b.n 8003410 <line+0x38>
|
|
int dx = (x1 > x0) ? (x1 - x0) : (x0 - x1);
|
|
8003436: eba0 0802 sub.w r8, r0, r2
|
|
800343a: e7da b.n 80033f2 <line+0x1a>
|
|
int sx = (x0 < x1) ? 1 : -1;
|
|
800343c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
|
|
8003440: 9300 str r3, [sp, #0]
|
|
8003442: e7da b.n 80033fa <line+0x22>
|
|
int dy = (y1 > y0) ? (y0 - y1) : (y1 - y0);
|
|
8003444: 9b01 ldr r3, [sp, #4]
|
|
8003446: 1b9f subs r7, r3, r6
|
|
8003448: e7db b.n 8003402 <line+0x2a>
|
|
int sy = (y0 < y1) ? 1 : -1;
|
|
800344a: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff
|
|
800344e: e7dd b.n 800340c <line+0x34>
|
|
if (x0 == x1 && y0 == y1) break;
|
|
8003450: 9b01 ldr r3, [sp, #4]
|
|
8003452: 429e cmp r6, r3
|
|
8003454: d1e3 bne.n 800341e <line+0x46>
|
|
}
|
|
8003456: b003 add sp, #12
|
|
8003458: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
|
|
0800345c <draw_short_trajectory_preview>:
|
|
{
|
|
800345c: b510 push {r4, lr}
|
|
800345e: ed2d 8b04 vpush {d8-d9}
|
|
8003462: 4604 mov r4, r0
|
|
const Weapon *wp = &weapons[w->weapon_id];
|
|
8003464: 7c02 ldrb r2, [r0, #16]
|
|
float speed = wp->vmin + pwr01 * (wp->vmax - wp->vmin);
|
|
8003466: 4b31 ldr r3, [pc, #196] @ (800352c <draw_short_trajectory_preview+0xd0>)
|
|
8003468: eb03 1302 add.w r3, r3, r2, lsl #4
|
|
800346c: ed93 8a02 vldr s16, [r3, #8]
|
|
8003470: edd3 7a03 vldr s15, [r3, #12]
|
|
8003474: ee77 7ac8 vsub.f32 s15, s15, s16
|
|
8003478: ee67 7a80 vmul.f32 s15, s15, s0
|
|
800347c: ee38 8a27 vadd.f32 s16, s16, s15
|
|
float rad = (float)w->angle_deg * 3.1415926f / 180.0f;
|
|
8003480: edd0 7a03 vldr s15, [r0, #12]
|
|
8003484: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
8003488: ed9f 7a29 vldr s14, [pc, #164] @ 8003530 <draw_short_trajectory_preview+0xd4>
|
|
800348c: ee67 7a87 vmul.f32 s15, s15, s14
|
|
8003490: ed9f 7a28 vldr s14, [pc, #160] @ 8003534 <draw_short_trajectory_preview+0xd8>
|
|
8003494: eec7 8a87 vdiv.f32 s17, s15, s14
|
|
float vx = cosf(rad) * speed;
|
|
8003498: eeb0 0a68 vmov.f32 s0, s17
|
|
800349c: f001 fb80 bl 8004ba0 <cosf>
|
|
80034a0: ee60 9a08 vmul.f32 s19, s0, s16
|
|
float vy = -sinf(rad) * speed;
|
|
80034a4: eeb0 0a68 vmov.f32 s0, s17
|
|
80034a8: f001 fbbe bl 8004c28 <sinf>
|
|
80034ac: ee20 9a48 vnmul.f32 s18, s0, s16
|
|
float x = (float)w->x;
|
|
80034b0: edd4 7a00 vldr s15, [r4]
|
|
80034b4: eef8 8ae7 vcvt.f32.s32 s17, s15
|
|
float y = (float)w->y;
|
|
80034b8: ed94 8a01 vldr s16, [r4, #4]
|
|
80034bc: eeb8 8ac8 vcvt.f32.s32 s16, s16
|
|
for (int i = 0; i < PREVIEW_PTS; i++) {
|
|
80034c0: 2400 movs r4, #0
|
|
80034c2: e000 b.n 80034c6 <draw_short_trajectory_preview+0x6a>
|
|
80034c4: 3401 adds r4, #1
|
|
80034c6: 2c0d cmp r4, #13
|
|
80034c8: dc2c bgt.n 8003524 <draw_short_trajectory_preview+0xc8>
|
|
x += vx * dt;
|
|
80034ca: eddf 7a1b vldr s15, [pc, #108] @ 8003538 <draw_short_trajectory_preview+0xdc>
|
|
80034ce: ee29 7aa7 vmul.f32 s14, s19, s15
|
|
80034d2: ee78 8a87 vadd.f32 s17, s17, s14
|
|
y += vy * dt;
|
|
80034d6: ee69 7a27 vmul.f32 s15, s18, s15
|
|
80034da: ee38 8a27 vadd.f32 s16, s16, s15
|
|
vy += GRAVITY * dt;
|
|
80034de: eddf 7a17 vldr s15, [pc, #92] @ 800353c <draw_short_trajectory_preview+0xe0>
|
|
80034e2: ee39 9a27 vadd.f32 s18, s18, s15
|
|
int xi = (int)(x + 0.5f);
|
|
80034e6: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5
|
|
80034ea: ee38 7aa7 vadd.f32 s14, s17, s15
|
|
80034ee: eebd 7ac7 vcvt.s32.f32 s14, s14
|
|
80034f2: ee17 0a10 vmov r0, s14
|
|
int yi = (int)(y + 0.5f);
|
|
80034f6: ee78 7a27 vadd.f32 s15, s16, s15
|
|
80034fa: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80034fe: ee17 1a90 vmov r1, s15
|
|
if (xi < 0 || xi >= OLED_W || yi < 0 || yi >= OLED_H) break;
|
|
8003502: 287f cmp r0, #127 @ 0x7f
|
|
8003504: d80e bhi.n 8003524 <draw_short_trajectory_preview+0xc8>
|
|
8003506: 2900 cmp r1, #0
|
|
8003508: db0c blt.n 8003524 <draw_short_trajectory_preview+0xc8>
|
|
800350a: 293f cmp r1, #63 @ 0x3f
|
|
800350c: dc0a bgt.n 8003524 <draw_short_trajectory_preview+0xc8>
|
|
if (yi >= (int)ground_y[xi]) break;
|
|
800350e: 4b0c ldr r3, [pc, #48] @ (8003540 <draw_short_trajectory_preview+0xe4>)
|
|
8003510: 5c1b ldrb r3, [r3, r0]
|
|
8003512: 428b cmp r3, r1
|
|
8003514: dd06 ble.n 8003524 <draw_short_trajectory_preview+0xc8>
|
|
if ((i & 1) == 0) px(xi, yi, White);
|
|
8003516: f014 0f01 tst.w r4, #1
|
|
800351a: d1d3 bne.n 80034c4 <draw_short_trajectory_preview+0x68>
|
|
800351c: 2201 movs r2, #1
|
|
800351e: f7ff ff15 bl 800334c <px>
|
|
8003522: e7cf b.n 80034c4 <draw_short_trajectory_preview+0x68>
|
|
}
|
|
8003524: ecbd 8b04 vpop {d8-d9}
|
|
8003528: bd10 pop {r4, pc}
|
|
800352a: bf00 nop
|
|
800352c: 08007ed8 .word 0x08007ed8
|
|
8003530: 40490fda .word 0x40490fda
|
|
8003534: 43340000 .word 0x43340000
|
|
8003538: 3d75c28f .word 0x3d75c28f
|
|
800353c: 40accccd .word 0x40accccd
|
|
8003540: 20004048 .word 0x20004048
|
|
|
|
08003544 <circle>:
|
|
{
|
|
8003544: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8003548: b085 sub sp, #20
|
|
800354a: 4607 mov r7, r0
|
|
800354c: 468b mov fp, r1
|
|
800354e: 4615 mov r5, r2
|
|
8003550: 461c mov r4, r3
|
|
int x = r, y = 0, err = 0;
|
|
8003552: f04f 0a00 mov.w sl, #0
|
|
8003556: 4656 mov r6, sl
|
|
while (x >= y) {
|
|
8003558: e004 b.n 8003564 <circle+0x20>
|
|
x--;
|
|
800355a: 3d01 subs r5, #1
|
|
err += 1 - 2*x;
|
|
800355c: 006b lsls r3, r5, #1
|
|
800355e: f1c3 0301 rsb r3, r3, #1
|
|
8003562: 449a add sl, r3
|
|
while (x >= y) {
|
|
8003564: 42b5 cmp r5, r6
|
|
8003566: db41 blt.n 80035ec <circle+0xa8>
|
|
px(cx + x, cy + y, color);
|
|
8003568: 19eb adds r3, r5, r7
|
|
800356a: eb06 090b add.w r9, r6, fp
|
|
800356e: 4622 mov r2, r4
|
|
8003570: 4649 mov r1, r9
|
|
8003572: 9301 str r3, [sp, #4]
|
|
8003574: 4618 mov r0, r3
|
|
8003576: f7ff fee9 bl 800334c <px>
|
|
px(cx + y, cy + x, color);
|
|
800357a: 19f3 adds r3, r6, r7
|
|
800357c: eb05 080b add.w r8, r5, fp
|
|
8003580: 4622 mov r2, r4
|
|
8003582: 4641 mov r1, r8
|
|
8003584: 9302 str r3, [sp, #8]
|
|
8003586: 4618 mov r0, r3
|
|
8003588: f7ff fee0 bl 800334c <px>
|
|
px(cx - y, cy + x, color);
|
|
800358c: 1bba subs r2, r7, r6
|
|
800358e: 4613 mov r3, r2
|
|
8003590: 4622 mov r2, r4
|
|
8003592: 4641 mov r1, r8
|
|
8003594: 9303 str r3, [sp, #12]
|
|
8003596: 4618 mov r0, r3
|
|
8003598: f7ff fed8 bl 800334c <px>
|
|
px(cx - x, cy + y, color);
|
|
800359c: eba7 0805 sub.w r8, r7, r5
|
|
80035a0: 4622 mov r2, r4
|
|
80035a2: 4649 mov r1, r9
|
|
80035a4: 4640 mov r0, r8
|
|
80035a6: f7ff fed1 bl 800334c <px>
|
|
px(cx - x, cy - y, color);
|
|
80035aa: ebab 0906 sub.w r9, fp, r6
|
|
80035ae: 4622 mov r2, r4
|
|
80035b0: 4649 mov r1, r9
|
|
80035b2: 4640 mov r0, r8
|
|
80035b4: f7ff feca bl 800334c <px>
|
|
px(cx - y, cy - x, color);
|
|
80035b8: ebab 0805 sub.w r8, fp, r5
|
|
80035bc: 4622 mov r2, r4
|
|
80035be: 4641 mov r1, r8
|
|
80035c0: 9803 ldr r0, [sp, #12]
|
|
80035c2: f7ff fec3 bl 800334c <px>
|
|
px(cx + y, cy - x, color);
|
|
80035c6: 4622 mov r2, r4
|
|
80035c8: 4641 mov r1, r8
|
|
80035ca: 9802 ldr r0, [sp, #8]
|
|
80035cc: f7ff febe bl 800334c <px>
|
|
px(cx + x, cy - y, color);
|
|
80035d0: 4622 mov r2, r4
|
|
80035d2: 4649 mov r1, r9
|
|
80035d4: 9801 ldr r0, [sp, #4]
|
|
80035d6: f7ff feb9 bl 800334c <px>
|
|
y++;
|
|
80035da: 3601 adds r6, #1
|
|
err += 1 + 2*y;
|
|
80035dc: 0073 lsls r3, r6, #1
|
|
80035de: 3301 adds r3, #1
|
|
80035e0: 449a add sl, r3
|
|
if (2*(err - x) + 1 > 0) {
|
|
80035e2: ebaa 0305 sub.w r3, sl, r5
|
|
80035e6: 2b00 cmp r3, #0
|
|
80035e8: dab7 bge.n 800355a <circle+0x16>
|
|
80035ea: e7bb b.n 8003564 <circle+0x20>
|
|
}
|
|
80035ec: b005 add sp, #20
|
|
80035ee: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
|
|
080035f2 <draw_worm>:
|
|
{
|
|
80035f2: b538 push {r3, r4, r5, lr}
|
|
80035f4: 4604 mov r4, r0
|
|
80035f6: 460d mov r5, r1
|
|
if (active) {
|
|
80035f8: b14a cbz r2, 800360e <draw_worm+0x1c>
|
|
filled_circle(x, y, 2, White);
|
|
80035fa: 2301 movs r3, #1
|
|
80035fc: 2202 movs r2, #2
|
|
80035fe: f7ff fec7 bl 8003390 <filled_circle>
|
|
px(x, y - 3, White);
|
|
8003602: 2201 movs r2, #1
|
|
8003604: 1ee9 subs r1, r5, #3
|
|
8003606: 4620 mov r0, r4
|
|
8003608: f7ff fea0 bl 800334c <px>
|
|
}
|
|
800360c: bd38 pop {r3, r4, r5, pc}
|
|
circle(x, y, 2, White);
|
|
800360e: 2301 movs r3, #1
|
|
8003610: 2202 movs r2, #2
|
|
8003612: f7ff ff97 bl 8003544 <circle>
|
|
}
|
|
8003616: e7f9 b.n 800360c <draw_worm+0x1a>
|
|
|
|
08003618 <draw_ui>:
|
|
{
|
|
8003618: b570 push {r4, r5, r6, lr}
|
|
800361a: b08a sub sp, #40 @ 0x28
|
|
oled_SetCursor(0, 0);
|
|
800361c: 2100 movs r1, #0
|
|
800361e: 4608 mov r0, r1
|
|
8003620: f000 fcc4 bl 8003fac <oled_SetCursor>
|
|
sprintf(s, "P1:%3d", worms[0].hp);
|
|
8003624: 4d55 ldr r5, [pc, #340] @ (800377c <draw_ui+0x164>)
|
|
8003626: f8d5 2088 ldr.w r2, [r5, #136] @ 0x88
|
|
800362a: 4955 ldr r1, [pc, #340] @ (8003780 <draw_ui+0x168>)
|
|
800362c: a802 add r0, sp, #8
|
|
800362e: f000 fdf9 bl 8004224 <siprintf>
|
|
oled_WriteString(s, Font_7x10, White);
|
|
8003632: 4e54 ldr r6, [pc, #336] @ (8003784 <draw_ui+0x16c>)
|
|
8003634: 2301 movs r3, #1
|
|
8003636: e896 0006 ldmia.w r6, {r1, r2}
|
|
800363a: a802 add r0, sp, #8
|
|
800363c: f000 fc9e bl 8003f7c <oled_WriteString>
|
|
oled_SetCursor(64, 0);
|
|
8003640: 2100 movs r1, #0
|
|
8003642: 2040 movs r0, #64 @ 0x40
|
|
8003644: f000 fcb2 bl 8003fac <oled_SetCursor>
|
|
sprintf(s, "P2:%3d", worms[1].hp);
|
|
8003648: f8d5 209c ldr.w r2, [r5, #156] @ 0x9c
|
|
800364c: 494e ldr r1, [pc, #312] @ (8003788 <draw_ui+0x170>)
|
|
800364e: a802 add r0, sp, #8
|
|
8003650: f000 fde8 bl 8004224 <siprintf>
|
|
oled_WriteString(s, Font_7x10, White);
|
|
8003654: 2301 movs r3, #1
|
|
8003656: e896 0006 ldmia.w r6, {r1, r2}
|
|
800365a: a802 add r0, sp, #8
|
|
800365c: f000 fc8e bl 8003f7c <oled_WriteString>
|
|
const Worm *w = &worms[current_player];
|
|
8003660: f895 40a8 ldrb.w r4, [r5, #168] @ 0xa8
|
|
oled_SetCursor(0, 12);
|
|
8003664: 210c movs r1, #12
|
|
8003666: 2000 movs r0, #0
|
|
8003668: f000 fca0 bl 8003fac <oled_SetCursor>
|
|
sprintf(s, "W:%s A:%3d", weapons[w->weapon_id].name, w->angle_deg);
|
|
800366c: eb04 0384 add.w r3, r4, r4, lsl #2
|
|
8003670: eb05 0383 add.w r3, r5, r3, lsl #2
|
|
8003674: f893 2090 ldrb.w r2, [r3, #144] @ 0x90
|
|
8003678: 0112 lsls r2, r2, #4
|
|
800367a: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
|
|
800367e: 4943 ldr r1, [pc, #268] @ (800378c <draw_ui+0x174>)
|
|
8003680: 588a ldr r2, [r1, r2]
|
|
8003682: 4943 ldr r1, [pc, #268] @ (8003790 <draw_ui+0x178>)
|
|
8003684: a802 add r0, sp, #8
|
|
8003686: f000 fdcd bl 8004224 <siprintf>
|
|
oled_WriteString(s, Font_7x10, White);
|
|
800368a: 2301 movs r3, #1
|
|
800368c: e896 0006 ldmia.w r6, {r1, r2}
|
|
8003690: a802 add r0, sp, #8
|
|
8003692: f000 fc73 bl 8003f7c <oled_WriteString>
|
|
if (gs == GS_CHARGE) {
|
|
8003696: f895 30a9 ldrb.w r3, [r5, #169] @ 0xa9
|
|
800369a: 2b01 cmp r3, #1
|
|
800369c: d006 beq.n 80036ac <draw_ui+0x94>
|
|
if (gs == GS_GAMEOVER) {
|
|
800369e: 4b37 ldr r3, [pc, #220] @ (800377c <draw_ui+0x164>)
|
|
80036a0: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
80036a4: 2b04 cmp r3, #4
|
|
80036a6: d03d beq.n 8003724 <draw_ui+0x10c>
|
|
}
|
|
80036a8: b00a add sp, #40 @ 0x28
|
|
80036aa: bd70 pop {r4, r5, r6, pc}
|
|
line(bar_x, bar_y, bar_x + bar_w, bar_y, White);
|
|
80036ac: 2401 movs r4, #1
|
|
80036ae: 9400 str r4, [sp, #0]
|
|
80036b0: 2338 movs r3, #56 @ 0x38
|
|
80036b2: 227c movs r2, #124 @ 0x7c
|
|
80036b4: 4619 mov r1, r3
|
|
80036b6: 2004 movs r0, #4
|
|
80036b8: f7ff fe8e bl 80033d8 <line>
|
|
line(bar_x, bar_y + bar_h, bar_x + bar_w, bar_y + bar_h, White);
|
|
80036bc: 9400 str r4, [sp, #0]
|
|
80036be: 233e movs r3, #62 @ 0x3e
|
|
80036c0: 227c movs r2, #124 @ 0x7c
|
|
80036c2: 4619 mov r1, r3
|
|
80036c4: 2004 movs r0, #4
|
|
80036c6: f7ff fe87 bl 80033d8 <line>
|
|
line(bar_x, bar_y, bar_x, bar_y + bar_h, White);
|
|
80036ca: 9400 str r4, [sp, #0]
|
|
80036cc: 233e movs r3, #62 @ 0x3e
|
|
80036ce: 2204 movs r2, #4
|
|
80036d0: 2138 movs r1, #56 @ 0x38
|
|
80036d2: 4610 mov r0, r2
|
|
80036d4: f7ff fe80 bl 80033d8 <line>
|
|
line(bar_x + bar_w, bar_y, bar_x + bar_w, bar_y + bar_h, White);
|
|
80036d8: 9400 str r4, [sp, #0]
|
|
80036da: 233e movs r3, #62 @ 0x3e
|
|
80036dc: 227c movs r2, #124 @ 0x7c
|
|
80036de: 2138 movs r1, #56 @ 0x38
|
|
80036e0: 4610 mov r0, r2
|
|
80036e2: f7ff fe79 bl 80033d8 <line>
|
|
int fill = (int)(charge_power * (float)(bar_w - 2));
|
|
80036e6: edd5 7a2b vldr s15, [r5, #172] @ 0xac
|
|
80036ea: ed9f 7a2a vldr s14, [pc, #168] @ 8003794 <draw_ui+0x17c>
|
|
80036ee: ee67 7a87 vmul.f32 s15, s15, s14
|
|
fill = clampi(fill, 0, bar_w - 2);
|
|
80036f2: 2276 movs r2, #118 @ 0x76
|
|
80036f4: 2100 movs r1, #0
|
|
80036f6: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80036fa: ee17 0a90 vmov r0, s15
|
|
80036fe: f7ff faa3 bl 8002c48 <clampi>
|
|
8003702: 4606 mov r6, r0
|
|
for (int x = 0; x < fill; x++) {
|
|
8003704: 2500 movs r5, #0
|
|
8003706: e009 b.n 800371c <draw_ui+0x104>
|
|
px(bar_x + 1 + x, bar_y + 1 + y, White);
|
|
8003708: 2201 movs r2, #1
|
|
800370a: f104 0139 add.w r1, r4, #57 @ 0x39
|
|
800370e: 1d68 adds r0, r5, #5
|
|
8003710: f7ff fe1c bl 800334c <px>
|
|
for (int y = 0; y < bar_h - 1; y++) {
|
|
8003714: 3401 adds r4, #1
|
|
8003716: 2c04 cmp r4, #4
|
|
8003718: ddf6 ble.n 8003708 <draw_ui+0xf0>
|
|
for (int x = 0; x < fill; x++) {
|
|
800371a: 3501 adds r5, #1
|
|
800371c: 42b5 cmp r5, r6
|
|
800371e: dabe bge.n 800369e <draw_ui+0x86>
|
|
for (int y = 0; y < bar_h - 1; y++) {
|
|
8003720: 2400 movs r4, #0
|
|
8003722: e7f8 b.n 8003716 <draw_ui+0xfe>
|
|
oled_SetCursor(20, 30);
|
|
8003724: 211e movs r1, #30
|
|
8003726: 2014 movs r0, #20
|
|
8003728: f000 fc40 bl 8003fac <oled_SetCursor>
|
|
if (worms[0].hp == 0 && worms[1].hp == 0) oled_WriteString("DRAW", Font_11x18, White);
|
|
800372c: 4b13 ldr r3, [pc, #76] @ (800377c <draw_ui+0x164>)
|
|
800372e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
|
|
8003732: b91b cbnz r3, 800373c <draw_ui+0x124>
|
|
8003734: 4a11 ldr r2, [pc, #68] @ (800377c <draw_ui+0x164>)
|
|
8003736: f8d2 209c ldr.w r2, [r2, #156] @ 0x9c
|
|
800373a: b18a cbz r2, 8003760 <draw_ui+0x148>
|
|
else if (worms[0].hp == 0) oled_WriteString("P2 WINS", Font_11x18, White);
|
|
800373c: b9bb cbnz r3, 800376e <draw_ui+0x156>
|
|
800373e: 4a16 ldr r2, [pc, #88] @ (8003798 <draw_ui+0x180>)
|
|
8003740: 2301 movs r3, #1
|
|
8003742: ca06 ldmia r2, {r1, r2}
|
|
8003744: 4815 ldr r0, [pc, #84] @ (800379c <draw_ui+0x184>)
|
|
8003746: f000 fc19 bl 8003f7c <oled_WriteString>
|
|
oled_SetCursor(6, 52);
|
|
800374a: 2134 movs r1, #52 @ 0x34
|
|
800374c: 2006 movs r0, #6
|
|
800374e: f000 fc2d bl 8003fac <oled_SetCursor>
|
|
oled_WriteString("0=restart", Font_7x10, White);
|
|
8003752: 4a0c ldr r2, [pc, #48] @ (8003784 <draw_ui+0x16c>)
|
|
8003754: 2301 movs r3, #1
|
|
8003756: ca06 ldmia r2, {r1, r2}
|
|
8003758: 4811 ldr r0, [pc, #68] @ (80037a0 <draw_ui+0x188>)
|
|
800375a: f000 fc0f bl 8003f7c <oled_WriteString>
|
|
}
|
|
800375e: e7a3 b.n 80036a8 <draw_ui+0x90>
|
|
if (worms[0].hp == 0 && worms[1].hp == 0) oled_WriteString("DRAW", Font_11x18, White);
|
|
8003760: 4a0d ldr r2, [pc, #52] @ (8003798 <draw_ui+0x180>)
|
|
8003762: 2301 movs r3, #1
|
|
8003764: ca06 ldmia r2, {r1, r2}
|
|
8003766: 480f ldr r0, [pc, #60] @ (80037a4 <draw_ui+0x18c>)
|
|
8003768: f000 fc08 bl 8003f7c <oled_WriteString>
|
|
800376c: e7ed b.n 800374a <draw_ui+0x132>
|
|
else oled_WriteString("P1 WINS", Font_11x18, White);
|
|
800376e: 4a0a ldr r2, [pc, #40] @ (8003798 <draw_ui+0x180>)
|
|
8003770: 2301 movs r3, #1
|
|
8003772: ca06 ldmia r2, {r1, r2}
|
|
8003774: 480c ldr r0, [pc, #48] @ (80037a8 <draw_ui+0x190>)
|
|
8003776: f000 fc01 bl 8003f7c <oled_WriteString>
|
|
800377a: e7e6 b.n 800374a <draw_ui+0x132>
|
|
800377c: 20004048 .word 0x20004048
|
|
8003780: 08007f34 .word 0x08007f34
|
|
8003784: 2000001c .word 0x2000001c
|
|
8003788: 08007f40 .word 0x08007f40
|
|
800378c: 08007ed8 .word 0x08007ed8
|
|
8003790: 08007f48 .word 0x08007f48
|
|
8003794: 42ec0000 .word 0x42ec0000
|
|
8003798: 20000014 .word 0x20000014
|
|
800379c: 08007f5c .word 0x08007f5c
|
|
80037a0: 08007f6c .word 0x08007f6c
|
|
80037a4: 08007f54 .word 0x08007f54
|
|
80037a8: 08007f64 .word 0x08007f64
|
|
|
|
080037ac <render>:
|
|
{
|
|
80037ac: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
80037b0: ed2d 8b02 vpush {d8}
|
|
80037b4: b083 sub sp, #12
|
|
oled_Fill(Black);
|
|
80037b6: 2000 movs r0, #0
|
|
80037b8: f000 fab6 bl 8003d28 <oled_Fill>
|
|
draw_terrain();
|
|
80037bc: f7ff fdd4 bl 8003368 <draw_terrain>
|
|
draw_worm(worms[0].x, worms[0].y, (current_player == 0 && gs != GS_GAMEOVER));
|
|
80037c0: 4b56 ldr r3, [pc, #344] @ (800391c <render+0x170>)
|
|
80037c2: f8d3 0080 ldr.w r0, [r3, #128] @ 0x80
|
|
80037c6: f8d3 1084 ldr.w r1, [r3, #132] @ 0x84
|
|
80037ca: f893 30a8 ldrb.w r3, [r3, #168] @ 0xa8
|
|
80037ce: b943 cbnz r3, 80037e2 <render+0x36>
|
|
80037d0: 4b52 ldr r3, [pc, #328] @ (800391c <render+0x170>)
|
|
80037d2: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
80037d6: 2b04 cmp r3, #4
|
|
80037d8: d001 beq.n 80037de <render+0x32>
|
|
80037da: 2201 movs r2, #1
|
|
80037dc: e002 b.n 80037e4 <render+0x38>
|
|
80037de: 2200 movs r2, #0
|
|
80037e0: e000 b.n 80037e4 <render+0x38>
|
|
80037e2: 2200 movs r2, #0
|
|
80037e4: f7ff ff05 bl 80035f2 <draw_worm>
|
|
draw_worm(worms[1].x, worms[1].y, (current_player == 1 && gs != GS_GAMEOVER));
|
|
80037e8: 4b4c ldr r3, [pc, #304] @ (800391c <render+0x170>)
|
|
80037ea: f8d3 0094 ldr.w r0, [r3, #148] @ 0x94
|
|
80037ee: f8d3 1098 ldr.w r1, [r3, #152] @ 0x98
|
|
80037f2: f893 30a8 ldrb.w r3, [r3, #168] @ 0xa8
|
|
80037f6: 2b01 cmp r3, #1
|
|
80037f8: d01a beq.n 8003830 <render+0x84>
|
|
80037fa: 2200 movs r2, #0
|
|
80037fc: f7ff fef9 bl 80035f2 <draw_worm>
|
|
if (gs == GS_AIM || gs == GS_CHARGE) {
|
|
8003800: 4b46 ldr r3, [pc, #280] @ (800391c <render+0x170>)
|
|
8003802: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
8003806: 2b01 cmp r3, #1
|
|
8003808: d91b bls.n 8003842 <render+0x96>
|
|
if (gs == GS_FLIGHT) {
|
|
800380a: 4b44 ldr r3, [pc, #272] @ (800391c <render+0x170>)
|
|
800380c: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
8003810: 2b02 cmp r3, #2
|
|
8003812: d061 beq.n 80038d8 <render+0x12c>
|
|
if (gs == GS_EXPLOSION) {
|
|
8003814: 4b41 ldr r3, [pc, #260] @ (800391c <render+0x170>)
|
|
8003816: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
800381a: 2b03 cmp r3, #3
|
|
800381c: d073 beq.n 8003906 <render+0x15a>
|
|
draw_ui();
|
|
800381e: f7ff fefb bl 8003618 <draw_ui>
|
|
oled_UpdateScreen();
|
|
8003822: f000 fa91 bl 8003d48 <oled_UpdateScreen>
|
|
}
|
|
8003826: b003 add sp, #12
|
|
8003828: ecbd 8b02 vpop {d8}
|
|
800382c: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
draw_worm(worms[1].x, worms[1].y, (current_player == 1 && gs != GS_GAMEOVER));
|
|
8003830: 4b3a ldr r3, [pc, #232] @ (800391c <render+0x170>)
|
|
8003832: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
8003836: 2b04 cmp r3, #4
|
|
8003838: d001 beq.n 800383e <render+0x92>
|
|
800383a: 2201 movs r2, #1
|
|
800383c: e7de b.n 80037fc <render+0x50>
|
|
800383e: 2200 movs r2, #0
|
|
8003840: e7dc b.n 80037fc <render+0x50>
|
|
Worm *w = &worms[current_player];
|
|
8003842: 4e36 ldr r6, [pc, #216] @ (800391c <render+0x170>)
|
|
8003844: f896 50a8 ldrb.w r5, [r6, #168] @ 0xa8
|
|
8003848: f106 0880 add.w r8, r6, #128 @ 0x80
|
|
800384c: 00af lsls r7, r5, #2
|
|
800384e: eb05 0385 add.w r3, r5, r5, lsl #2
|
|
8003852: eb08 0883 add.w r8, r8, r3, lsl #2
|
|
float rad = (float)w->angle_deg * 3.1415926f / 180.0f;
|
|
8003856: eb06 0383 add.w r3, r6, r3, lsl #2
|
|
800385a: edd3 7a23 vldr s15, [r3, #140] @ 0x8c
|
|
800385e: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
8003862: ed9f 7a2f vldr s14, [pc, #188] @ 8003920 <render+0x174>
|
|
8003866: ee67 7a87 vmul.f32 s15, s15, s14
|
|
800386a: ed9f 7a2e vldr s14, [pc, #184] @ 8003924 <render+0x178>
|
|
800386e: eec7 8a87 vdiv.f32 s17, s15, s14
|
|
int x2 = w->x + (int)(cosf(rad) * 10.0f);
|
|
8003872: f8d3 9080 ldr.w r9, [r3, #128] @ 0x80
|
|
8003876: eeb0 0a68 vmov.f32 s0, s17
|
|
800387a: f001 f991 bl 8004ba0 <cosf>
|
|
800387e: eeb2 8a04 vmov.f32 s16, #36 @ 0x41200000 10.0
|
|
8003882: ee20 0a08 vmul.f32 s0, s0, s16
|
|
8003886: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
800388a: ee10 4a10 vmov r4, s0
|
|
800388e: 444c add r4, r9
|
|
int y2 = w->y - (int)(sinf(rad) * 10.0f);
|
|
8003890: 442f add r7, r5
|
|
8003892: eb06 0787 add.w r7, r6, r7, lsl #2
|
|
8003896: f8d7 5084 ldr.w r5, [r7, #132] @ 0x84
|
|
800389a: eeb0 0a68 vmov.f32 s0, s17
|
|
800389e: f001 f9c3 bl 8004c28 <sinf>
|
|
80038a2: ee20 0a08 vmul.f32 s0, s0, s16
|
|
80038a6: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
line(w->x, w->y, x2, y2, White);
|
|
80038aa: 2301 movs r3, #1
|
|
80038ac: 9300 str r3, [sp, #0]
|
|
80038ae: ee10 3a10 vmov r3, s0
|
|
80038b2: 1aeb subs r3, r5, r3
|
|
80038b4: 4622 mov r2, r4
|
|
80038b6: 4629 mov r1, r5
|
|
80038b8: 4648 mov r0, r9
|
|
80038ba: f7ff fd8d bl 80033d8 <line>
|
|
float p = (gs == GS_CHARGE) ? charge_power : 0.55f;
|
|
80038be: f896 30a9 ldrb.w r3, [r6, #169] @ 0xa9
|
|
80038c2: 2b01 cmp r3, #1
|
|
80038c4: d005 beq.n 80038d2 <render+0x126>
|
|
80038c6: ed9f 0a18 vldr s0, [pc, #96] @ 8003928 <render+0x17c>
|
|
draw_short_trajectory_preview(w, p);
|
|
80038ca: 4640 mov r0, r8
|
|
80038cc: f7ff fdc6 bl 800345c <draw_short_trajectory_preview>
|
|
80038d0: e79b b.n 800380a <render+0x5e>
|
|
float p = (gs == GS_CHARGE) ? charge_power : 0.55f;
|
|
80038d2: ed96 0a2b vldr s0, [r6, #172] @ 0xac
|
|
80038d6: e7f8 b.n 80038ca <render+0x11e>
|
|
px((int)(proj_x + 0.5f), (int)(proj_y + 0.5f), White);
|
|
80038d8: 4b10 ldr r3, [pc, #64] @ (800391c <render+0x170>)
|
|
80038da: edd3 7a2d vldr s15, [r3, #180] @ 0xb4
|
|
80038de: eef6 6a00 vmov.f32 s13, #96 @ 0x3f000000 0.5
|
|
80038e2: ee77 7aa6 vadd.f32 s15, s15, s13
|
|
80038e6: ed93 7a2e vldr s14, [r3, #184] @ 0xb8
|
|
80038ea: ee37 7a26 vadd.f32 s14, s14, s13
|
|
80038ee: 2201 movs r2, #1
|
|
80038f0: eebd 7ac7 vcvt.s32.f32 s14, s14
|
|
80038f4: ee17 1a10 vmov r1, s14
|
|
80038f8: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80038fc: ee17 0a90 vmov r0, s15
|
|
8003900: f7ff fd24 bl 800334c <px>
|
|
8003904: e786 b.n 8003814 <render+0x68>
|
|
circle(expl_x, expl_y, expl_r, White);
|
|
8003906: 4805 ldr r0, [pc, #20] @ (800391c <render+0x170>)
|
|
8003908: 2301 movs r3, #1
|
|
800390a: f890 20b0 ldrb.w r2, [r0, #176] @ 0xb0
|
|
800390e: f8d0 10d0 ldr.w r1, [r0, #208] @ 0xd0
|
|
8003912: f8d0 00cc ldr.w r0, [r0, #204] @ 0xcc
|
|
8003916: f7ff fe15 bl 8003544 <circle>
|
|
800391a: e780 b.n 800381e <render+0x72>
|
|
800391c: 20004048 .word 0x20004048
|
|
8003920: 40490fda .word 0x40490fda
|
|
8003924: 43340000 .word 0x43340000
|
|
8003928: 3f0ccccd .word 0x3f0ccccd
|
|
|
|
0800392c <GameTask>:
|
|
|
|
// ===================== Game task =====================
|
|
static void GameTask(void *argument)
|
|
{
|
|
800392c: b530 push {r4, r5, lr}
|
|
800392e: b083 sub sp, #12
|
|
(void)argument;
|
|
|
|
int8_t last_key = -100;
|
|
|
|
TickType_t last_wake = xTaskGetTickCount();
|
|
8003930: f7fe fcf8 bl 8002324 <xTaskGetTickCount>
|
|
8003934: 9001 str r0, [sp, #4]
|
|
int8_t last_key = -100;
|
|
8003936: f06f 0563 mvn.w r5, #99 @ 0x63
|
|
800393a: e00f b.n 800395c <GameTask+0x30>
|
|
handle_key_press(key);
|
|
}
|
|
last_key = key;
|
|
|
|
// update
|
|
if (gs == GS_CHARGE) {
|
|
800393c: 4b12 ldr r3, [pc, #72] @ (8003988 <GameTask+0x5c>)
|
|
800393e: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9
|
|
8003942: 2b01 cmp r3, #1
|
|
8003944: d015 beq.n 8003972 <GameTask+0x46>
|
|
update_charge();
|
|
} else if (gs == GS_FLIGHT) {
|
|
8003946: 2b02 cmp r3, #2
|
|
8003948: d016 beq.n 8003978 <GameTask+0x4c>
|
|
update_flight((float)FRAME_MS / 1000.0f);
|
|
} else if (gs == GS_EXPLOSION) {
|
|
800394a: 2b03 cmp r3, #3
|
|
800394c: d019 beq.n 8003982 <GameTask+0x56>
|
|
update_explosion();
|
|
}
|
|
|
|
render();
|
|
800394e: f7ff ff2d bl 80037ac <render>
|
|
|
|
vTaskDelayUntil(&last_wake, period);
|
|
8003952: 211e movs r1, #30
|
|
8003954: a801 add r0, sp, #4
|
|
8003956: f7fe fdef bl 8002538 <vTaskDelayUntil>
|
|
last_key = key;
|
|
800395a: 4625 mov r5, r4
|
|
int8_t key = get_key();
|
|
800395c: f7ff fa60 bl 8002e20 <get_key>
|
|
8003960: 4604 mov r4, r0
|
|
if (key != last_key && key != -100) {
|
|
8003962: 4285 cmp r5, r0
|
|
8003964: d0ea beq.n 800393c <GameTask+0x10>
|
|
8003966: f110 0f64 cmn.w r0, #100 @ 0x64
|
|
800396a: d0e7 beq.n 800393c <GameTask+0x10>
|
|
handle_key_press(key);
|
|
800396c: f7ff fb00 bl 8002f70 <handle_key_press>
|
|
8003970: e7e4 b.n 800393c <GameTask+0x10>
|
|
update_charge();
|
|
8003972: f7ff f9cd bl 8002d10 <update_charge>
|
|
8003976: e7ea b.n 800394e <GameTask+0x22>
|
|
update_flight((float)FRAME_MS / 1000.0f);
|
|
8003978: ed9f 0a04 vldr s0, [pc, #16] @ 800398c <GameTask+0x60>
|
|
800397c: f7ff fc62 bl 8003244 <update_flight>
|
|
8003980: e7e5 b.n 800394e <GameTask+0x22>
|
|
update_explosion();
|
|
8003982: f7ff f9f9 bl 8002d78 <update_explosion>
|
|
8003986: e7e2 b.n 800394e <GameTask+0x22>
|
|
8003988: 20004048 .word 0x20004048
|
|
800398c: 3cf5c28f .word 0x3cf5c28f
|
|
|
|
08003990 <Game_Init>:
|
|
}
|
|
}
|
|
|
|
// ===================== Public API =====================
|
|
void Game_Init(void)
|
|
{
|
|
8003990: b530 push {r4, r5, lr}
|
|
8003992: b083 sub sp, #12
|
|
// init world
|
|
terrain_generate();
|
|
8003994: f7ff f962 bl 8002c5c <terrain_generate>
|
|
|
|
worms[0].hp = 100;
|
|
8003998: 4c19 ldr r4, [pc, #100] @ (8003a00 <Game_Init+0x70>)
|
|
800399a: 2364 movs r3, #100 @ 0x64
|
|
800399c: f8c4 3088 str.w r3, [r4, #136] @ 0x88
|
|
worms[1].hp = 100;
|
|
80039a0: f8c4 309c str.w r3, [r4, #156] @ 0x9c
|
|
|
|
worms[0].angle_deg = 45;
|
|
80039a4: 232d movs r3, #45 @ 0x2d
|
|
80039a6: f8c4 308c str.w r3, [r4, #140] @ 0x8c
|
|
worms[1].angle_deg = 135;
|
|
80039aa: 2387 movs r3, #135 @ 0x87
|
|
80039ac: f8c4 30a0 str.w r3, [r4, #160] @ 0xa0
|
|
|
|
worms[0].weapon_id = 0;
|
|
80039b0: 2500 movs r5, #0
|
|
80039b2: f884 5090 strb.w r5, [r4, #144] @ 0x90
|
|
worms[1].weapon_id = 0;
|
|
80039b6: f884 50a4 strb.w r5, [r4, #164] @ 0xa4
|
|
|
|
place_worm(0, 12);
|
|
80039ba: 210c movs r1, #12
|
|
80039bc: 4628 mov r0, r5
|
|
80039be: f7ff f97b bl 8002cb8 <place_worm>
|
|
place_worm(1, OLED_W - 13);
|
|
80039c2: 2173 movs r1, #115 @ 0x73
|
|
80039c4: 2001 movs r0, #1
|
|
80039c6: f7ff f977 bl 8002cb8 <place_worm>
|
|
|
|
current_player = 0;
|
|
80039ca: f884 50a8 strb.w r5, [r4, #168] @ 0xa8
|
|
gs = GS_AIM;
|
|
80039ce: f884 50a9 strb.w r5, [r4, #169] @ 0xa9
|
|
|
|
charge_power = 0.0f;
|
|
80039d2: 2300 movs r3, #0
|
|
80039d4: f8c4 30ac str.w r3, [r4, #172] @ 0xac
|
|
charge_dir = 1.0f;
|
|
80039d8: 4a0a ldr r2, [pc, #40] @ (8003a04 <Game_Init+0x74>)
|
|
80039da: f04f 517e mov.w r1, #1065353216 @ 0x3f800000
|
|
80039de: 6011 str r1, [r2, #0]
|
|
|
|
WIND = 0.0f;
|
|
80039e0: f8c4 30d4 str.w r3, [r4, #212] @ 0xd4
|
|
|
|
render();
|
|
80039e4: f7ff fee2 bl 80037ac <render>
|
|
(void)xTaskCreate(GameTask, "Game", 512, NULL, tskIDLE_PRIORITY + 2, NULL);
|
|
80039e8: 9501 str r5, [sp, #4]
|
|
80039ea: 2302 movs r3, #2
|
|
80039ec: 9300 str r3, [sp, #0]
|
|
80039ee: 462b mov r3, r5
|
|
80039f0: f44f 7200 mov.w r2, #512 @ 0x200
|
|
80039f4: 4904 ldr r1, [pc, #16] @ (8003a08 <Game_Init+0x78>)
|
|
80039f6: 4805 ldr r0, [pc, #20] @ (8003a0c <Game_Init+0x7c>)
|
|
80039f8: f7fe fc23 bl 8002242 <xTaskCreate>
|
|
}
|
|
80039fc: b003 add sp, #12
|
|
80039fe: bd30 pop {r4, r5, pc}
|
|
8003a00: 20004048 .word 0x20004048
|
|
8003a04: 20000024 .word 0x20000024
|
|
8003a08: 08007f78 .word 0x08007f78
|
|
8003a0c: 0800392d .word 0x0800392d
|
|
|
|
08003a10 <MX_GPIO_Init>:
|
|
* Output
|
|
* EVENT_OUT
|
|
* EXTI
|
|
*/
|
|
void MX_GPIO_Init(void)
|
|
{
|
|
8003a10: b084 sub sp, #16
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
8003a12: 2200 movs r2, #0
|
|
8003a14: 9200 str r2, [sp, #0]
|
|
8003a16: 4b15 ldr r3, [pc, #84] @ (8003a6c <MX_GPIO_Init+0x5c>)
|
|
8003a18: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a1a: f041 0180 orr.w r1, r1, #128 @ 0x80
|
|
8003a1e: 6319 str r1, [r3, #48] @ 0x30
|
|
8003a20: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a22: f001 0180 and.w r1, r1, #128 @ 0x80
|
|
8003a26: 9100 str r1, [sp, #0]
|
|
8003a28: 9900 ldr r1, [sp, #0]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8003a2a: 9201 str r2, [sp, #4]
|
|
8003a2c: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a2e: f041 0104 orr.w r1, r1, #4
|
|
8003a32: 6319 str r1, [r3, #48] @ 0x30
|
|
8003a34: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a36: f001 0104 and.w r1, r1, #4
|
|
8003a3a: 9101 str r1, [sp, #4]
|
|
8003a3c: 9901 ldr r1, [sp, #4]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8003a3e: 9202 str r2, [sp, #8]
|
|
8003a40: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a42: f041 0101 orr.w r1, r1, #1
|
|
8003a46: 6319 str r1, [r3, #48] @ 0x30
|
|
8003a48: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8003a4a: f001 0101 and.w r1, r1, #1
|
|
8003a4e: 9102 str r1, [sp, #8]
|
|
8003a50: 9902 ldr r1, [sp, #8]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8003a52: 9203 str r2, [sp, #12]
|
|
8003a54: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
8003a56: f042 0202 orr.w r2, r2, #2
|
|
8003a5a: 631a str r2, [r3, #48] @ 0x30
|
|
8003a5c: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8003a5e: f003 0302 and.w r3, r3, #2
|
|
8003a62: 9303 str r3, [sp, #12]
|
|
8003a64: 9b03 ldr r3, [sp, #12]
|
|
|
|
}
|
|
8003a66: b004 add sp, #16
|
|
8003a68: 4770 bx lr
|
|
8003a6a: bf00 nop
|
|
8003a6c: 40023800 .word 0x40023800
|
|
|
|
08003a70 <MX_I2C1_Init>:
|
|
|
|
I2C_HandleTypeDef hi2c1;
|
|
|
|
/* I2C1 init function */
|
|
void MX_I2C1_Init(void)
|
|
{
|
|
8003a70: b508 push {r3, lr}
|
|
/* USER CODE END I2C1_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2C1_Init 1 */
|
|
|
|
/* USER CODE END I2C1_Init 1 */
|
|
hi2c1.Instance = I2C1;
|
|
8003a72: 480b ldr r0, [pc, #44] @ (8003aa0 <MX_I2C1_Init+0x30>)
|
|
8003a74: 4b0b ldr r3, [pc, #44] @ (8003aa4 <MX_I2C1_Init+0x34>)
|
|
8003a76: 6003 str r3, [r0, #0]
|
|
hi2c1.Init.ClockSpeed = 100000;
|
|
8003a78: 4b0b ldr r3, [pc, #44] @ (8003aa8 <MX_I2C1_Init+0x38>)
|
|
8003a7a: 6043 str r3, [r0, #4]
|
|
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
|
8003a7c: 2300 movs r3, #0
|
|
8003a7e: 6083 str r3, [r0, #8]
|
|
hi2c1.Init.OwnAddress1 = 0;
|
|
8003a80: 60c3 str r3, [r0, #12]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
8003a82: f44f 4280 mov.w r2, #16384 @ 0x4000
|
|
8003a86: 6102 str r2, [r0, #16]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
8003a88: 6143 str r3, [r0, #20]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
8003a8a: 6183 str r3, [r0, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
8003a8c: 61c3 str r3, [r0, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
8003a8e: 6203 str r3, [r0, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
8003a90: f7fd f9da bl 8000e48 <HAL_I2C_Init>
|
|
8003a94: b900 cbnz r0, 8003a98 <MX_I2C1_Init+0x28>
|
|
}
|
|
/* USER CODE BEGIN I2C1_Init 2 */
|
|
|
|
/* USER CODE END I2C1_Init 2 */
|
|
|
|
}
|
|
8003a96: bd08 pop {r3, pc}
|
|
Error_Handler();
|
|
8003a98: f000 f8c4 bl 8003c24 <Error_Handler>
|
|
}
|
|
8003a9c: e7fb b.n 8003a96 <MX_I2C1_Init+0x26>
|
|
8003a9e: bf00 nop
|
|
8003aa0: 20004120 .word 0x20004120
|
|
8003aa4: 40005400 .word 0x40005400
|
|
8003aa8: 000186a0 .word 0x000186a0
|
|
|
|
08003aac <HAL_I2C_MspInit>:
|
|
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
|
|
{
|
|
8003aac: b530 push {r4, r5, lr}
|
|
8003aae: b089 sub sp, #36 @ 0x24
|
|
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8003ab0: 2300 movs r3, #0
|
|
8003ab2: 9303 str r3, [sp, #12]
|
|
8003ab4: 9304 str r3, [sp, #16]
|
|
8003ab6: 9305 str r3, [sp, #20]
|
|
8003ab8: 9306 str r3, [sp, #24]
|
|
8003aba: 9307 str r3, [sp, #28]
|
|
if(i2cHandle->Instance==I2C1)
|
|
8003abc: 6802 ldr r2, [r0, #0]
|
|
8003abe: 4b15 ldr r3, [pc, #84] @ (8003b14 <HAL_I2C_MspInit+0x68>)
|
|
8003ac0: 429a cmp r2, r3
|
|
8003ac2: d001 beq.n 8003ac8 <HAL_I2C_MspInit+0x1c>
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
/* USER CODE BEGIN I2C1_MspInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
}
|
|
}
|
|
8003ac4: b009 add sp, #36 @ 0x24
|
|
8003ac6: bd30 pop {r4, r5, pc}
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8003ac8: 2500 movs r5, #0
|
|
8003aca: 9501 str r5, [sp, #4]
|
|
8003acc: 4c12 ldr r4, [pc, #72] @ (8003b18 <HAL_I2C_MspInit+0x6c>)
|
|
8003ace: 6b23 ldr r3, [r4, #48] @ 0x30
|
|
8003ad0: f043 0302 orr.w r3, r3, #2
|
|
8003ad4: 6323 str r3, [r4, #48] @ 0x30
|
|
8003ad6: 6b23 ldr r3, [r4, #48] @ 0x30
|
|
8003ad8: f003 0302 and.w r3, r3, #2
|
|
8003adc: 9301 str r3, [sp, #4]
|
|
8003ade: 9b01 ldr r3, [sp, #4]
|
|
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
|
8003ae0: f44f 7340 mov.w r3, #768 @ 0x300
|
|
8003ae4: 9303 str r3, [sp, #12]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
8003ae6: 2312 movs r3, #18
|
|
8003ae8: 9304 str r3, [sp, #16]
|
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
8003aea: 2301 movs r3, #1
|
|
8003aec: 9305 str r3, [sp, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
8003aee: 2303 movs r3, #3
|
|
8003af0: 9306 str r3, [sp, #24]
|
|
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
|
|
8003af2: 2304 movs r3, #4
|
|
8003af4: 9307 str r3, [sp, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
8003af6: a903 add r1, sp, #12
|
|
8003af8: 4808 ldr r0, [pc, #32] @ (8003b1c <HAL_I2C_MspInit+0x70>)
|
|
8003afa: f7fc fe25 bl 8000748 <HAL_GPIO_Init>
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
8003afe: 9502 str r5, [sp, #8]
|
|
8003b00: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8003b02: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
|
|
8003b06: 6423 str r3, [r4, #64] @ 0x40
|
|
8003b08: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8003b0a: f403 1300 and.w r3, r3, #2097152 @ 0x200000
|
|
8003b0e: 9302 str r3, [sp, #8]
|
|
8003b10: 9b02 ldr r3, [sp, #8]
|
|
}
|
|
8003b12: e7d7 b.n 8003ac4 <HAL_I2C_MspInit+0x18>
|
|
8003b14: 40005400 .word 0x40005400
|
|
8003b18: 40023800 .word 0x40023800
|
|
8003b1c: 40020400 .word 0x40020400
|
|
|
|
08003b20 <Set_Keyboard>:
|
|
#include "sdk_uart.h"
|
|
#include "usart.h"
|
|
|
|
#define KBRD_ADDR 0xE2
|
|
|
|
HAL_StatusTypeDef Set_Keyboard( void ) {
|
|
8003b20: b510 push {r4, lr}
|
|
8003b22: b082 sub sp, #8
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
uint8_t buf;
|
|
|
|
buf = 0;
|
|
8003b24: 2300 movs r3, #0
|
|
8003b26: f88d 3007 strb.w r3, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, POLARITY_INVERSION, &buf);
|
|
8003b2a: f10d 0207 add.w r2, sp, #7
|
|
8003b2e: 2102 movs r1, #2
|
|
8003b30: 20e2 movs r0, #226 @ 0xe2
|
|
8003b32: f000 fa55 bl 8003fe0 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8003b36: b968 cbnz r0, 8003b54 <Set_Keyboard+0x34>
|
|
UART_Transmit((uint8_t*)"Error write polarity\n");
|
|
goto exit;
|
|
}
|
|
|
|
buf = 0;
|
|
8003b38: 2300 movs r3, #0
|
|
8003b3a: f88d 3007 strb.w r3, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, OUTPUT_PORT, &buf);
|
|
8003b3e: f10d 0207 add.w r2, sp, #7
|
|
8003b42: 2101 movs r1, #1
|
|
8003b44: 20e2 movs r0, #226 @ 0xe2
|
|
8003b46: f000 fa4b bl 8003fe0 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8003b4a: 4604 mov r4, r0
|
|
8003b4c: b938 cbnz r0, 8003b5e <Set_Keyboard+0x3e>
|
|
UART_Transmit((uint8_t*)"Error write output\n");
|
|
}
|
|
|
|
exit:
|
|
return ret;
|
|
}
|
|
8003b4e: 4620 mov r0, r4
|
|
8003b50: b002 add sp, #8
|
|
8003b52: bd10 pop {r4, pc}
|
|
8003b54: 4604 mov r4, r0
|
|
UART_Transmit((uint8_t*)"Error write polarity\n");
|
|
8003b56: 4804 ldr r0, [pc, #16] @ (8003b68 <Set_Keyboard+0x48>)
|
|
8003b58: f000 fa5c bl 8004014 <UART_Transmit>
|
|
goto exit;
|
|
8003b5c: e7f7 b.n 8003b4e <Set_Keyboard+0x2e>
|
|
UART_Transmit((uint8_t*)"Error write output\n");
|
|
8003b5e: 4803 ldr r0, [pc, #12] @ (8003b6c <Set_Keyboard+0x4c>)
|
|
8003b60: f000 fa58 bl 8004014 <UART_Transmit>
|
|
8003b64: e7f3 b.n 8003b4e <Set_Keyboard+0x2e>
|
|
8003b66: bf00 nop
|
|
8003b68: 08007f98 .word 0x08007f98
|
|
8003b6c: 08007fb0 .word 0x08007fb0
|
|
|
|
08003b70 <Check_Row>:
|
|
|
|
uint8_t Check_Row( uint8_t Nrow ) {
|
|
8003b70: b510 push {r4, lr}
|
|
8003b72: b082 sub sp, #8
|
|
8003b74: 4604 mov r4, r0
|
|
uint8_t Nkey = 0x00;
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
uint8_t buf;
|
|
uint8_t kbd_in;
|
|
|
|
ret = Set_Keyboard();
|
|
8003b76: f7ff ffd3 bl 8003b20 <Set_Keyboard>
|
|
if( ret != HAL_OK ) {
|
|
8003b7a: bb08 cbnz r0, 8003bc0 <Check_Row+0x50>
|
|
UART_Transmit((uint8_t*)"Error write init\n");
|
|
}
|
|
|
|
buf = Nrow;
|
|
8003b7c: f88d 4007 strb.w r4, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, CONFIG, &buf);
|
|
8003b80: f10d 0207 add.w r2, sp, #7
|
|
8003b84: 2103 movs r1, #3
|
|
8003b86: 20e2 movs r0, #226 @ 0xe2
|
|
8003b88: f000 fa2a bl 8003fe0 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8003b8c: b9e0 cbnz r0, 8003bc8 <Check_Row+0x58>
|
|
UART_Transmit((uint8_t*)"Error write config\n");
|
|
}
|
|
|
|
ret = PCA9538_Read_Inputs(KBRD_ADDR, &buf);
|
|
8003b8e: f10d 0107 add.w r1, sp, #7
|
|
8003b92: 20e2 movs r0, #226 @ 0xe2
|
|
8003b94: f000 fa38 bl 8004008 <PCA9538_Read_Inputs>
|
|
if( ret != HAL_OK ) {
|
|
8003b98: b9d0 cbnz r0, 8003bd0 <Check_Row+0x60>
|
|
UART_Transmit((uint8_t*)"Read error\n");
|
|
}
|
|
|
|
kbd_in = buf & 0x70;
|
|
8003b9a: f89d 3007 ldrb.w r3, [sp, #7]
|
|
8003b9e: f003 0070 and.w r0, r3, #112 @ 0x70
|
|
Nkey = kbd_in;
|
|
if( kbd_in != 0x70) {
|
|
8003ba2: 2870 cmp r0, #112 @ 0x70
|
|
8003ba4: d033 beq.n 8003c0e <Check_Row+0x9e>
|
|
if( !(kbd_in & 0x10) ) {
|
|
8003ba6: f013 0f10 tst.w r3, #16
|
|
8003baa: d116 bne.n 8003bda <Check_Row+0x6a>
|
|
switch (Nrow) {
|
|
8003bac: f1a4 02f7 sub.w r2, r4, #247 @ 0xf7
|
|
8003bb0: 2a07 cmp r2, #7
|
|
8003bb2: d812 bhi.n 8003bda <Check_Row+0x6a>
|
|
8003bb4: e8df f002 tbb [pc, r2]
|
|
8003bb8: 11111110 .word 0x11111110
|
|
8003bbc: 10101110 .word 0x10101110
|
|
UART_Transmit((uint8_t*)"Error write init\n");
|
|
8003bc0: 4815 ldr r0, [pc, #84] @ (8003c18 <Check_Row+0xa8>)
|
|
8003bc2: f000 fa27 bl 8004014 <UART_Transmit>
|
|
8003bc6: e7d9 b.n 8003b7c <Check_Row+0xc>
|
|
UART_Transmit((uint8_t*)"Error write config\n");
|
|
8003bc8: 4814 ldr r0, [pc, #80] @ (8003c1c <Check_Row+0xac>)
|
|
8003bca: f000 fa23 bl 8004014 <UART_Transmit>
|
|
8003bce: e7de b.n 8003b8e <Check_Row+0x1e>
|
|
UART_Transmit((uint8_t*)"Read error\n");
|
|
8003bd0: 4813 ldr r0, [pc, #76] @ (8003c20 <Check_Row+0xb0>)
|
|
8003bd2: f000 fa1f bl 8004014 <UART_Transmit>
|
|
8003bd6: e7e0 b.n 8003b9a <Check_Row+0x2a>
|
|
case ROW1:
|
|
Nkey = 0x04;
|
|
8003bd8: 2004 movs r0, #4
|
|
case ROW4:
|
|
Nkey = 0x04;
|
|
break;
|
|
}
|
|
}
|
|
if( !(kbd_in & 0x20) ) {
|
|
8003bda: f013 0f20 tst.w r3, #32
|
|
8003bde: d10a bne.n 8003bf6 <Check_Row+0x86>
|
|
switch (Nrow) {
|
|
8003be0: f1a4 02f7 sub.w r2, r4, #247 @ 0xf7
|
|
8003be4: 2a07 cmp r2, #7
|
|
8003be6: d806 bhi.n 8003bf6 <Check_Row+0x86>
|
|
8003be8: e8df f002 tbb [pc, r2]
|
|
8003bec: 05050504 .word 0x05050504
|
|
8003bf0: 04040504 .word 0x04040504
|
|
case ROW1:
|
|
Nkey = 0x02;
|
|
8003bf4: 2002 movs r0, #2
|
|
case ROW4:
|
|
Nkey = 0x02;
|
|
break;
|
|
}
|
|
}
|
|
if( !(kbd_in & 0x40) ) {
|
|
8003bf6: f013 0f40 tst.w r3, #64 @ 0x40
|
|
8003bfa: d109 bne.n 8003c10 <Check_Row+0xa0>
|
|
switch (Nrow) {
|
|
8003bfc: 3cf7 subs r4, #247 @ 0xf7
|
|
8003bfe: 2c07 cmp r4, #7
|
|
8003c00: d806 bhi.n 8003c10 <Check_Row+0xa0>
|
|
8003c02: e8df f004 tbb [pc, r4]
|
|
8003c06: 0507 .short 0x0507
|
|
8003c08: 05070505 .word 0x05070505
|
|
8003c0c: 0707 .short 0x0707
|
|
Nkey = 0x01;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else Nkey = 0x00;
|
|
8003c0e: 2000 movs r0, #0
|
|
|
|
return Nkey;
|
|
}
|
|
8003c10: b002 add sp, #8
|
|
8003c12: bd10 pop {r4, pc}
|
|
Nkey = 0x01;
|
|
8003c14: 2001 movs r0, #1
|
|
8003c16: e7fb b.n 8003c10 <Check_Row+0xa0>
|
|
8003c18: 08007fc4 .word 0x08007fc4
|
|
8003c1c: 08007fd8 .word 0x08007fd8
|
|
8003c20: 08007fec .word 0x08007fec
|
|
|
|
08003c24 <Error_Handler>:
|
|
\details Disables IRQ interrupts by setting special-purpose register PRIMASK.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
8003c24: b672 cpsid i
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
__disable_irq();
|
|
while (1)
|
|
8003c26: e7fe b.n 8003c26 <Error_Handler+0x2>
|
|
|
|
08003c28 <SystemClock_Config>:
|
|
{
|
|
8003c28: b500 push {lr}
|
|
8003c2a: b095 sub sp, #84 @ 0x54
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
8003c2c: 2230 movs r2, #48 @ 0x30
|
|
8003c2e: 2100 movs r1, #0
|
|
8003c30: a808 add r0, sp, #32
|
|
8003c32: f000 fb19 bl 8004268 <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8003c36: 2300 movs r3, #0
|
|
8003c38: 9303 str r3, [sp, #12]
|
|
8003c3a: 9304 str r3, [sp, #16]
|
|
8003c3c: 9305 str r3, [sp, #20]
|
|
8003c3e: 9306 str r3, [sp, #24]
|
|
8003c40: 9307 str r3, [sp, #28]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8003c42: 9301 str r3, [sp, #4]
|
|
8003c44: 4a21 ldr r2, [pc, #132] @ (8003ccc <SystemClock_Config+0xa4>)
|
|
8003c46: 6c11 ldr r1, [r2, #64] @ 0x40
|
|
8003c48: f041 5180 orr.w r1, r1, #268435456 @ 0x10000000
|
|
8003c4c: 6411 str r1, [r2, #64] @ 0x40
|
|
8003c4e: 6c12 ldr r2, [r2, #64] @ 0x40
|
|
8003c50: f002 5280 and.w r2, r2, #268435456 @ 0x10000000
|
|
8003c54: 9201 str r2, [sp, #4]
|
|
8003c56: 9a01 ldr r2, [sp, #4]
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
|
8003c58: 9302 str r3, [sp, #8]
|
|
8003c5a: 4b1d ldr r3, [pc, #116] @ (8003cd0 <SystemClock_Config+0xa8>)
|
|
8003c5c: 681a ldr r2, [r3, #0]
|
|
8003c5e: f442 4280 orr.w r2, r2, #16384 @ 0x4000
|
|
8003c62: 601a str r2, [r3, #0]
|
|
8003c64: 681b ldr r3, [r3, #0]
|
|
8003c66: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
8003c6a: 9302 str r3, [sp, #8]
|
|
8003c6c: 9b02 ldr r3, [sp, #8]
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
8003c6e: 2301 movs r3, #1
|
|
8003c70: 9308 str r3, [sp, #32]
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
8003c72: f44f 3380 mov.w r3, #65536 @ 0x10000
|
|
8003c76: 9309 str r3, [sp, #36] @ 0x24
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
8003c78: 2302 movs r3, #2
|
|
8003c7a: 930e str r3, [sp, #56] @ 0x38
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
8003c7c: f44f 0280 mov.w r2, #4194304 @ 0x400000
|
|
8003c80: 920f str r2, [sp, #60] @ 0x3c
|
|
RCC_OscInitStruct.PLL.PLLM = 25;
|
|
8003c82: 2219 movs r2, #25
|
|
8003c84: 9210 str r2, [sp, #64] @ 0x40
|
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
|
8003c86: f44f 72a8 mov.w r2, #336 @ 0x150
|
|
8003c8a: 9211 str r2, [sp, #68] @ 0x44
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
|
8003c8c: 9312 str r3, [sp, #72] @ 0x48
|
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
|
8003c8e: 2304 movs r3, #4
|
|
8003c90: 9313 str r3, [sp, #76] @ 0x4c
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
8003c92: a808 add r0, sp, #32
|
|
8003c94: f7fd fbe4 bl 8001460 <HAL_RCC_OscConfig>
|
|
8003c98: b998 cbnz r0, 8003cc2 <SystemClock_Config+0x9a>
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
8003c9a: 230f movs r3, #15
|
|
8003c9c: 9303 str r3, [sp, #12]
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
8003c9e: 2302 movs r3, #2
|
|
8003ca0: 9304 str r3, [sp, #16]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
8003ca2: 2300 movs r3, #0
|
|
8003ca4: 9305 str r3, [sp, #20]
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
|
8003ca6: f44f 53a0 mov.w r3, #5120 @ 0x1400
|
|
8003caa: 9306 str r3, [sp, #24]
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
8003cac: f44f 5380 mov.w r3, #4096 @ 0x1000
|
|
8003cb0: 9307 str r3, [sp, #28]
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
|
8003cb2: 2105 movs r1, #5
|
|
8003cb4: a803 add r0, sp, #12
|
|
8003cb6: f7fd fe23 bl 8001900 <HAL_RCC_ClockConfig>
|
|
8003cba: b920 cbnz r0, 8003cc6 <SystemClock_Config+0x9e>
|
|
}
|
|
8003cbc: b015 add sp, #84 @ 0x54
|
|
8003cbe: f85d fb04 ldr.w pc, [sp], #4
|
|
Error_Handler();
|
|
8003cc2: f7ff ffaf bl 8003c24 <Error_Handler>
|
|
Error_Handler();
|
|
8003cc6: f7ff ffad bl 8003c24 <Error_Handler>
|
|
8003cca: bf00 nop
|
|
8003ccc: 40023800 .word 0x40023800
|
|
8003cd0: 40007000 .word 0x40007000
|
|
|
|
08003cd4 <main>:
|
|
{
|
|
8003cd4: b508 push {r3, lr}
|
|
HAL_Init();
|
|
8003cd6: f7fc fc8d bl 80005f4 <HAL_Init>
|
|
SystemClock_Config();
|
|
8003cda: f7ff ffa5 bl 8003c28 <SystemClock_Config>
|
|
MX_GPIO_Init();
|
|
8003cde: f7ff fe97 bl 8003a10 <MX_GPIO_Init>
|
|
MX_I2C1_Init();
|
|
8003ce2: f7ff fec5 bl 8003a70 <MX_I2C1_Init>
|
|
MX_USART6_UART_Init();
|
|
8003ce6: f000 fa21 bl 800412c <MX_USART6_UART_Init>
|
|
oled_Init();
|
|
8003cea: f000 f855 bl 8003d98 <oled_Init>
|
|
Game_Init();
|
|
8003cee: f7ff fe4f bl 8003990 <Game_Init>
|
|
MX_FREERTOS_Init();
|
|
8003cf2: f7fe ff8f bl 8002c14 <MX_FREERTOS_Init>
|
|
osKernelStart();
|
|
8003cf6: f7fe f86e bl 8001dd6 <osKernelStart>
|
|
while (1)
|
|
8003cfa: e7fe b.n 8003cfa <main+0x26>
|
|
|
|
08003cfc <oled_WriteCommand>:
|
|
static uint8_t OLED_Buffer[1024];
|
|
|
|
static OLED_t OLED;
|
|
|
|
|
|
static void oled_WriteCommand(uint8_t command) {
|
|
8003cfc: b500 push {lr}
|
|
8003cfe: b087 sub sp, #28
|
|
8003d00: f88d 0017 strb.w r0, [sp, #23]
|
|
HAL_I2C_Mem_Write(&hi2c1,OLED_I2C_ADDR,0x00,1,&command,1,10);
|
|
8003d04: 230a movs r3, #10
|
|
8003d06: 9302 str r3, [sp, #8]
|
|
8003d08: 2301 movs r3, #1
|
|
8003d0a: 9301 str r3, [sp, #4]
|
|
8003d0c: f10d 0217 add.w r2, sp, #23
|
|
8003d10: 9200 str r2, [sp, #0]
|
|
8003d12: 2200 movs r2, #0
|
|
8003d14: 2178 movs r1, #120 @ 0x78
|
|
8003d16: 4803 ldr r0, [pc, #12] @ (8003d24 <oled_WriteCommand+0x28>)
|
|
8003d18: f7fd f974 bl 8001004 <HAL_I2C_Mem_Write>
|
|
}
|
|
8003d1c: b007 add sp, #28
|
|
8003d1e: f85d fb04 ldr.w pc, [sp], #4
|
|
8003d22: bf00 nop
|
|
8003d24: 20004120 .word 0x20004120
|
|
|
|
08003d28 <oled_Fill>:
|
|
}
|
|
|
|
void oled_Fill(OLED_COLOR color) {
|
|
uint32_t i;
|
|
|
|
for(i = 0; i < sizeof(OLED_Buffer); i++) {
|
|
8003d28: 2300 movs r3, #0
|
|
8003d2a: e003 b.n 8003d34 <oled_Fill+0xc>
|
|
OLED_Buffer[i] = (color == Black) ? 0x00 : 0xFF;
|
|
8003d2c: 21ff movs r1, #255 @ 0xff
|
|
8003d2e: 4a05 ldr r2, [pc, #20] @ (8003d44 <oled_Fill+0x1c>)
|
|
8003d30: 54d1 strb r1, [r2, r3]
|
|
for(i = 0; i < sizeof(OLED_Buffer); i++) {
|
|
8003d32: 3301 adds r3, #1
|
|
8003d34: f5b3 6f80 cmp.w r3, #1024 @ 0x400
|
|
8003d38: d203 bcs.n 8003d42 <oled_Fill+0x1a>
|
|
OLED_Buffer[i] = (color == Black) ? 0x00 : 0xFF;
|
|
8003d3a: 2800 cmp r0, #0
|
|
8003d3c: d1f6 bne.n 8003d2c <oled_Fill+0x4>
|
|
8003d3e: 4601 mov r1, r0
|
|
8003d40: e7f5 b.n 8003d2e <oled_Fill+0x6>
|
|
}
|
|
}
|
|
8003d42: 4770 bx lr
|
|
8003d44: 20004174 .word 0x20004174
|
|
|
|
08003d48 <oled_UpdateScreen>:
|
|
|
|
|
|
void oled_UpdateScreen(void) {
|
|
8003d48: b510 push {r4, lr}
|
|
8003d4a: b084 sub sp, #16
|
|
uint8_t i;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
8003d4c: 2400 movs r4, #0
|
|
8003d4e: e01a b.n 8003d86 <oled_UpdateScreen+0x3e>
|
|
oled_WriteCommand(0xB0 + i);
|
|
8003d50: f1a4 0050 sub.w r0, r4, #80 @ 0x50
|
|
8003d54: b2c0 uxtb r0, r0
|
|
8003d56: f7ff ffd1 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
8003d5a: 2000 movs r0, #0
|
|
8003d5c: f7ff ffce bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
8003d60: 2010 movs r0, #16
|
|
8003d62: f7ff ffcb bl 8003cfc <oled_WriteCommand>
|
|
|
|
HAL_I2C_Mem_Write(&hi2c1,OLED_I2C_ADDR,0x40,1,&OLED_Buffer[OLED_WIDTH * i],OLED_WIDTH,100);
|
|
8003d66: 2364 movs r3, #100 @ 0x64
|
|
8003d68: 9302 str r3, [sp, #8]
|
|
8003d6a: 2380 movs r3, #128 @ 0x80
|
|
8003d6c: 9301 str r3, [sp, #4]
|
|
8003d6e: 4b08 ldr r3, [pc, #32] @ (8003d90 <oled_UpdateScreen+0x48>)
|
|
8003d70: eb03 13c4 add.w r3, r3, r4, lsl #7
|
|
8003d74: 9300 str r3, [sp, #0]
|
|
8003d76: 2301 movs r3, #1
|
|
8003d78: 2240 movs r2, #64 @ 0x40
|
|
8003d7a: 2178 movs r1, #120 @ 0x78
|
|
8003d7c: 4805 ldr r0, [pc, #20] @ (8003d94 <oled_UpdateScreen+0x4c>)
|
|
8003d7e: f7fd f941 bl 8001004 <HAL_I2C_Mem_Write>
|
|
for (i = 0; i < 8; i++) {
|
|
8003d82: 3401 adds r4, #1
|
|
8003d84: b2e4 uxtb r4, r4
|
|
8003d86: 2c07 cmp r4, #7
|
|
8003d88: d9e2 bls.n 8003d50 <oled_UpdateScreen+0x8>
|
|
}
|
|
}
|
|
8003d8a: b004 add sp, #16
|
|
8003d8c: bd10 pop {r4, pc}
|
|
8003d8e: bf00 nop
|
|
8003d90: 20004174 .word 0x20004174
|
|
8003d94: 20004120 .word 0x20004120
|
|
|
|
08003d98 <oled_Init>:
|
|
uint8_t oled_Init(void) {
|
|
8003d98: b508 push {r3, lr}
|
|
HAL_Delay(100);
|
|
8003d9a: 2064 movs r0, #100 @ 0x64
|
|
8003d9c: f7fc fc56 bl 800064c <HAL_Delay>
|
|
oled_WriteCommand(0xAE);
|
|
8003da0: 20ae movs r0, #174 @ 0xae
|
|
8003da2: f7ff ffab bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x20);
|
|
8003da6: 2020 movs r0, #32
|
|
8003da8: f7ff ffa8 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
8003dac: 2010 movs r0, #16
|
|
8003dae: f7ff ffa5 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xB0);
|
|
8003db2: 20b0 movs r0, #176 @ 0xb0
|
|
8003db4: f7ff ffa2 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xC8);
|
|
8003db8: 20c8 movs r0, #200 @ 0xc8
|
|
8003dba: f7ff ff9f bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
8003dbe: 2000 movs r0, #0
|
|
8003dc0: f7ff ff9c bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
8003dc4: 2010 movs r0, #16
|
|
8003dc6: f7ff ff99 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x40);
|
|
8003dca: 2040 movs r0, #64 @ 0x40
|
|
8003dcc: f7ff ff96 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x81);
|
|
8003dd0: 2081 movs r0, #129 @ 0x81
|
|
8003dd2: f7ff ff93 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xFF);
|
|
8003dd6: 20ff movs r0, #255 @ 0xff
|
|
8003dd8: f7ff ff90 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xA1);
|
|
8003ddc: 20a1 movs r0, #161 @ 0xa1
|
|
8003dde: f7ff ff8d bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xA6);
|
|
8003de2: 20a6 movs r0, #166 @ 0xa6
|
|
8003de4: f7ff ff8a bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xA8);
|
|
8003de8: 20a8 movs r0, #168 @ 0xa8
|
|
8003dea: f7ff ff87 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x3F);
|
|
8003dee: 203f movs r0, #63 @ 0x3f
|
|
8003df0: f7ff ff84 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xA4);
|
|
8003df4: 20a4 movs r0, #164 @ 0xa4
|
|
8003df6: f7ff ff81 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xD3);
|
|
8003dfa: 20d3 movs r0, #211 @ 0xd3
|
|
8003dfc: f7ff ff7e bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
8003e00: 2000 movs r0, #0
|
|
8003e02: f7ff ff7b bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xD5);
|
|
8003e06: 20d5 movs r0, #213 @ 0xd5
|
|
8003e08: f7ff ff78 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xF0);
|
|
8003e0c: 20f0 movs r0, #240 @ 0xf0
|
|
8003e0e: f7ff ff75 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xD9);
|
|
8003e12: 20d9 movs r0, #217 @ 0xd9
|
|
8003e14: f7ff ff72 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x22);
|
|
8003e18: 2022 movs r0, #34 @ 0x22
|
|
8003e1a: f7ff ff6f bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xDA);
|
|
8003e1e: 20da movs r0, #218 @ 0xda
|
|
8003e20: f7ff ff6c bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x12);
|
|
8003e24: 2012 movs r0, #18
|
|
8003e26: f7ff ff69 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xDB);
|
|
8003e2a: 20db movs r0, #219 @ 0xdb
|
|
8003e2c: f7ff ff66 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x20);
|
|
8003e30: 2020 movs r0, #32
|
|
8003e32: f7ff ff63 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x8D);
|
|
8003e36: 208d movs r0, #141 @ 0x8d
|
|
8003e38: f7ff ff60 bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0x14);
|
|
8003e3c: 2014 movs r0, #20
|
|
8003e3e: f7ff ff5d bl 8003cfc <oled_WriteCommand>
|
|
oled_WriteCommand(0xAF);
|
|
8003e42: 20af movs r0, #175 @ 0xaf
|
|
8003e44: f7ff ff5a bl 8003cfc <oled_WriteCommand>
|
|
oled_Fill(Black);
|
|
8003e48: 2000 movs r0, #0
|
|
8003e4a: f7ff ff6d bl 8003d28 <oled_Fill>
|
|
oled_UpdateScreen();
|
|
8003e4e: f7ff ff7b bl 8003d48 <oled_UpdateScreen>
|
|
OLED.CurrentX = 0;
|
|
8003e52: 4b05 ldr r3, [pc, #20] @ (8003e68 <oled_Init+0xd0>)
|
|
8003e54: 2200 movs r2, #0
|
|
8003e56: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400
|
|
OLED.CurrentY = 0;
|
|
8003e5a: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402
|
|
OLED.Initialized = 1;
|
|
8003e5e: 2001 movs r0, #1
|
|
8003e60: f883 0405 strb.w r0, [r3, #1029] @ 0x405
|
|
}
|
|
8003e64: bd08 pop {r3, pc}
|
|
8003e66: bf00 nop
|
|
8003e68: 20004174 .word 0x20004174
|
|
|
|
08003e6c <oled_DrawPixel>:
|
|
|
|
void oled_DrawPixel(uint8_t x, uint8_t y, OLED_COLOR color) {
|
|
if (x >= OLED_WIDTH || y >= OLED_HEIGHT) {
|
|
8003e6c: f010 0f80 tst.w r0, #128 @ 0x80
|
|
8003e70: d126 bne.n 8003ec0 <oled_DrawPixel+0x54>
|
|
8003e72: 293f cmp r1, #63 @ 0x3f
|
|
8003e74: d824 bhi.n 8003ec0 <oled_DrawPixel+0x54>
|
|
void oled_DrawPixel(uint8_t x, uint8_t y, OLED_COLOR color) {
|
|
8003e76: b410 push {r4}
|
|
return;
|
|
}
|
|
|
|
if (OLED.Inverted) {
|
|
8003e78: 4b12 ldr r3, [pc, #72] @ (8003ec4 <oled_DrawPixel+0x58>)
|
|
8003e7a: f893 3404 ldrb.w r3, [r3, #1028] @ 0x404
|
|
8003e7e: b113 cbz r3, 8003e86 <oled_DrawPixel+0x1a>
|
|
color = (OLED_COLOR)!color;
|
|
8003e80: fab2 f282 clz r2, r2
|
|
8003e84: 0952 lsrs r2, r2, #5
|
|
}
|
|
|
|
if (color == White) {
|
|
8003e86: 2a01 cmp r2, #1
|
|
8003e88: d00f beq.n 8003eaa <oled_DrawPixel+0x3e>
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] |= 1 << (y % 8);
|
|
} else {
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] &= ~(1 << (y % 8));
|
|
8003e8a: 08cb lsrs r3, r1, #3
|
|
8003e8c: eb00 10c3 add.w r0, r0, r3, lsl #7
|
|
8003e90: 4c0c ldr r4, [pc, #48] @ (8003ec4 <oled_DrawPixel+0x58>)
|
|
8003e92: 5c22 ldrb r2, [r4, r0]
|
|
8003e94: f001 0107 and.w r1, r1, #7
|
|
8003e98: 2301 movs r3, #1
|
|
8003e9a: 408b lsls r3, r1
|
|
8003e9c: 43db mvns r3, r3
|
|
8003e9e: b25b sxtb r3, r3
|
|
8003ea0: 4013 ands r3, r2
|
|
8003ea2: 5423 strb r3, [r4, r0]
|
|
}
|
|
}
|
|
8003ea4: f85d 4b04 ldr.w r4, [sp], #4
|
|
8003ea8: 4770 bx lr
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] |= 1 << (y % 8);
|
|
8003eaa: 08cb lsrs r3, r1, #3
|
|
8003eac: eb00 10c3 add.w r0, r0, r3, lsl #7
|
|
8003eb0: 4c04 ldr r4, [pc, #16] @ (8003ec4 <oled_DrawPixel+0x58>)
|
|
8003eb2: 5c23 ldrb r3, [r4, r0]
|
|
8003eb4: f001 0107 and.w r1, r1, #7
|
|
8003eb8: 408a lsls r2, r1
|
|
8003eba: 4313 orrs r3, r2
|
|
8003ebc: 5423 strb r3, [r4, r0]
|
|
8003ebe: e7f1 b.n 8003ea4 <oled_DrawPixel+0x38>
|
|
8003ec0: 4770 bx lr
|
|
8003ec2: bf00 nop
|
|
8003ec4: 20004174 .word 0x20004174
|
|
|
|
08003ec8 <oled_WriteChar>:
|
|
oled_DrawHLine(x1, x2, y1, color);
|
|
oled_DrawHLine(x1, x2, y2, color);
|
|
oled_DrawVLine(y1, y2, x1, color);
|
|
oled_DrawVLine(y1, y2, x2, color);
|
|
}
|
|
char oled_WriteChar(char ch, FontDef Font, OLED_COLOR color) {
|
|
8003ec8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8003ecc: b082 sub sp, #8
|
|
8003ece: 4681 mov r9, r0
|
|
8003ed0: a802 add r0, sp, #8
|
|
8003ed2: e900 0006 stmdb r0, {r1, r2}
|
|
8003ed6: 4698 mov r8, r3
|
|
uint32_t i, b, j;
|
|
|
|
if (OLED_WIDTH <= (OLED.CurrentX + Font.FontWidth) ||
|
|
8003ed8: 4b27 ldr r3, [pc, #156] @ (8003f78 <oled_WriteChar+0xb0>)
|
|
8003eda: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400
|
|
8003ede: f89d 6000 ldrb.w r6, [sp]
|
|
8003ee2: 4433 add r3, r6
|
|
8003ee4: 2b7f cmp r3, #127 @ 0x7f
|
|
8003ee6: dc42 bgt.n 8003f6e <oled_WriteChar+0xa6>
|
|
OLED_HEIGHT <= (OLED.CurrentY + Font.FontHeight)) {
|
|
8003ee8: 4b23 ldr r3, [pc, #140] @ (8003f78 <oled_WriteChar+0xb0>)
|
|
8003eea: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402
|
|
8003eee: f89d a001 ldrb.w sl, [sp, #1]
|
|
8003ef2: 4453 add r3, sl
|
|
if (OLED_WIDTH <= (OLED.CurrentX + Font.FontWidth) ||
|
|
8003ef4: 2b3f cmp r3, #63 @ 0x3f
|
|
8003ef6: dc3c bgt.n 8003f72 <oled_WriteChar+0xaa>
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < Font.FontHeight; i++) {
|
|
8003ef8: 2500 movs r5, #0
|
|
8003efa: e023 b.n 8003f44 <oled_WriteChar+0x7c>
|
|
b = Font.data[(ch - 32) * Font.FontHeight + i];
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
if ((b << j) & 0x8000) {
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR) color);
|
|
} else {
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR)!color);
|
|
8003efc: 4b1e ldr r3, [pc, #120] @ (8003f78 <oled_WriteChar+0xb0>)
|
|
8003efe: f8b3 0400 ldrh.w r0, [r3, #1024] @ 0x400
|
|
8003f02: f8b3 1402 ldrh.w r1, [r3, #1026] @ 0x402
|
|
8003f06: 4429 add r1, r5
|
|
8003f08: 4420 add r0, r4
|
|
8003f0a: fab8 f288 clz r2, r8
|
|
8003f0e: 0952 lsrs r2, r2, #5
|
|
8003f10: b2c9 uxtb r1, r1
|
|
8003f12: b2c0 uxtb r0, r0
|
|
8003f14: f7ff ffaa bl 8003e6c <oled_DrawPixel>
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
8003f18: 3401 adds r4, #1
|
|
8003f1a: 42a6 cmp r6, r4
|
|
8003f1c: d911 bls.n 8003f42 <oled_WriteChar+0x7a>
|
|
if ((b << j) & 0x8000) {
|
|
8003f1e: fa07 f304 lsl.w r3, r7, r4
|
|
8003f22: f413 4f00 tst.w r3, #32768 @ 0x8000
|
|
8003f26: d0e9 beq.n 8003efc <oled_WriteChar+0x34>
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR) color);
|
|
8003f28: 4b13 ldr r3, [pc, #76] @ (8003f78 <oled_WriteChar+0xb0>)
|
|
8003f2a: f8b3 0400 ldrh.w r0, [r3, #1024] @ 0x400
|
|
8003f2e: f8b3 1402 ldrh.w r1, [r3, #1026] @ 0x402
|
|
8003f32: 4429 add r1, r5
|
|
8003f34: 4420 add r0, r4
|
|
8003f36: 4642 mov r2, r8
|
|
8003f38: b2c9 uxtb r1, r1
|
|
8003f3a: b2c0 uxtb r0, r0
|
|
8003f3c: f7ff ff96 bl 8003e6c <oled_DrawPixel>
|
|
8003f40: e7ea b.n 8003f18 <oled_WriteChar+0x50>
|
|
for (i = 0; i < Font.FontHeight; i++) {
|
|
8003f42: 3501 adds r5, #1
|
|
8003f44: 45aa cmp sl, r5
|
|
8003f46: d908 bls.n 8003f5a <oled_WriteChar+0x92>
|
|
b = Font.data[(ch - 32) * Font.FontHeight + i];
|
|
8003f48: f1a9 0320 sub.w r3, r9, #32
|
|
8003f4c: fb03 530a mla r3, r3, sl, r5
|
|
8003f50: 9a01 ldr r2, [sp, #4]
|
|
8003f52: f832 7013 ldrh.w r7, [r2, r3, lsl #1]
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
8003f56: 2400 movs r4, #0
|
|
8003f58: e7df b.n 8003f1a <oled_WriteChar+0x52>
|
|
}
|
|
}
|
|
}
|
|
|
|
OLED.CurrentX += Font.FontWidth;
|
|
8003f5a: 4a07 ldr r2, [pc, #28] @ (8003f78 <oled_WriteChar+0xb0>)
|
|
8003f5c: f8b2 3400 ldrh.w r3, [r2, #1024] @ 0x400
|
|
8003f60: 4433 add r3, r6
|
|
8003f62: f8a2 3400 strh.w r3, [r2, #1024] @ 0x400
|
|
|
|
return ch;
|
|
8003f66: 4648 mov r0, r9
|
|
}
|
|
8003f68: b002 add sp, #8
|
|
8003f6a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
return 0;
|
|
8003f6e: 2000 movs r0, #0
|
|
8003f70: e7fa b.n 8003f68 <oled_WriteChar+0xa0>
|
|
8003f72: 2000 movs r0, #0
|
|
8003f74: e7f8 b.n 8003f68 <oled_WriteChar+0xa0>
|
|
8003f76: bf00 nop
|
|
8003f78: 20004174 .word 0x20004174
|
|
|
|
08003f7c <oled_WriteString>:
|
|
|
|
|
|
char oled_WriteString(char* str, FontDef Font, OLED_COLOR color) {
|
|
8003f7c: b530 push {r4, r5, lr}
|
|
8003f7e: b083 sub sp, #12
|
|
8003f80: 4604 mov r4, r0
|
|
8003f82: a802 add r0, sp, #8
|
|
8003f84: e900 0006 stmdb r0, {r1, r2}
|
|
8003f88: 461d mov r5, r3
|
|
while (*str) {
|
|
8003f8a: e000 b.n 8003f8e <oled_WriteString+0x12>
|
|
if (oled_WriteChar(*str, Font, color) != *str) {
|
|
return *str;
|
|
}
|
|
str++;
|
|
8003f8c: 3401 adds r4, #1
|
|
while (*str) {
|
|
8003f8e: 7820 ldrb r0, [r4, #0]
|
|
8003f90: b148 cbz r0, 8003fa6 <oled_WriteString+0x2a>
|
|
if (oled_WriteChar(*str, Font, color) != *str) {
|
|
8003f92: 462b mov r3, r5
|
|
8003f94: aa02 add r2, sp, #8
|
|
8003f96: e912 0006 ldmdb r2, {r1, r2}
|
|
8003f9a: f7ff ff95 bl 8003ec8 <oled_WriteChar>
|
|
8003f9e: 4602 mov r2, r0
|
|
8003fa0: 7820 ldrb r0, [r4, #0]
|
|
8003fa2: 4282 cmp r2, r0
|
|
8003fa4: d0f2 beq.n 8003f8c <oled_WriteString+0x10>
|
|
}
|
|
return *str;
|
|
}
|
|
8003fa6: b003 add sp, #12
|
|
8003fa8: bd30 pop {r4, r5, pc}
|
|
...
|
|
|
|
08003fac <oled_SetCursor>:
|
|
|
|
void oled_SetCursor(uint8_t x, uint8_t y) {
|
|
OLED.CurrentX = x;
|
|
8003fac: 4b02 ldr r3, [pc, #8] @ (8003fb8 <oled_SetCursor+0xc>)
|
|
8003fae: f8a3 0400 strh.w r0, [r3, #1024] @ 0x400
|
|
OLED.CurrentY = y;
|
|
8003fb2: f8a3 1402 strh.w r1, [r3, #1026] @ 0x402
|
|
}
|
|
8003fb6: 4770 bx lr
|
|
8003fb8: 20004174 .word 0x20004174
|
|
|
|
08003fbc <PCA9538_Read_Register>:
|
|
#include "main.h"
|
|
#include "i2c.h"
|
|
#include "sdk_uart.h"
|
|
#include "pca9538.h"
|
|
|
|
HAL_StatusTypeDef PCA9538_Read_Register(uint16_t addr, pca9538_regs_t reg, uint8_t* buf) {
|
|
8003fbc: b500 push {lr}
|
|
8003fbe: b085 sub sp, #20
|
|
return HAL_I2C_Mem_Read(&hi2c1, addr | 1, reg, 1, buf, 1, 100);
|
|
8003fc0: 2364 movs r3, #100 @ 0x64
|
|
8003fc2: 9302 str r3, [sp, #8]
|
|
8003fc4: 2301 movs r3, #1
|
|
8003fc6: 9301 str r3, [sp, #4]
|
|
8003fc8: 9200 str r2, [sp, #0]
|
|
8003fca: 460a mov r2, r1
|
|
8003fcc: ea40 0103 orr.w r1, r0, r3
|
|
8003fd0: 4802 ldr r0, [pc, #8] @ (8003fdc <PCA9538_Read_Register+0x20>)
|
|
8003fd2: f7fd f8c9 bl 8001168 <HAL_I2C_Mem_Read>
|
|
}
|
|
8003fd6: b005 add sp, #20
|
|
8003fd8: f85d fb04 ldr.w pc, [sp], #4
|
|
8003fdc: 20004120 .word 0x20004120
|
|
|
|
08003fe0 <PCA9538_Write_Register>:
|
|
|
|
|
|
HAL_StatusTypeDef PCA9538_Write_Register(uint16_t addr, pca9538_regs_t reg, uint8_t* buf) {
|
|
8003fe0: b500 push {lr}
|
|
8003fe2: b085 sub sp, #20
|
|
return HAL_I2C_Mem_Write(&hi2c1, addr & 0xFFFE, reg, 1, buf, 1, 100);
|
|
8003fe4: f020 0001 bic.w r0, r0, #1
|
|
8003fe8: 2364 movs r3, #100 @ 0x64
|
|
8003fea: 9302 str r3, [sp, #8]
|
|
8003fec: 2301 movs r3, #1
|
|
8003fee: 9301 str r3, [sp, #4]
|
|
8003ff0: 9200 str r2, [sp, #0]
|
|
8003ff2: 460a mov r2, r1
|
|
8003ff4: 4601 mov r1, r0
|
|
8003ff6: 4803 ldr r0, [pc, #12] @ (8004004 <PCA9538_Write_Register+0x24>)
|
|
8003ff8: f7fd f804 bl 8001004 <HAL_I2C_Mem_Write>
|
|
}
|
|
8003ffc: b005 add sp, #20
|
|
8003ffe: f85d fb04 ldr.w pc, [sp], #4
|
|
8004002: bf00 nop
|
|
8004004: 20004120 .word 0x20004120
|
|
|
|
08004008 <PCA9538_Read_Inputs>:
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
HAL_StatusTypeDef PCA9538_Read_Inputs(uint16_t addr, uint8_t* buf) {
|
|
8004008: b508 push {r3, lr}
|
|
800400a: 460a mov r2, r1
|
|
return PCA9538_Read_Register(addr, INPUT_PORT, buf);
|
|
800400c: 2100 movs r1, #0
|
|
800400e: f7ff ffd5 bl 8003fbc <PCA9538_Read_Register>
|
|
}
|
|
8004012: bd08 pop {r3, pc}
|
|
|
|
08004014 <UART_Transmit>:
|
|
#include "sdk_uart.h"
|
|
#include "usart.h"
|
|
#include <string.h>
|
|
|
|
|
|
void UART_Transmit(uint8_t data[]){
|
|
8004014: b510 push {r4, lr}
|
|
8004016: 4604 mov r4, r0
|
|
HAL_UART_Transmit(&huart6, data, strlen((const char*)data), 1000);
|
|
8004018: f7fc f8da bl 80001d0 <strlen>
|
|
800401c: f44f 737a mov.w r3, #1000 @ 0x3e8
|
|
8004020: b282 uxth r2, r0
|
|
8004022: 4621 mov r1, r4
|
|
8004024: 4801 ldr r0, [pc, #4] @ (800402c <UART_Transmit+0x18>)
|
|
8004026: f7fd fe6a bl 8001cfe <HAL_UART_Transmit>
|
|
}
|
|
800402a: bd10 pop {r4, pc}
|
|
800402c: 20004580 .word 0x20004580
|
|
|
|
08004030 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
8004030: b500 push {lr}
|
|
8004032: b083 sub sp, #12
|
|
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
8004034: 2200 movs r2, #0
|
|
8004036: 9200 str r2, [sp, #0]
|
|
8004038: 4b0d ldr r3, [pc, #52] @ (8004070 <HAL_MspInit+0x40>)
|
|
800403a: 6c59 ldr r1, [r3, #68] @ 0x44
|
|
800403c: f441 4180 orr.w r1, r1, #16384 @ 0x4000
|
|
8004040: 6459 str r1, [r3, #68] @ 0x44
|
|
8004042: 6c59 ldr r1, [r3, #68] @ 0x44
|
|
8004044: f401 4180 and.w r1, r1, #16384 @ 0x4000
|
|
8004048: 9100 str r1, [sp, #0]
|
|
800404a: 9900 ldr r1, [sp, #0]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800404c: 9201 str r2, [sp, #4]
|
|
800404e: 6c19 ldr r1, [r3, #64] @ 0x40
|
|
8004050: f041 5180 orr.w r1, r1, #268435456 @ 0x10000000
|
|
8004054: 6419 str r1, [r3, #64] @ 0x40
|
|
8004056: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
8004058: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
800405c: 9301 str r3, [sp, #4]
|
|
800405e: 9b01 ldr r3, [sp, #4]
|
|
|
|
/* System interrupt init*/
|
|
/* PendSV_IRQn interrupt configuration */
|
|
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
|
8004060: 210f movs r1, #15
|
|
8004062: f06f 0001 mvn.w r0, #1
|
|
8004066: f7fc fb4b bl 8000700 <HAL_NVIC_SetPriority>
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
800406a: b003 add sp, #12
|
|
800406c: f85d fb04 ldr.w pc, [sp], #4
|
|
8004070: 40023800 .word 0x40023800
|
|
|
|
08004074 <NMI_Handler>:
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
|
}
|
|
8004074: 4770 bx lr
|
|
|
|
08004076 <HardFault_Handler>:
|
|
void HardFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
8004076: e7fe b.n 8004076 <HardFault_Handler>
|
|
|
|
08004078 <MemManage_Handler>:
|
|
void MemManage_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
8004078: e7fe b.n 8004078 <MemManage_Handler>
|
|
|
|
0800407a <BusFault_Handler>:
|
|
void BusFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
800407a: e7fe b.n 800407a <BusFault_Handler>
|
|
|
|
0800407c <UsageFault_Handler>:
|
|
void UsageFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
800407c: e7fe b.n 800407c <UsageFault_Handler>
|
|
|
|
0800407e <DebugMon_Handler>:
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
800407e: 4770 bx lr
|
|
|
|
08004080 <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
8004080: b508 push {r3, lr}
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
8004082: f7fc fad1 bl 8000628 <HAL_IncTick>
|
|
#if (INCLUDE_xTaskGetSchedulerState == 1 )
|
|
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
|
|
8004086: f7fe fb17 bl 80026b8 <xTaskGetSchedulerState>
|
|
800408a: 2801 cmp r0, #1
|
|
800408c: d100 bne.n 8004090 <SysTick_Handler+0x10>
|
|
}
|
|
#endif /* INCLUDE_xTaskGetSchedulerState */
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
800408e: bd08 pop {r3, pc}
|
|
xPortSysTickHandler();
|
|
8004090: f7fe fbf8 bl 8002884 <xPortSysTickHandler>
|
|
}
|
|
8004094: e7fb b.n 800408e <SysTick_Handler+0xe>
|
|
...
|
|
|
|
08004098 <_sbrk>:
|
|
*
|
|
* @param incr Memory size
|
|
* @return Pointer to allocated memory
|
|
*/
|
|
void *_sbrk(ptrdiff_t incr)
|
|
{
|
|
8004098: b510 push {r4, lr}
|
|
800409a: 4603 mov r3, r0
|
|
extern uint8_t _end; /* Symbol defined in the linker script */
|
|
extern uint8_t _estack; /* Symbol defined in the linker script */
|
|
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
|
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
|
800409c: 4a0c ldr r2, [pc, #48] @ (80040d0 <_sbrk+0x38>)
|
|
800409e: 490d ldr r1, [pc, #52] @ (80040d4 <_sbrk+0x3c>)
|
|
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
|
uint8_t *prev_heap_end;
|
|
|
|
/* Initialize heap end at first call */
|
|
if (NULL == __sbrk_heap_end)
|
|
80040a0: 480d ldr r0, [pc, #52] @ (80040d8 <_sbrk+0x40>)
|
|
80040a2: 6800 ldr r0, [r0, #0]
|
|
80040a4: b140 cbz r0, 80040b8 <_sbrk+0x20>
|
|
{
|
|
__sbrk_heap_end = &_end;
|
|
}
|
|
|
|
/* Protect heap from growing into the reserved MSP stack */
|
|
if (__sbrk_heap_end + incr > max_heap)
|
|
80040a6: 480c ldr r0, [pc, #48] @ (80040d8 <_sbrk+0x40>)
|
|
80040a8: 6800 ldr r0, [r0, #0]
|
|
80040aa: 4403 add r3, r0
|
|
80040ac: 1a52 subs r2, r2, r1
|
|
80040ae: 4293 cmp r3, r2
|
|
80040b0: d806 bhi.n 80040c0 <_sbrk+0x28>
|
|
errno = ENOMEM;
|
|
return (void *)-1;
|
|
}
|
|
|
|
prev_heap_end = __sbrk_heap_end;
|
|
__sbrk_heap_end += incr;
|
|
80040b2: 4a09 ldr r2, [pc, #36] @ (80040d8 <_sbrk+0x40>)
|
|
80040b4: 6013 str r3, [r2, #0]
|
|
|
|
return (void *)prev_heap_end;
|
|
}
|
|
80040b6: bd10 pop {r4, pc}
|
|
__sbrk_heap_end = &_end;
|
|
80040b8: 4807 ldr r0, [pc, #28] @ (80040d8 <_sbrk+0x40>)
|
|
80040ba: 4c08 ldr r4, [pc, #32] @ (80040dc <_sbrk+0x44>)
|
|
80040bc: 6004 str r4, [r0, #0]
|
|
80040be: e7f2 b.n 80040a6 <_sbrk+0xe>
|
|
errno = ENOMEM;
|
|
80040c0: f000 f8da bl 8004278 <__errno>
|
|
80040c4: 230c movs r3, #12
|
|
80040c6: 6003 str r3, [r0, #0]
|
|
return (void *)-1;
|
|
80040c8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80040cc: e7f3 b.n 80040b6 <_sbrk+0x1e>
|
|
80040ce: bf00 nop
|
|
80040d0: 20020000 .word 0x20020000
|
|
80040d4: 00000400 .word 0x00000400
|
|
80040d8: 2000457c .word 0x2000457c
|
|
80040dc: 20004710 .word 0x20004710
|
|
|
|
080040e0 <SystemInit>:
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
/* FPU settings ------------------------------------------------------------*/
|
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
|
80040e0: 490f ldr r1, [pc, #60] @ (8004120 <SystemInit+0x40>)
|
|
80040e2: f8d1 3088 ldr.w r3, [r1, #136] @ 0x88
|
|
80040e6: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
|
|
80040ea: f8c1 3088 str.w r3, [r1, #136] @ 0x88
|
|
#endif
|
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
|
/* Set HSION bit */
|
|
RCC->CR |= (uint32_t)0x00000001;
|
|
80040ee: 4b0d ldr r3, [pc, #52] @ (8004124 <SystemInit+0x44>)
|
|
80040f0: 681a ldr r2, [r3, #0]
|
|
80040f2: f042 0201 orr.w r2, r2, #1
|
|
80040f6: 601a str r2, [r3, #0]
|
|
|
|
/* Reset CFGR register */
|
|
RCC->CFGR = 0x00000000;
|
|
80040f8: 2000 movs r0, #0
|
|
80040fa: 6098 str r0, [r3, #8]
|
|
|
|
/* Reset HSEON, CSSON and PLLON bits */
|
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
|
80040fc: 681a ldr r2, [r3, #0]
|
|
80040fe: f022 7284 bic.w r2, r2, #17301504 @ 0x1080000
|
|
8004102: f422 3280 bic.w r2, r2, #65536 @ 0x10000
|
|
8004106: 601a str r2, [r3, #0]
|
|
|
|
/* Reset PLLCFGR register */
|
|
RCC->PLLCFGR = 0x24003010;
|
|
8004108: 4a07 ldr r2, [pc, #28] @ (8004128 <SystemInit+0x48>)
|
|
800410a: 605a str r2, [r3, #4]
|
|
|
|
/* Reset HSEBYP bit */
|
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
|
800410c: 681a ldr r2, [r3, #0]
|
|
800410e: f422 2280 bic.w r2, r2, #262144 @ 0x40000
|
|
8004112: 601a str r2, [r3, #0]
|
|
|
|
/* Disable all interrupts */
|
|
RCC->CIR = 0x00000000;
|
|
8004114: 60d8 str r0, [r3, #12]
|
|
|
|
/* Configure the Vector Table location add offset address ------------------*/
|
|
#ifdef VECT_TAB_SRAM
|
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
|
#else
|
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
|
8004116: f04f 6300 mov.w r3, #134217728 @ 0x8000000
|
|
800411a: 608b str r3, [r1, #8]
|
|
#endif
|
|
}
|
|
800411c: 4770 bx lr
|
|
800411e: bf00 nop
|
|
8004120: e000ed00 .word 0xe000ed00
|
|
8004124: 40023800 .word 0x40023800
|
|
8004128: 24003010 .word 0x24003010
|
|
|
|
0800412c <MX_USART6_UART_Init>:
|
|
UART_HandleTypeDef huart6;
|
|
|
|
/* USART6 init function */
|
|
|
|
void MX_USART6_UART_Init(void)
|
|
{
|
|
800412c: b508 push {r3, lr}
|
|
/* USER CODE END USART6_Init 0 */
|
|
|
|
/* USER CODE BEGIN USART6_Init 1 */
|
|
|
|
/* USER CODE END USART6_Init 1 */
|
|
huart6.Instance = USART6;
|
|
800412e: 480a ldr r0, [pc, #40] @ (8004158 <MX_USART6_UART_Init+0x2c>)
|
|
8004130: 4b0a ldr r3, [pc, #40] @ (800415c <MX_USART6_UART_Init+0x30>)
|
|
8004132: 6003 str r3, [r0, #0]
|
|
huart6.Init.BaudRate = 115200;
|
|
8004134: f44f 33e1 mov.w r3, #115200 @ 0x1c200
|
|
8004138: 6043 str r3, [r0, #4]
|
|
huart6.Init.WordLength = UART_WORDLENGTH_8B;
|
|
800413a: 2300 movs r3, #0
|
|
800413c: 6083 str r3, [r0, #8]
|
|
huart6.Init.StopBits = UART_STOPBITS_1;
|
|
800413e: 60c3 str r3, [r0, #12]
|
|
huart6.Init.Parity = UART_PARITY_NONE;
|
|
8004140: 6103 str r3, [r0, #16]
|
|
huart6.Init.Mode = UART_MODE_TX_RX;
|
|
8004142: 220c movs r2, #12
|
|
8004144: 6142 str r2, [r0, #20]
|
|
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
8004146: 6183 str r3, [r0, #24]
|
|
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
|
|
8004148: 61c3 str r3, [r0, #28]
|
|
if (HAL_UART_Init(&huart6) != HAL_OK)
|
|
800414a: f7fd fda8 bl 8001c9e <HAL_UART_Init>
|
|
800414e: b900 cbnz r0, 8004152 <MX_USART6_UART_Init+0x26>
|
|
}
|
|
/* USER CODE BEGIN USART6_Init 2 */
|
|
|
|
/* USER CODE END USART6_Init 2 */
|
|
|
|
}
|
|
8004150: bd08 pop {r3, pc}
|
|
Error_Handler();
|
|
8004152: f7ff fd67 bl 8003c24 <Error_Handler>
|
|
}
|
|
8004156: e7fb b.n 8004150 <MX_USART6_UART_Init+0x24>
|
|
8004158: 20004580 .word 0x20004580
|
|
800415c: 40011400 .word 0x40011400
|
|
|
|
08004160 <HAL_UART_MspInit>:
|
|
|
|
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|
{
|
|
8004160: b500 push {lr}
|
|
8004162: b089 sub sp, #36 @ 0x24
|
|
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8004164: 2300 movs r3, #0
|
|
8004166: 9303 str r3, [sp, #12]
|
|
8004168: 9304 str r3, [sp, #16]
|
|
800416a: 9305 str r3, [sp, #20]
|
|
800416c: 9306 str r3, [sp, #24]
|
|
800416e: 9307 str r3, [sp, #28]
|
|
if(uartHandle->Instance==USART6)
|
|
8004170: 6802 ldr r2, [r0, #0]
|
|
8004172: 4b15 ldr r3, [pc, #84] @ (80041c8 <HAL_UART_MspInit+0x68>)
|
|
8004174: 429a cmp r2, r3
|
|
8004176: d002 beq.n 800417e <HAL_UART_MspInit+0x1e>
|
|
|
|
/* USER CODE BEGIN USART6_MspInit 1 */
|
|
|
|
/* USER CODE END USART6_MspInit 1 */
|
|
}
|
|
}
|
|
8004178: b009 add sp, #36 @ 0x24
|
|
800417a: f85d fb04 ldr.w pc, [sp], #4
|
|
__HAL_RCC_USART6_CLK_ENABLE();
|
|
800417e: 2100 movs r1, #0
|
|
8004180: 9101 str r1, [sp, #4]
|
|
8004182: f503 3392 add.w r3, r3, #74752 @ 0x12400
|
|
8004186: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
8004188: f042 0220 orr.w r2, r2, #32
|
|
800418c: 645a str r2, [r3, #68] @ 0x44
|
|
800418e: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
8004190: f002 0220 and.w r2, r2, #32
|
|
8004194: 9201 str r2, [sp, #4]
|
|
8004196: 9a01 ldr r2, [sp, #4]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8004198: 9102 str r1, [sp, #8]
|
|
800419a: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
800419c: f042 0204 orr.w r2, r2, #4
|
|
80041a0: 631a str r2, [r3, #48] @ 0x30
|
|
80041a2: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
80041a4: f003 0304 and.w r3, r3, #4
|
|
80041a8: 9302 str r3, [sp, #8]
|
|
80041aa: 9b02 ldr r3, [sp, #8]
|
|
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
|
80041ac: 23c0 movs r3, #192 @ 0xc0
|
|
80041ae: 9303 str r3, [sp, #12]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
80041b0: 2302 movs r3, #2
|
|
80041b2: 9304 str r3, [sp, #16]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
80041b4: 2303 movs r3, #3
|
|
80041b6: 9306 str r3, [sp, #24]
|
|
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
|
|
80041b8: 2308 movs r3, #8
|
|
80041ba: 9307 str r3, [sp, #28]
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
80041bc: a903 add r1, sp, #12
|
|
80041be: 4803 ldr r0, [pc, #12] @ (80041cc <HAL_UART_MspInit+0x6c>)
|
|
80041c0: f7fc fac2 bl 8000748 <HAL_GPIO_Init>
|
|
}
|
|
80041c4: e7d8 b.n 8004178 <HAL_UART_MspInit+0x18>
|
|
80041c6: bf00 nop
|
|
80041c8: 40011400 .word 0x40011400
|
|
80041cc: 40020800 .word 0x40020800
|
|
|
|
080041d0 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr sp, =_estack /* set stack pointer */
|
|
80041d0: f8df d034 ldr.w sp, [pc, #52] @ 8004208 <LoopFillZerobss+0x14>
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
movs r1, #0
|
|
80041d4: 2100 movs r1, #0
|
|
b LoopCopyDataInit
|
|
80041d6: e003 b.n 80041e0 <LoopCopyDataInit>
|
|
|
|
080041d8 <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r3, =_sidata
|
|
80041d8: 4b0c ldr r3, [pc, #48] @ (800420c <LoopFillZerobss+0x18>)
|
|
ldr r3, [r3, r1]
|
|
80041da: 585b ldr r3, [r3, r1]
|
|
str r3, [r0, r1]
|
|
80041dc: 5043 str r3, [r0, r1]
|
|
adds r1, r1, #4
|
|
80041de: 3104 adds r1, #4
|
|
|
|
080041e0 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
ldr r0, =_sdata
|
|
80041e0: 480b ldr r0, [pc, #44] @ (8004210 <LoopFillZerobss+0x1c>)
|
|
ldr r3, =_edata
|
|
80041e2: 4b0c ldr r3, [pc, #48] @ (8004214 <LoopFillZerobss+0x20>)
|
|
adds r2, r0, r1
|
|
80041e4: 1842 adds r2, r0, r1
|
|
cmp r2, r3
|
|
80041e6: 429a cmp r2, r3
|
|
bcc CopyDataInit
|
|
80041e8: d3f6 bcc.n 80041d8 <CopyDataInit>
|
|
ldr r2, =_sbss
|
|
80041ea: 4a0b ldr r2, [pc, #44] @ (8004218 <LoopFillZerobss+0x24>)
|
|
b LoopFillZerobss
|
|
80041ec: e002 b.n 80041f4 <LoopFillZerobss>
|
|
|
|
080041ee <FillZerobss>:
|
|
/* Zero fill the bss segment. */
|
|
FillZerobss:
|
|
movs r3, #0
|
|
80041ee: 2300 movs r3, #0
|
|
str r3, [r2], #4
|
|
80041f0: f842 3b04 str.w r3, [r2], #4
|
|
|
|
080041f4 <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
ldr r3, = _ebss
|
|
80041f4: 4b09 ldr r3, [pc, #36] @ (800421c <LoopFillZerobss+0x28>)
|
|
cmp r2, r3
|
|
80041f6: 429a cmp r2, r3
|
|
bcc FillZerobss
|
|
80041f8: d3f9 bcc.n 80041ee <FillZerobss>
|
|
|
|
/* Call the clock system intitialization function.*/
|
|
bl SystemInit
|
|
80041fa: f7ff ff71 bl 80040e0 <SystemInit>
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
80041fe: f000 f841 bl 8004284 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
8004202: f7ff fd67 bl 8003cd4 <main>
|
|
bx lr
|
|
8004206: 4770 bx lr
|
|
ldr sp, =_estack /* set stack pointer */
|
|
8004208: 20020000 .word 0x20020000
|
|
ldr r3, =_sidata
|
|
800420c: 0800840c .word 0x0800840c
|
|
ldr r0, =_sdata
|
|
8004210: 20000000 .word 0x20000000
|
|
ldr r3, =_edata
|
|
8004214: 2000007c .word 0x2000007c
|
|
ldr r2, =_sbss
|
|
8004218: 2000007c .word 0x2000007c
|
|
ldr r3, = _ebss
|
|
800421c: 20004710 .word 0x20004710
|
|
|
|
08004220 <ADC_IRQHandler>:
|
|
* @retval None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
8004220: e7fe b.n 8004220 <ADC_IRQHandler>
|
|
...
|
|
|
|
08004224 <siprintf>:
|
|
8004224: b40e push {r1, r2, r3}
|
|
8004226: b510 push {r4, lr}
|
|
8004228: b09d sub sp, #116 @ 0x74
|
|
800422a: ab1f add r3, sp, #124 @ 0x7c
|
|
800422c: 9002 str r0, [sp, #8]
|
|
800422e: 9006 str r0, [sp, #24]
|
|
8004230: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
|
|
8004234: 480a ldr r0, [pc, #40] @ (8004260 <siprintf+0x3c>)
|
|
8004236: 9107 str r1, [sp, #28]
|
|
8004238: 9104 str r1, [sp, #16]
|
|
800423a: 490a ldr r1, [pc, #40] @ (8004264 <siprintf+0x40>)
|
|
800423c: f853 2b04 ldr.w r2, [r3], #4
|
|
8004240: 9105 str r1, [sp, #20]
|
|
8004242: 2400 movs r4, #0
|
|
8004244: a902 add r1, sp, #8
|
|
8004246: 6800 ldr r0, [r0, #0]
|
|
8004248: 9301 str r3, [sp, #4]
|
|
800424a: 941b str r4, [sp, #108] @ 0x6c
|
|
800424c: f000 f9a2 bl 8004594 <_svfiprintf_r>
|
|
8004250: 9b02 ldr r3, [sp, #8]
|
|
8004252: 701c strb r4, [r3, #0]
|
|
8004254: b01d add sp, #116 @ 0x74
|
|
8004256: e8bd 4010 ldmia.w sp!, {r4, lr}
|
|
800425a: b003 add sp, #12
|
|
800425c: 4770 bx lr
|
|
800425e: bf00 nop
|
|
8004260: 2000002c .word 0x2000002c
|
|
8004264: ffff0208 .word 0xffff0208
|
|
|
|
08004268 <memset>:
|
|
8004268: 4402 add r2, r0
|
|
800426a: 4603 mov r3, r0
|
|
800426c: 4293 cmp r3, r2
|
|
800426e: d100 bne.n 8004272 <memset+0xa>
|
|
8004270: 4770 bx lr
|
|
8004272: f803 1b01 strb.w r1, [r3], #1
|
|
8004276: e7f9 b.n 800426c <memset+0x4>
|
|
|
|
08004278 <__errno>:
|
|
8004278: 4b01 ldr r3, [pc, #4] @ (8004280 <__errno+0x8>)
|
|
800427a: 6818 ldr r0, [r3, #0]
|
|
800427c: 4770 bx lr
|
|
800427e: bf00 nop
|
|
8004280: 2000002c .word 0x2000002c
|
|
|
|
08004284 <__libc_init_array>:
|
|
8004284: b570 push {r4, r5, r6, lr}
|
|
8004286: 4d0d ldr r5, [pc, #52] @ (80042bc <__libc_init_array+0x38>)
|
|
8004288: 4c0d ldr r4, [pc, #52] @ (80042c0 <__libc_init_array+0x3c>)
|
|
800428a: 1b64 subs r4, r4, r5
|
|
800428c: 10a4 asrs r4, r4, #2
|
|
800428e: 2600 movs r6, #0
|
|
8004290: 42a6 cmp r6, r4
|
|
8004292: d109 bne.n 80042a8 <__libc_init_array+0x24>
|
|
8004294: 4d0b ldr r5, [pc, #44] @ (80042c4 <__libc_init_array+0x40>)
|
|
8004296: 4c0c ldr r4, [pc, #48] @ (80042c8 <__libc_init_array+0x44>)
|
|
8004298: f001 f9fa bl 8005690 <_init>
|
|
800429c: 1b64 subs r4, r4, r5
|
|
800429e: 10a4 asrs r4, r4, #2
|
|
80042a0: 2600 movs r6, #0
|
|
80042a2: 42a6 cmp r6, r4
|
|
80042a4: d105 bne.n 80042b2 <__libc_init_array+0x2e>
|
|
80042a6: bd70 pop {r4, r5, r6, pc}
|
|
80042a8: f855 3b04 ldr.w r3, [r5], #4
|
|
80042ac: 4798 blx r3
|
|
80042ae: 3601 adds r6, #1
|
|
80042b0: e7ee b.n 8004290 <__libc_init_array+0xc>
|
|
80042b2: f855 3b04 ldr.w r3, [r5], #4
|
|
80042b6: 4798 blx r3
|
|
80042b8: 3601 adds r6, #1
|
|
80042ba: e7f2 b.n 80042a2 <__libc_init_array+0x1e>
|
|
80042bc: 08008404 .word 0x08008404
|
|
80042c0: 08008404 .word 0x08008404
|
|
80042c4: 08008404 .word 0x08008404
|
|
80042c8: 08008408 .word 0x08008408
|
|
|
|
080042cc <__retarget_lock_acquire_recursive>:
|
|
80042cc: 4770 bx lr
|
|
|
|
080042ce <__retarget_lock_release_recursive>:
|
|
80042ce: 4770 bx lr
|
|
|
|
080042d0 <memcpy>:
|
|
80042d0: 440a add r2, r1
|
|
80042d2: 4291 cmp r1, r2
|
|
80042d4: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff
|
|
80042d8: d100 bne.n 80042dc <memcpy+0xc>
|
|
80042da: 4770 bx lr
|
|
80042dc: b510 push {r4, lr}
|
|
80042de: f811 4b01 ldrb.w r4, [r1], #1
|
|
80042e2: f803 4f01 strb.w r4, [r3, #1]!
|
|
80042e6: 4291 cmp r1, r2
|
|
80042e8: d1f9 bne.n 80042de <memcpy+0xe>
|
|
80042ea: bd10 pop {r4, pc}
|
|
|
|
080042ec <_free_r>:
|
|
80042ec: b538 push {r3, r4, r5, lr}
|
|
80042ee: 4605 mov r5, r0
|
|
80042f0: 2900 cmp r1, #0
|
|
80042f2: d041 beq.n 8004378 <_free_r+0x8c>
|
|
80042f4: f851 3c04 ldr.w r3, [r1, #-4]
|
|
80042f8: 1f0c subs r4, r1, #4
|
|
80042fa: 2b00 cmp r3, #0
|
|
80042fc: bfb8 it lt
|
|
80042fe: 18e4 addlt r4, r4, r3
|
|
8004300: f000 f8e0 bl 80044c4 <__malloc_lock>
|
|
8004304: 4a1d ldr r2, [pc, #116] @ (800437c <_free_r+0x90>)
|
|
8004306: 6813 ldr r3, [r2, #0]
|
|
8004308: b933 cbnz r3, 8004318 <_free_r+0x2c>
|
|
800430a: 6063 str r3, [r4, #4]
|
|
800430c: 6014 str r4, [r2, #0]
|
|
800430e: 4628 mov r0, r5
|
|
8004310: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
8004314: f000 b8dc b.w 80044d0 <__malloc_unlock>
|
|
8004318: 42a3 cmp r3, r4
|
|
800431a: d908 bls.n 800432e <_free_r+0x42>
|
|
800431c: 6820 ldr r0, [r4, #0]
|
|
800431e: 1821 adds r1, r4, r0
|
|
8004320: 428b cmp r3, r1
|
|
8004322: bf01 itttt eq
|
|
8004324: 6819 ldreq r1, [r3, #0]
|
|
8004326: 685b ldreq r3, [r3, #4]
|
|
8004328: 1809 addeq r1, r1, r0
|
|
800432a: 6021 streq r1, [r4, #0]
|
|
800432c: e7ed b.n 800430a <_free_r+0x1e>
|
|
800432e: 461a mov r2, r3
|
|
8004330: 685b ldr r3, [r3, #4]
|
|
8004332: b10b cbz r3, 8004338 <_free_r+0x4c>
|
|
8004334: 42a3 cmp r3, r4
|
|
8004336: d9fa bls.n 800432e <_free_r+0x42>
|
|
8004338: 6811 ldr r1, [r2, #0]
|
|
800433a: 1850 adds r0, r2, r1
|
|
800433c: 42a0 cmp r0, r4
|
|
800433e: d10b bne.n 8004358 <_free_r+0x6c>
|
|
8004340: 6820 ldr r0, [r4, #0]
|
|
8004342: 4401 add r1, r0
|
|
8004344: 1850 adds r0, r2, r1
|
|
8004346: 4283 cmp r3, r0
|
|
8004348: 6011 str r1, [r2, #0]
|
|
800434a: d1e0 bne.n 800430e <_free_r+0x22>
|
|
800434c: 6818 ldr r0, [r3, #0]
|
|
800434e: 685b ldr r3, [r3, #4]
|
|
8004350: 6053 str r3, [r2, #4]
|
|
8004352: 4408 add r0, r1
|
|
8004354: 6010 str r0, [r2, #0]
|
|
8004356: e7da b.n 800430e <_free_r+0x22>
|
|
8004358: d902 bls.n 8004360 <_free_r+0x74>
|
|
800435a: 230c movs r3, #12
|
|
800435c: 602b str r3, [r5, #0]
|
|
800435e: e7d6 b.n 800430e <_free_r+0x22>
|
|
8004360: 6820 ldr r0, [r4, #0]
|
|
8004362: 1821 adds r1, r4, r0
|
|
8004364: 428b cmp r3, r1
|
|
8004366: bf04 itt eq
|
|
8004368: 6819 ldreq r1, [r3, #0]
|
|
800436a: 685b ldreq r3, [r3, #4]
|
|
800436c: 6063 str r3, [r4, #4]
|
|
800436e: bf04 itt eq
|
|
8004370: 1809 addeq r1, r1, r0
|
|
8004372: 6021 streq r1, [r4, #0]
|
|
8004374: 6054 str r4, [r2, #4]
|
|
8004376: e7ca b.n 800430e <_free_r+0x22>
|
|
8004378: bd38 pop {r3, r4, r5, pc}
|
|
800437a: bf00 nop
|
|
800437c: 2000470c .word 0x2000470c
|
|
|
|
08004380 <sbrk_aligned>:
|
|
8004380: b570 push {r4, r5, r6, lr}
|
|
8004382: 4e0f ldr r6, [pc, #60] @ (80043c0 <sbrk_aligned+0x40>)
|
|
8004384: 460c mov r4, r1
|
|
8004386: 6831 ldr r1, [r6, #0]
|
|
8004388: 4605 mov r5, r0
|
|
800438a: b911 cbnz r1, 8004392 <sbrk_aligned+0x12>
|
|
800438c: f000 fba4 bl 8004ad8 <_sbrk_r>
|
|
8004390: 6030 str r0, [r6, #0]
|
|
8004392: 4621 mov r1, r4
|
|
8004394: 4628 mov r0, r5
|
|
8004396: f000 fb9f bl 8004ad8 <_sbrk_r>
|
|
800439a: 1c43 adds r3, r0, #1
|
|
800439c: d103 bne.n 80043a6 <sbrk_aligned+0x26>
|
|
800439e: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff
|
|
80043a2: 4620 mov r0, r4
|
|
80043a4: bd70 pop {r4, r5, r6, pc}
|
|
80043a6: 1cc4 adds r4, r0, #3
|
|
80043a8: f024 0403 bic.w r4, r4, #3
|
|
80043ac: 42a0 cmp r0, r4
|
|
80043ae: d0f8 beq.n 80043a2 <sbrk_aligned+0x22>
|
|
80043b0: 1a21 subs r1, r4, r0
|
|
80043b2: 4628 mov r0, r5
|
|
80043b4: f000 fb90 bl 8004ad8 <_sbrk_r>
|
|
80043b8: 3001 adds r0, #1
|
|
80043ba: d1f2 bne.n 80043a2 <sbrk_aligned+0x22>
|
|
80043bc: e7ef b.n 800439e <sbrk_aligned+0x1e>
|
|
80043be: bf00 nop
|
|
80043c0: 20004708 .word 0x20004708
|
|
|
|
080043c4 <_malloc_r>:
|
|
80043c4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
80043c8: 1ccd adds r5, r1, #3
|
|
80043ca: f025 0503 bic.w r5, r5, #3
|
|
80043ce: 3508 adds r5, #8
|
|
80043d0: 2d0c cmp r5, #12
|
|
80043d2: bf38 it cc
|
|
80043d4: 250c movcc r5, #12
|
|
80043d6: 2d00 cmp r5, #0
|
|
80043d8: 4606 mov r6, r0
|
|
80043da: db01 blt.n 80043e0 <_malloc_r+0x1c>
|
|
80043dc: 42a9 cmp r1, r5
|
|
80043de: d904 bls.n 80043ea <_malloc_r+0x26>
|
|
80043e0: 230c movs r3, #12
|
|
80043e2: 6033 str r3, [r6, #0]
|
|
80043e4: 2000 movs r0, #0
|
|
80043e6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
80043ea: f8df 80d4 ldr.w r8, [pc, #212] @ 80044c0 <_malloc_r+0xfc>
|
|
80043ee: f000 f869 bl 80044c4 <__malloc_lock>
|
|
80043f2: f8d8 3000 ldr.w r3, [r8]
|
|
80043f6: 461c mov r4, r3
|
|
80043f8: bb44 cbnz r4, 800444c <_malloc_r+0x88>
|
|
80043fa: 4629 mov r1, r5
|
|
80043fc: 4630 mov r0, r6
|
|
80043fe: f7ff ffbf bl 8004380 <sbrk_aligned>
|
|
8004402: 1c43 adds r3, r0, #1
|
|
8004404: 4604 mov r4, r0
|
|
8004406: d158 bne.n 80044ba <_malloc_r+0xf6>
|
|
8004408: f8d8 4000 ldr.w r4, [r8]
|
|
800440c: 4627 mov r7, r4
|
|
800440e: 2f00 cmp r7, #0
|
|
8004410: d143 bne.n 800449a <_malloc_r+0xd6>
|
|
8004412: 2c00 cmp r4, #0
|
|
8004414: d04b beq.n 80044ae <_malloc_r+0xea>
|
|
8004416: 6823 ldr r3, [r4, #0]
|
|
8004418: 4639 mov r1, r7
|
|
800441a: 4630 mov r0, r6
|
|
800441c: eb04 0903 add.w r9, r4, r3
|
|
8004420: f000 fb5a bl 8004ad8 <_sbrk_r>
|
|
8004424: 4581 cmp r9, r0
|
|
8004426: d142 bne.n 80044ae <_malloc_r+0xea>
|
|
8004428: 6821 ldr r1, [r4, #0]
|
|
800442a: 1a6d subs r5, r5, r1
|
|
800442c: 4629 mov r1, r5
|
|
800442e: 4630 mov r0, r6
|
|
8004430: f7ff ffa6 bl 8004380 <sbrk_aligned>
|
|
8004434: 3001 adds r0, #1
|
|
8004436: d03a beq.n 80044ae <_malloc_r+0xea>
|
|
8004438: 6823 ldr r3, [r4, #0]
|
|
800443a: 442b add r3, r5
|
|
800443c: 6023 str r3, [r4, #0]
|
|
800443e: f8d8 3000 ldr.w r3, [r8]
|
|
8004442: 685a ldr r2, [r3, #4]
|
|
8004444: bb62 cbnz r2, 80044a0 <_malloc_r+0xdc>
|
|
8004446: f8c8 7000 str.w r7, [r8]
|
|
800444a: e00f b.n 800446c <_malloc_r+0xa8>
|
|
800444c: 6822 ldr r2, [r4, #0]
|
|
800444e: 1b52 subs r2, r2, r5
|
|
8004450: d420 bmi.n 8004494 <_malloc_r+0xd0>
|
|
8004452: 2a0b cmp r2, #11
|
|
8004454: d917 bls.n 8004486 <_malloc_r+0xc2>
|
|
8004456: 1961 adds r1, r4, r5
|
|
8004458: 42a3 cmp r3, r4
|
|
800445a: 6025 str r5, [r4, #0]
|
|
800445c: bf18 it ne
|
|
800445e: 6059 strne r1, [r3, #4]
|
|
8004460: 6863 ldr r3, [r4, #4]
|
|
8004462: bf08 it eq
|
|
8004464: f8c8 1000 streq.w r1, [r8]
|
|
8004468: 5162 str r2, [r4, r5]
|
|
800446a: 604b str r3, [r1, #4]
|
|
800446c: 4630 mov r0, r6
|
|
800446e: f000 f82f bl 80044d0 <__malloc_unlock>
|
|
8004472: f104 000b add.w r0, r4, #11
|
|
8004476: 1d23 adds r3, r4, #4
|
|
8004478: f020 0007 bic.w r0, r0, #7
|
|
800447c: 1ac2 subs r2, r0, r3
|
|
800447e: bf1c itt ne
|
|
8004480: 1a1b subne r3, r3, r0
|
|
8004482: 50a3 strne r3, [r4, r2]
|
|
8004484: e7af b.n 80043e6 <_malloc_r+0x22>
|
|
8004486: 6862 ldr r2, [r4, #4]
|
|
8004488: 42a3 cmp r3, r4
|
|
800448a: bf0c ite eq
|
|
800448c: f8c8 2000 streq.w r2, [r8]
|
|
8004490: 605a strne r2, [r3, #4]
|
|
8004492: e7eb b.n 800446c <_malloc_r+0xa8>
|
|
8004494: 4623 mov r3, r4
|
|
8004496: 6864 ldr r4, [r4, #4]
|
|
8004498: e7ae b.n 80043f8 <_malloc_r+0x34>
|
|
800449a: 463c mov r4, r7
|
|
800449c: 687f ldr r7, [r7, #4]
|
|
800449e: e7b6 b.n 800440e <_malloc_r+0x4a>
|
|
80044a0: 461a mov r2, r3
|
|
80044a2: 685b ldr r3, [r3, #4]
|
|
80044a4: 42a3 cmp r3, r4
|
|
80044a6: d1fb bne.n 80044a0 <_malloc_r+0xdc>
|
|
80044a8: 2300 movs r3, #0
|
|
80044aa: 6053 str r3, [r2, #4]
|
|
80044ac: e7de b.n 800446c <_malloc_r+0xa8>
|
|
80044ae: 230c movs r3, #12
|
|
80044b0: 6033 str r3, [r6, #0]
|
|
80044b2: 4630 mov r0, r6
|
|
80044b4: f000 f80c bl 80044d0 <__malloc_unlock>
|
|
80044b8: e794 b.n 80043e4 <_malloc_r+0x20>
|
|
80044ba: 6005 str r5, [r0, #0]
|
|
80044bc: e7d6 b.n 800446c <_malloc_r+0xa8>
|
|
80044be: bf00 nop
|
|
80044c0: 2000470c .word 0x2000470c
|
|
|
|
080044c4 <__malloc_lock>:
|
|
80044c4: 4801 ldr r0, [pc, #4] @ (80044cc <__malloc_lock+0x8>)
|
|
80044c6: f7ff bf01 b.w 80042cc <__retarget_lock_acquire_recursive>
|
|
80044ca: bf00 nop
|
|
80044cc: 20004704 .word 0x20004704
|
|
|
|
080044d0 <__malloc_unlock>:
|
|
80044d0: 4801 ldr r0, [pc, #4] @ (80044d8 <__malloc_unlock+0x8>)
|
|
80044d2: f7ff befc b.w 80042ce <__retarget_lock_release_recursive>
|
|
80044d6: bf00 nop
|
|
80044d8: 20004704 .word 0x20004704
|
|
|
|
080044dc <__ssputs_r>:
|
|
80044dc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
80044e0: 688e ldr r6, [r1, #8]
|
|
80044e2: 461f mov r7, r3
|
|
80044e4: 42be cmp r6, r7
|
|
80044e6: 680b ldr r3, [r1, #0]
|
|
80044e8: 4682 mov sl, r0
|
|
80044ea: 460c mov r4, r1
|
|
80044ec: 4690 mov r8, r2
|
|
80044ee: d82d bhi.n 800454c <__ssputs_r+0x70>
|
|
80044f0: f9b1 200c ldrsh.w r2, [r1, #12]
|
|
80044f4: f412 6f90 tst.w r2, #1152 @ 0x480
|
|
80044f8: d026 beq.n 8004548 <__ssputs_r+0x6c>
|
|
80044fa: 6965 ldr r5, [r4, #20]
|
|
80044fc: 6909 ldr r1, [r1, #16]
|
|
80044fe: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
8004502: eba3 0901 sub.w r9, r3, r1
|
|
8004506: eb05 75d5 add.w r5, r5, r5, lsr #31
|
|
800450a: 1c7b adds r3, r7, #1
|
|
800450c: 444b add r3, r9
|
|
800450e: 106d asrs r5, r5, #1
|
|
8004510: 429d cmp r5, r3
|
|
8004512: bf38 it cc
|
|
8004514: 461d movcc r5, r3
|
|
8004516: 0553 lsls r3, r2, #21
|
|
8004518: d527 bpl.n 800456a <__ssputs_r+0x8e>
|
|
800451a: 4629 mov r1, r5
|
|
800451c: f7ff ff52 bl 80043c4 <_malloc_r>
|
|
8004520: 4606 mov r6, r0
|
|
8004522: b360 cbz r0, 800457e <__ssputs_r+0xa2>
|
|
8004524: 6921 ldr r1, [r4, #16]
|
|
8004526: 464a mov r2, r9
|
|
8004528: f7ff fed2 bl 80042d0 <memcpy>
|
|
800452c: 89a3 ldrh r3, [r4, #12]
|
|
800452e: f423 6390 bic.w r3, r3, #1152 @ 0x480
|
|
8004532: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8004536: 81a3 strh r3, [r4, #12]
|
|
8004538: 6126 str r6, [r4, #16]
|
|
800453a: 6165 str r5, [r4, #20]
|
|
800453c: 444e add r6, r9
|
|
800453e: eba5 0509 sub.w r5, r5, r9
|
|
8004542: 6026 str r6, [r4, #0]
|
|
8004544: 60a5 str r5, [r4, #8]
|
|
8004546: 463e mov r6, r7
|
|
8004548: 42be cmp r6, r7
|
|
800454a: d900 bls.n 800454e <__ssputs_r+0x72>
|
|
800454c: 463e mov r6, r7
|
|
800454e: 6820 ldr r0, [r4, #0]
|
|
8004550: 4632 mov r2, r6
|
|
8004552: 4641 mov r1, r8
|
|
8004554: f000 faa6 bl 8004aa4 <memmove>
|
|
8004558: 68a3 ldr r3, [r4, #8]
|
|
800455a: 1b9b subs r3, r3, r6
|
|
800455c: 60a3 str r3, [r4, #8]
|
|
800455e: 6823 ldr r3, [r4, #0]
|
|
8004560: 4433 add r3, r6
|
|
8004562: 6023 str r3, [r4, #0]
|
|
8004564: 2000 movs r0, #0
|
|
8004566: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800456a: 462a mov r2, r5
|
|
800456c: f000 fac4 bl 8004af8 <_realloc_r>
|
|
8004570: 4606 mov r6, r0
|
|
8004572: 2800 cmp r0, #0
|
|
8004574: d1e0 bne.n 8004538 <__ssputs_r+0x5c>
|
|
8004576: 6921 ldr r1, [r4, #16]
|
|
8004578: 4650 mov r0, sl
|
|
800457a: f7ff feb7 bl 80042ec <_free_r>
|
|
800457e: 230c movs r3, #12
|
|
8004580: f8ca 3000 str.w r3, [sl]
|
|
8004584: 89a3 ldrh r3, [r4, #12]
|
|
8004586: f043 0340 orr.w r3, r3, #64 @ 0x40
|
|
800458a: 81a3 strh r3, [r4, #12]
|
|
800458c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8004590: e7e9 b.n 8004566 <__ssputs_r+0x8a>
|
|
...
|
|
|
|
08004594 <_svfiprintf_r>:
|
|
8004594: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8004598: 4698 mov r8, r3
|
|
800459a: 898b ldrh r3, [r1, #12]
|
|
800459c: 061b lsls r3, r3, #24
|
|
800459e: b09d sub sp, #116 @ 0x74
|
|
80045a0: 4607 mov r7, r0
|
|
80045a2: 460d mov r5, r1
|
|
80045a4: 4614 mov r4, r2
|
|
80045a6: d510 bpl.n 80045ca <_svfiprintf_r+0x36>
|
|
80045a8: 690b ldr r3, [r1, #16]
|
|
80045aa: b973 cbnz r3, 80045ca <_svfiprintf_r+0x36>
|
|
80045ac: 2140 movs r1, #64 @ 0x40
|
|
80045ae: f7ff ff09 bl 80043c4 <_malloc_r>
|
|
80045b2: 6028 str r0, [r5, #0]
|
|
80045b4: 6128 str r0, [r5, #16]
|
|
80045b6: b930 cbnz r0, 80045c6 <_svfiprintf_r+0x32>
|
|
80045b8: 230c movs r3, #12
|
|
80045ba: 603b str r3, [r7, #0]
|
|
80045bc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80045c0: b01d add sp, #116 @ 0x74
|
|
80045c2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
80045c6: 2340 movs r3, #64 @ 0x40
|
|
80045c8: 616b str r3, [r5, #20]
|
|
80045ca: 2300 movs r3, #0
|
|
80045cc: 9309 str r3, [sp, #36] @ 0x24
|
|
80045ce: 2320 movs r3, #32
|
|
80045d0: f88d 3029 strb.w r3, [sp, #41] @ 0x29
|
|
80045d4: f8cd 800c str.w r8, [sp, #12]
|
|
80045d8: 2330 movs r3, #48 @ 0x30
|
|
80045da: f8df 819c ldr.w r8, [pc, #412] @ 8004778 <_svfiprintf_r+0x1e4>
|
|
80045de: f88d 302a strb.w r3, [sp, #42] @ 0x2a
|
|
80045e2: f04f 0901 mov.w r9, #1
|
|
80045e6: 4623 mov r3, r4
|
|
80045e8: 469a mov sl, r3
|
|
80045ea: f813 2b01 ldrb.w r2, [r3], #1
|
|
80045ee: b10a cbz r2, 80045f4 <_svfiprintf_r+0x60>
|
|
80045f0: 2a25 cmp r2, #37 @ 0x25
|
|
80045f2: d1f9 bne.n 80045e8 <_svfiprintf_r+0x54>
|
|
80045f4: ebba 0b04 subs.w fp, sl, r4
|
|
80045f8: d00b beq.n 8004612 <_svfiprintf_r+0x7e>
|
|
80045fa: 465b mov r3, fp
|
|
80045fc: 4622 mov r2, r4
|
|
80045fe: 4629 mov r1, r5
|
|
8004600: 4638 mov r0, r7
|
|
8004602: f7ff ff6b bl 80044dc <__ssputs_r>
|
|
8004606: 3001 adds r0, #1
|
|
8004608: f000 80a7 beq.w 800475a <_svfiprintf_r+0x1c6>
|
|
800460c: 9a09 ldr r2, [sp, #36] @ 0x24
|
|
800460e: 445a add r2, fp
|
|
8004610: 9209 str r2, [sp, #36] @ 0x24
|
|
8004612: f89a 3000 ldrb.w r3, [sl]
|
|
8004616: 2b00 cmp r3, #0
|
|
8004618: f000 809f beq.w 800475a <_svfiprintf_r+0x1c6>
|
|
800461c: 2300 movs r3, #0
|
|
800461e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8004622: e9cd 2305 strd r2, r3, [sp, #20]
|
|
8004626: f10a 0a01 add.w sl, sl, #1
|
|
800462a: 9304 str r3, [sp, #16]
|
|
800462c: 9307 str r3, [sp, #28]
|
|
800462e: f88d 3053 strb.w r3, [sp, #83] @ 0x53
|
|
8004632: 931a str r3, [sp, #104] @ 0x68
|
|
8004634: 4654 mov r4, sl
|
|
8004636: 2205 movs r2, #5
|
|
8004638: f814 1b01 ldrb.w r1, [r4], #1
|
|
800463c: 484e ldr r0, [pc, #312] @ (8004778 <_svfiprintf_r+0x1e4>)
|
|
800463e: f7fb fdcf bl 80001e0 <memchr>
|
|
8004642: 9a04 ldr r2, [sp, #16]
|
|
8004644: b9d8 cbnz r0, 800467e <_svfiprintf_r+0xea>
|
|
8004646: 06d0 lsls r0, r2, #27
|
|
8004648: bf44 itt mi
|
|
800464a: 2320 movmi r3, #32
|
|
800464c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
|
|
8004650: 0711 lsls r1, r2, #28
|
|
8004652: bf44 itt mi
|
|
8004654: 232b movmi r3, #43 @ 0x2b
|
|
8004656: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
|
|
800465a: f89a 3000 ldrb.w r3, [sl]
|
|
800465e: 2b2a cmp r3, #42 @ 0x2a
|
|
8004660: d015 beq.n 800468e <_svfiprintf_r+0xfa>
|
|
8004662: 9a07 ldr r2, [sp, #28]
|
|
8004664: 4654 mov r4, sl
|
|
8004666: 2000 movs r0, #0
|
|
8004668: f04f 0c0a mov.w ip, #10
|
|
800466c: 4621 mov r1, r4
|
|
800466e: f811 3b01 ldrb.w r3, [r1], #1
|
|
8004672: 3b30 subs r3, #48 @ 0x30
|
|
8004674: 2b09 cmp r3, #9
|
|
8004676: d94b bls.n 8004710 <_svfiprintf_r+0x17c>
|
|
8004678: b1b0 cbz r0, 80046a8 <_svfiprintf_r+0x114>
|
|
800467a: 9207 str r2, [sp, #28]
|
|
800467c: e014 b.n 80046a8 <_svfiprintf_r+0x114>
|
|
800467e: eba0 0308 sub.w r3, r0, r8
|
|
8004682: fa09 f303 lsl.w r3, r9, r3
|
|
8004686: 4313 orrs r3, r2
|
|
8004688: 9304 str r3, [sp, #16]
|
|
800468a: 46a2 mov sl, r4
|
|
800468c: e7d2 b.n 8004634 <_svfiprintf_r+0xa0>
|
|
800468e: 9b03 ldr r3, [sp, #12]
|
|
8004690: 1d19 adds r1, r3, #4
|
|
8004692: 681b ldr r3, [r3, #0]
|
|
8004694: 9103 str r1, [sp, #12]
|
|
8004696: 2b00 cmp r3, #0
|
|
8004698: bfbb ittet lt
|
|
800469a: 425b neglt r3, r3
|
|
800469c: f042 0202 orrlt.w r2, r2, #2
|
|
80046a0: 9307 strge r3, [sp, #28]
|
|
80046a2: 9307 strlt r3, [sp, #28]
|
|
80046a4: bfb8 it lt
|
|
80046a6: 9204 strlt r2, [sp, #16]
|
|
80046a8: 7823 ldrb r3, [r4, #0]
|
|
80046aa: 2b2e cmp r3, #46 @ 0x2e
|
|
80046ac: d10a bne.n 80046c4 <_svfiprintf_r+0x130>
|
|
80046ae: 7863 ldrb r3, [r4, #1]
|
|
80046b0: 2b2a cmp r3, #42 @ 0x2a
|
|
80046b2: d132 bne.n 800471a <_svfiprintf_r+0x186>
|
|
80046b4: 9b03 ldr r3, [sp, #12]
|
|
80046b6: 1d1a adds r2, r3, #4
|
|
80046b8: 681b ldr r3, [r3, #0]
|
|
80046ba: 9203 str r2, [sp, #12]
|
|
80046bc: ea43 73e3 orr.w r3, r3, r3, asr #31
|
|
80046c0: 3402 adds r4, #2
|
|
80046c2: 9305 str r3, [sp, #20]
|
|
80046c4: f8df a0c0 ldr.w sl, [pc, #192] @ 8004788 <_svfiprintf_r+0x1f4>
|
|
80046c8: 7821 ldrb r1, [r4, #0]
|
|
80046ca: 2203 movs r2, #3
|
|
80046cc: 4650 mov r0, sl
|
|
80046ce: f7fb fd87 bl 80001e0 <memchr>
|
|
80046d2: b138 cbz r0, 80046e4 <_svfiprintf_r+0x150>
|
|
80046d4: 9b04 ldr r3, [sp, #16]
|
|
80046d6: eba0 000a sub.w r0, r0, sl
|
|
80046da: 2240 movs r2, #64 @ 0x40
|
|
80046dc: 4082 lsls r2, r0
|
|
80046de: 4313 orrs r3, r2
|
|
80046e0: 3401 adds r4, #1
|
|
80046e2: 9304 str r3, [sp, #16]
|
|
80046e4: f814 1b01 ldrb.w r1, [r4], #1
|
|
80046e8: 4824 ldr r0, [pc, #144] @ (800477c <_svfiprintf_r+0x1e8>)
|
|
80046ea: f88d 1028 strb.w r1, [sp, #40] @ 0x28
|
|
80046ee: 2206 movs r2, #6
|
|
80046f0: f7fb fd76 bl 80001e0 <memchr>
|
|
80046f4: 2800 cmp r0, #0
|
|
80046f6: d036 beq.n 8004766 <_svfiprintf_r+0x1d2>
|
|
80046f8: 4b21 ldr r3, [pc, #132] @ (8004780 <_svfiprintf_r+0x1ec>)
|
|
80046fa: bb1b cbnz r3, 8004744 <_svfiprintf_r+0x1b0>
|
|
80046fc: 9b03 ldr r3, [sp, #12]
|
|
80046fe: 3307 adds r3, #7
|
|
8004700: f023 0307 bic.w r3, r3, #7
|
|
8004704: 3308 adds r3, #8
|
|
8004706: 9303 str r3, [sp, #12]
|
|
8004708: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
800470a: 4433 add r3, r6
|
|
800470c: 9309 str r3, [sp, #36] @ 0x24
|
|
800470e: e76a b.n 80045e6 <_svfiprintf_r+0x52>
|
|
8004710: fb0c 3202 mla r2, ip, r2, r3
|
|
8004714: 460c mov r4, r1
|
|
8004716: 2001 movs r0, #1
|
|
8004718: e7a8 b.n 800466c <_svfiprintf_r+0xd8>
|
|
800471a: 2300 movs r3, #0
|
|
800471c: 3401 adds r4, #1
|
|
800471e: 9305 str r3, [sp, #20]
|
|
8004720: 4619 mov r1, r3
|
|
8004722: f04f 0c0a mov.w ip, #10
|
|
8004726: 4620 mov r0, r4
|
|
8004728: f810 2b01 ldrb.w r2, [r0], #1
|
|
800472c: 3a30 subs r2, #48 @ 0x30
|
|
800472e: 2a09 cmp r2, #9
|
|
8004730: d903 bls.n 800473a <_svfiprintf_r+0x1a6>
|
|
8004732: 2b00 cmp r3, #0
|
|
8004734: d0c6 beq.n 80046c4 <_svfiprintf_r+0x130>
|
|
8004736: 9105 str r1, [sp, #20]
|
|
8004738: e7c4 b.n 80046c4 <_svfiprintf_r+0x130>
|
|
800473a: fb0c 2101 mla r1, ip, r1, r2
|
|
800473e: 4604 mov r4, r0
|
|
8004740: 2301 movs r3, #1
|
|
8004742: e7f0 b.n 8004726 <_svfiprintf_r+0x192>
|
|
8004744: ab03 add r3, sp, #12
|
|
8004746: 9300 str r3, [sp, #0]
|
|
8004748: 462a mov r2, r5
|
|
800474a: 4b0e ldr r3, [pc, #56] @ (8004784 <_svfiprintf_r+0x1f0>)
|
|
800474c: a904 add r1, sp, #16
|
|
800474e: 4638 mov r0, r7
|
|
8004750: f3af 8000 nop.w
|
|
8004754: 1c42 adds r2, r0, #1
|
|
8004756: 4606 mov r6, r0
|
|
8004758: d1d6 bne.n 8004708 <_svfiprintf_r+0x174>
|
|
800475a: 89ab ldrh r3, [r5, #12]
|
|
800475c: 065b lsls r3, r3, #25
|
|
800475e: f53f af2d bmi.w 80045bc <_svfiprintf_r+0x28>
|
|
8004762: 9809 ldr r0, [sp, #36] @ 0x24
|
|
8004764: e72c b.n 80045c0 <_svfiprintf_r+0x2c>
|
|
8004766: ab03 add r3, sp, #12
|
|
8004768: 9300 str r3, [sp, #0]
|
|
800476a: 462a mov r2, r5
|
|
800476c: 4b05 ldr r3, [pc, #20] @ (8004784 <_svfiprintf_r+0x1f0>)
|
|
800476e: a904 add r1, sp, #16
|
|
8004770: 4638 mov r0, r7
|
|
8004772: f000 f879 bl 8004868 <_printf_i>
|
|
8004776: e7ed b.n 8004754 <_svfiprintf_r+0x1c0>
|
|
8004778: 08007ff8 .word 0x08007ff8
|
|
800477c: 08008002 .word 0x08008002
|
|
8004780: 00000000 .word 0x00000000
|
|
8004784: 080044dd .word 0x080044dd
|
|
8004788: 08007ffe .word 0x08007ffe
|
|
|
|
0800478c <_printf_common>:
|
|
800478c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8004790: 4616 mov r6, r2
|
|
8004792: 4698 mov r8, r3
|
|
8004794: 688a ldr r2, [r1, #8]
|
|
8004796: 690b ldr r3, [r1, #16]
|
|
8004798: f8dd 9020 ldr.w r9, [sp, #32]
|
|
800479c: 4293 cmp r3, r2
|
|
800479e: bfb8 it lt
|
|
80047a0: 4613 movlt r3, r2
|
|
80047a2: 6033 str r3, [r6, #0]
|
|
80047a4: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
|
|
80047a8: 4607 mov r7, r0
|
|
80047aa: 460c mov r4, r1
|
|
80047ac: b10a cbz r2, 80047b2 <_printf_common+0x26>
|
|
80047ae: 3301 adds r3, #1
|
|
80047b0: 6033 str r3, [r6, #0]
|
|
80047b2: 6823 ldr r3, [r4, #0]
|
|
80047b4: 0699 lsls r1, r3, #26
|
|
80047b6: bf42 ittt mi
|
|
80047b8: 6833 ldrmi r3, [r6, #0]
|
|
80047ba: 3302 addmi r3, #2
|
|
80047bc: 6033 strmi r3, [r6, #0]
|
|
80047be: 6825 ldr r5, [r4, #0]
|
|
80047c0: f015 0506 ands.w r5, r5, #6
|
|
80047c4: d106 bne.n 80047d4 <_printf_common+0x48>
|
|
80047c6: f104 0a19 add.w sl, r4, #25
|
|
80047ca: 68e3 ldr r3, [r4, #12]
|
|
80047cc: 6832 ldr r2, [r6, #0]
|
|
80047ce: 1a9b subs r3, r3, r2
|
|
80047d0: 42ab cmp r3, r5
|
|
80047d2: dc26 bgt.n 8004822 <_printf_common+0x96>
|
|
80047d4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
|
|
80047d8: 6822 ldr r2, [r4, #0]
|
|
80047da: 3b00 subs r3, #0
|
|
80047dc: bf18 it ne
|
|
80047de: 2301 movne r3, #1
|
|
80047e0: 0692 lsls r2, r2, #26
|
|
80047e2: d42b bmi.n 800483c <_printf_common+0xb0>
|
|
80047e4: f104 0243 add.w r2, r4, #67 @ 0x43
|
|
80047e8: 4641 mov r1, r8
|
|
80047ea: 4638 mov r0, r7
|
|
80047ec: 47c8 blx r9
|
|
80047ee: 3001 adds r0, #1
|
|
80047f0: d01e beq.n 8004830 <_printf_common+0xa4>
|
|
80047f2: 6823 ldr r3, [r4, #0]
|
|
80047f4: 6922 ldr r2, [r4, #16]
|
|
80047f6: f003 0306 and.w r3, r3, #6
|
|
80047fa: 2b04 cmp r3, #4
|
|
80047fc: bf02 ittt eq
|
|
80047fe: 68e5 ldreq r5, [r4, #12]
|
|
8004800: 6833 ldreq r3, [r6, #0]
|
|
8004802: 1aed subeq r5, r5, r3
|
|
8004804: 68a3 ldr r3, [r4, #8]
|
|
8004806: bf0c ite eq
|
|
8004808: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
|
800480c: 2500 movne r5, #0
|
|
800480e: 4293 cmp r3, r2
|
|
8004810: bfc4 itt gt
|
|
8004812: 1a9b subgt r3, r3, r2
|
|
8004814: 18ed addgt r5, r5, r3
|
|
8004816: 2600 movs r6, #0
|
|
8004818: 341a adds r4, #26
|
|
800481a: 42b5 cmp r5, r6
|
|
800481c: d11a bne.n 8004854 <_printf_common+0xc8>
|
|
800481e: 2000 movs r0, #0
|
|
8004820: e008 b.n 8004834 <_printf_common+0xa8>
|
|
8004822: 2301 movs r3, #1
|
|
8004824: 4652 mov r2, sl
|
|
8004826: 4641 mov r1, r8
|
|
8004828: 4638 mov r0, r7
|
|
800482a: 47c8 blx r9
|
|
800482c: 3001 adds r0, #1
|
|
800482e: d103 bne.n 8004838 <_printf_common+0xac>
|
|
8004830: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8004834: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8004838: 3501 adds r5, #1
|
|
800483a: e7c6 b.n 80047ca <_printf_common+0x3e>
|
|
800483c: 18e1 adds r1, r4, r3
|
|
800483e: 1c5a adds r2, r3, #1
|
|
8004840: 2030 movs r0, #48 @ 0x30
|
|
8004842: f881 0043 strb.w r0, [r1, #67] @ 0x43
|
|
8004846: 4422 add r2, r4
|
|
8004848: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
|
|
800484c: f882 1043 strb.w r1, [r2, #67] @ 0x43
|
|
8004850: 3302 adds r3, #2
|
|
8004852: e7c7 b.n 80047e4 <_printf_common+0x58>
|
|
8004854: 2301 movs r3, #1
|
|
8004856: 4622 mov r2, r4
|
|
8004858: 4641 mov r1, r8
|
|
800485a: 4638 mov r0, r7
|
|
800485c: 47c8 blx r9
|
|
800485e: 3001 adds r0, #1
|
|
8004860: d0e6 beq.n 8004830 <_printf_common+0xa4>
|
|
8004862: 3601 adds r6, #1
|
|
8004864: e7d9 b.n 800481a <_printf_common+0x8e>
|
|
...
|
|
|
|
08004868 <_printf_i>:
|
|
8004868: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800486c: 7e0f ldrb r7, [r1, #24]
|
|
800486e: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
8004870: 2f78 cmp r7, #120 @ 0x78
|
|
8004872: 4691 mov r9, r2
|
|
8004874: 4680 mov r8, r0
|
|
8004876: 460c mov r4, r1
|
|
8004878: 469a mov sl, r3
|
|
800487a: f101 0243 add.w r2, r1, #67 @ 0x43
|
|
800487e: d807 bhi.n 8004890 <_printf_i+0x28>
|
|
8004880: 2f62 cmp r7, #98 @ 0x62
|
|
8004882: d80a bhi.n 800489a <_printf_i+0x32>
|
|
8004884: 2f00 cmp r7, #0
|
|
8004886: f000 80d1 beq.w 8004a2c <_printf_i+0x1c4>
|
|
800488a: 2f58 cmp r7, #88 @ 0x58
|
|
800488c: f000 80b8 beq.w 8004a00 <_printf_i+0x198>
|
|
8004890: f104 0642 add.w r6, r4, #66 @ 0x42
|
|
8004894: f884 7042 strb.w r7, [r4, #66] @ 0x42
|
|
8004898: e03a b.n 8004910 <_printf_i+0xa8>
|
|
800489a: f1a7 0363 sub.w r3, r7, #99 @ 0x63
|
|
800489e: 2b15 cmp r3, #21
|
|
80048a0: d8f6 bhi.n 8004890 <_printf_i+0x28>
|
|
80048a2: a101 add r1, pc, #4 @ (adr r1, 80048a8 <_printf_i+0x40>)
|
|
80048a4: f851 f023 ldr.w pc, [r1, r3, lsl #2]
|
|
80048a8: 08004901 .word 0x08004901
|
|
80048ac: 08004915 .word 0x08004915
|
|
80048b0: 08004891 .word 0x08004891
|
|
80048b4: 08004891 .word 0x08004891
|
|
80048b8: 08004891 .word 0x08004891
|
|
80048bc: 08004891 .word 0x08004891
|
|
80048c0: 08004915 .word 0x08004915
|
|
80048c4: 08004891 .word 0x08004891
|
|
80048c8: 08004891 .word 0x08004891
|
|
80048cc: 08004891 .word 0x08004891
|
|
80048d0: 08004891 .word 0x08004891
|
|
80048d4: 08004a13 .word 0x08004a13
|
|
80048d8: 0800493f .word 0x0800493f
|
|
80048dc: 080049cd .word 0x080049cd
|
|
80048e0: 08004891 .word 0x08004891
|
|
80048e4: 08004891 .word 0x08004891
|
|
80048e8: 08004a35 .word 0x08004a35
|
|
80048ec: 08004891 .word 0x08004891
|
|
80048f0: 0800493f .word 0x0800493f
|
|
80048f4: 08004891 .word 0x08004891
|
|
80048f8: 08004891 .word 0x08004891
|
|
80048fc: 080049d5 .word 0x080049d5
|
|
8004900: 6833 ldr r3, [r6, #0]
|
|
8004902: 1d1a adds r2, r3, #4
|
|
8004904: 681b ldr r3, [r3, #0]
|
|
8004906: 6032 str r2, [r6, #0]
|
|
8004908: f104 0642 add.w r6, r4, #66 @ 0x42
|
|
800490c: f884 3042 strb.w r3, [r4, #66] @ 0x42
|
|
8004910: 2301 movs r3, #1
|
|
8004912: e09c b.n 8004a4e <_printf_i+0x1e6>
|
|
8004914: 6833 ldr r3, [r6, #0]
|
|
8004916: 6820 ldr r0, [r4, #0]
|
|
8004918: 1d19 adds r1, r3, #4
|
|
800491a: 6031 str r1, [r6, #0]
|
|
800491c: 0606 lsls r6, r0, #24
|
|
800491e: d501 bpl.n 8004924 <_printf_i+0xbc>
|
|
8004920: 681d ldr r5, [r3, #0]
|
|
8004922: e003 b.n 800492c <_printf_i+0xc4>
|
|
8004924: 0645 lsls r5, r0, #25
|
|
8004926: d5fb bpl.n 8004920 <_printf_i+0xb8>
|
|
8004928: f9b3 5000 ldrsh.w r5, [r3]
|
|
800492c: 2d00 cmp r5, #0
|
|
800492e: da03 bge.n 8004938 <_printf_i+0xd0>
|
|
8004930: 232d movs r3, #45 @ 0x2d
|
|
8004932: 426d negs r5, r5
|
|
8004934: f884 3043 strb.w r3, [r4, #67] @ 0x43
|
|
8004938: 4858 ldr r0, [pc, #352] @ (8004a9c <_printf_i+0x234>)
|
|
800493a: 230a movs r3, #10
|
|
800493c: e011 b.n 8004962 <_printf_i+0xfa>
|
|
800493e: 6821 ldr r1, [r4, #0]
|
|
8004940: 6833 ldr r3, [r6, #0]
|
|
8004942: 0608 lsls r0, r1, #24
|
|
8004944: f853 5b04 ldr.w r5, [r3], #4
|
|
8004948: d402 bmi.n 8004950 <_printf_i+0xe8>
|
|
800494a: 0649 lsls r1, r1, #25
|
|
800494c: bf48 it mi
|
|
800494e: b2ad uxthmi r5, r5
|
|
8004950: 2f6f cmp r7, #111 @ 0x6f
|
|
8004952: 4852 ldr r0, [pc, #328] @ (8004a9c <_printf_i+0x234>)
|
|
8004954: 6033 str r3, [r6, #0]
|
|
8004956: bf14 ite ne
|
|
8004958: 230a movne r3, #10
|
|
800495a: 2308 moveq r3, #8
|
|
800495c: 2100 movs r1, #0
|
|
800495e: f884 1043 strb.w r1, [r4, #67] @ 0x43
|
|
8004962: 6866 ldr r6, [r4, #4]
|
|
8004964: 60a6 str r6, [r4, #8]
|
|
8004966: 2e00 cmp r6, #0
|
|
8004968: db05 blt.n 8004976 <_printf_i+0x10e>
|
|
800496a: 6821 ldr r1, [r4, #0]
|
|
800496c: 432e orrs r6, r5
|
|
800496e: f021 0104 bic.w r1, r1, #4
|
|
8004972: 6021 str r1, [r4, #0]
|
|
8004974: d04b beq.n 8004a0e <_printf_i+0x1a6>
|
|
8004976: 4616 mov r6, r2
|
|
8004978: fbb5 f1f3 udiv r1, r5, r3
|
|
800497c: fb03 5711 mls r7, r3, r1, r5
|
|
8004980: 5dc7 ldrb r7, [r0, r7]
|
|
8004982: f806 7d01 strb.w r7, [r6, #-1]!
|
|
8004986: 462f mov r7, r5
|
|
8004988: 42bb cmp r3, r7
|
|
800498a: 460d mov r5, r1
|
|
800498c: d9f4 bls.n 8004978 <_printf_i+0x110>
|
|
800498e: 2b08 cmp r3, #8
|
|
8004990: d10b bne.n 80049aa <_printf_i+0x142>
|
|
8004992: 6823 ldr r3, [r4, #0]
|
|
8004994: 07df lsls r7, r3, #31
|
|
8004996: d508 bpl.n 80049aa <_printf_i+0x142>
|
|
8004998: 6923 ldr r3, [r4, #16]
|
|
800499a: 6861 ldr r1, [r4, #4]
|
|
800499c: 4299 cmp r1, r3
|
|
800499e: bfde ittt le
|
|
80049a0: 2330 movle r3, #48 @ 0x30
|
|
80049a2: f806 3c01 strble.w r3, [r6, #-1]
|
|
80049a6: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff
|
|
80049aa: 1b92 subs r2, r2, r6
|
|
80049ac: 6122 str r2, [r4, #16]
|
|
80049ae: f8cd a000 str.w sl, [sp]
|
|
80049b2: 464b mov r3, r9
|
|
80049b4: aa03 add r2, sp, #12
|
|
80049b6: 4621 mov r1, r4
|
|
80049b8: 4640 mov r0, r8
|
|
80049ba: f7ff fee7 bl 800478c <_printf_common>
|
|
80049be: 3001 adds r0, #1
|
|
80049c0: d14a bne.n 8004a58 <_printf_i+0x1f0>
|
|
80049c2: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80049c6: b004 add sp, #16
|
|
80049c8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
80049cc: 6823 ldr r3, [r4, #0]
|
|
80049ce: f043 0320 orr.w r3, r3, #32
|
|
80049d2: 6023 str r3, [r4, #0]
|
|
80049d4: 4832 ldr r0, [pc, #200] @ (8004aa0 <_printf_i+0x238>)
|
|
80049d6: 2778 movs r7, #120 @ 0x78
|
|
80049d8: f884 7045 strb.w r7, [r4, #69] @ 0x45
|
|
80049dc: 6823 ldr r3, [r4, #0]
|
|
80049de: 6831 ldr r1, [r6, #0]
|
|
80049e0: 061f lsls r7, r3, #24
|
|
80049e2: f851 5b04 ldr.w r5, [r1], #4
|
|
80049e6: d402 bmi.n 80049ee <_printf_i+0x186>
|
|
80049e8: 065f lsls r7, r3, #25
|
|
80049ea: bf48 it mi
|
|
80049ec: b2ad uxthmi r5, r5
|
|
80049ee: 6031 str r1, [r6, #0]
|
|
80049f0: 07d9 lsls r1, r3, #31
|
|
80049f2: bf44 itt mi
|
|
80049f4: f043 0320 orrmi.w r3, r3, #32
|
|
80049f8: 6023 strmi r3, [r4, #0]
|
|
80049fa: b11d cbz r5, 8004a04 <_printf_i+0x19c>
|
|
80049fc: 2310 movs r3, #16
|
|
80049fe: e7ad b.n 800495c <_printf_i+0xf4>
|
|
8004a00: 4826 ldr r0, [pc, #152] @ (8004a9c <_printf_i+0x234>)
|
|
8004a02: e7e9 b.n 80049d8 <_printf_i+0x170>
|
|
8004a04: 6823 ldr r3, [r4, #0]
|
|
8004a06: f023 0320 bic.w r3, r3, #32
|
|
8004a0a: 6023 str r3, [r4, #0]
|
|
8004a0c: e7f6 b.n 80049fc <_printf_i+0x194>
|
|
8004a0e: 4616 mov r6, r2
|
|
8004a10: e7bd b.n 800498e <_printf_i+0x126>
|
|
8004a12: 6833 ldr r3, [r6, #0]
|
|
8004a14: 6825 ldr r5, [r4, #0]
|
|
8004a16: 6961 ldr r1, [r4, #20]
|
|
8004a18: 1d18 adds r0, r3, #4
|
|
8004a1a: 6030 str r0, [r6, #0]
|
|
8004a1c: 062e lsls r6, r5, #24
|
|
8004a1e: 681b ldr r3, [r3, #0]
|
|
8004a20: d501 bpl.n 8004a26 <_printf_i+0x1be>
|
|
8004a22: 6019 str r1, [r3, #0]
|
|
8004a24: e002 b.n 8004a2c <_printf_i+0x1c4>
|
|
8004a26: 0668 lsls r0, r5, #25
|
|
8004a28: d5fb bpl.n 8004a22 <_printf_i+0x1ba>
|
|
8004a2a: 8019 strh r1, [r3, #0]
|
|
8004a2c: 2300 movs r3, #0
|
|
8004a2e: 6123 str r3, [r4, #16]
|
|
8004a30: 4616 mov r6, r2
|
|
8004a32: e7bc b.n 80049ae <_printf_i+0x146>
|
|
8004a34: 6833 ldr r3, [r6, #0]
|
|
8004a36: 1d1a adds r2, r3, #4
|
|
8004a38: 6032 str r2, [r6, #0]
|
|
8004a3a: 681e ldr r6, [r3, #0]
|
|
8004a3c: 6862 ldr r2, [r4, #4]
|
|
8004a3e: 2100 movs r1, #0
|
|
8004a40: 4630 mov r0, r6
|
|
8004a42: f7fb fbcd bl 80001e0 <memchr>
|
|
8004a46: b108 cbz r0, 8004a4c <_printf_i+0x1e4>
|
|
8004a48: 1b80 subs r0, r0, r6
|
|
8004a4a: 6060 str r0, [r4, #4]
|
|
8004a4c: 6863 ldr r3, [r4, #4]
|
|
8004a4e: 6123 str r3, [r4, #16]
|
|
8004a50: 2300 movs r3, #0
|
|
8004a52: f884 3043 strb.w r3, [r4, #67] @ 0x43
|
|
8004a56: e7aa b.n 80049ae <_printf_i+0x146>
|
|
8004a58: 6923 ldr r3, [r4, #16]
|
|
8004a5a: 4632 mov r2, r6
|
|
8004a5c: 4649 mov r1, r9
|
|
8004a5e: 4640 mov r0, r8
|
|
8004a60: 47d0 blx sl
|
|
8004a62: 3001 adds r0, #1
|
|
8004a64: d0ad beq.n 80049c2 <_printf_i+0x15a>
|
|
8004a66: 6823 ldr r3, [r4, #0]
|
|
8004a68: 079b lsls r3, r3, #30
|
|
8004a6a: d413 bmi.n 8004a94 <_printf_i+0x22c>
|
|
8004a6c: 68e0 ldr r0, [r4, #12]
|
|
8004a6e: 9b03 ldr r3, [sp, #12]
|
|
8004a70: 4298 cmp r0, r3
|
|
8004a72: bfb8 it lt
|
|
8004a74: 4618 movlt r0, r3
|
|
8004a76: e7a6 b.n 80049c6 <_printf_i+0x15e>
|
|
8004a78: 2301 movs r3, #1
|
|
8004a7a: 4632 mov r2, r6
|
|
8004a7c: 4649 mov r1, r9
|
|
8004a7e: 4640 mov r0, r8
|
|
8004a80: 47d0 blx sl
|
|
8004a82: 3001 adds r0, #1
|
|
8004a84: d09d beq.n 80049c2 <_printf_i+0x15a>
|
|
8004a86: 3501 adds r5, #1
|
|
8004a88: 68e3 ldr r3, [r4, #12]
|
|
8004a8a: 9903 ldr r1, [sp, #12]
|
|
8004a8c: 1a5b subs r3, r3, r1
|
|
8004a8e: 42ab cmp r3, r5
|
|
8004a90: dcf2 bgt.n 8004a78 <_printf_i+0x210>
|
|
8004a92: e7eb b.n 8004a6c <_printf_i+0x204>
|
|
8004a94: 2500 movs r5, #0
|
|
8004a96: f104 0619 add.w r6, r4, #25
|
|
8004a9a: e7f5 b.n 8004a88 <_printf_i+0x220>
|
|
8004a9c: 08008009 .word 0x08008009
|
|
8004aa0: 0800801a .word 0x0800801a
|
|
|
|
08004aa4 <memmove>:
|
|
8004aa4: 4288 cmp r0, r1
|
|
8004aa6: b510 push {r4, lr}
|
|
8004aa8: eb01 0402 add.w r4, r1, r2
|
|
8004aac: d902 bls.n 8004ab4 <memmove+0x10>
|
|
8004aae: 4284 cmp r4, r0
|
|
8004ab0: 4623 mov r3, r4
|
|
8004ab2: d807 bhi.n 8004ac4 <memmove+0x20>
|
|
8004ab4: 1e43 subs r3, r0, #1
|
|
8004ab6: 42a1 cmp r1, r4
|
|
8004ab8: d008 beq.n 8004acc <memmove+0x28>
|
|
8004aba: f811 2b01 ldrb.w r2, [r1], #1
|
|
8004abe: f803 2f01 strb.w r2, [r3, #1]!
|
|
8004ac2: e7f8 b.n 8004ab6 <memmove+0x12>
|
|
8004ac4: 4402 add r2, r0
|
|
8004ac6: 4601 mov r1, r0
|
|
8004ac8: 428a cmp r2, r1
|
|
8004aca: d100 bne.n 8004ace <memmove+0x2a>
|
|
8004acc: bd10 pop {r4, pc}
|
|
8004ace: f813 4d01 ldrb.w r4, [r3, #-1]!
|
|
8004ad2: f802 4d01 strb.w r4, [r2, #-1]!
|
|
8004ad6: e7f7 b.n 8004ac8 <memmove+0x24>
|
|
|
|
08004ad8 <_sbrk_r>:
|
|
8004ad8: b538 push {r3, r4, r5, lr}
|
|
8004ada: 4d06 ldr r5, [pc, #24] @ (8004af4 <_sbrk_r+0x1c>)
|
|
8004adc: 2300 movs r3, #0
|
|
8004ade: 4604 mov r4, r0
|
|
8004ae0: 4608 mov r0, r1
|
|
8004ae2: 602b str r3, [r5, #0]
|
|
8004ae4: f7ff fad8 bl 8004098 <_sbrk>
|
|
8004ae8: 1c43 adds r3, r0, #1
|
|
8004aea: d102 bne.n 8004af2 <_sbrk_r+0x1a>
|
|
8004aec: 682b ldr r3, [r5, #0]
|
|
8004aee: b103 cbz r3, 8004af2 <_sbrk_r+0x1a>
|
|
8004af0: 6023 str r3, [r4, #0]
|
|
8004af2: bd38 pop {r3, r4, r5, pc}
|
|
8004af4: 20004700 .word 0x20004700
|
|
|
|
08004af8 <_realloc_r>:
|
|
8004af8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
8004afc: 4607 mov r7, r0
|
|
8004afe: 4614 mov r4, r2
|
|
8004b00: 460d mov r5, r1
|
|
8004b02: b921 cbnz r1, 8004b0e <_realloc_r+0x16>
|
|
8004b04: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
|
8004b08: 4611 mov r1, r2
|
|
8004b0a: f7ff bc5b b.w 80043c4 <_malloc_r>
|
|
8004b0e: b92a cbnz r2, 8004b1c <_realloc_r+0x24>
|
|
8004b10: f7ff fbec bl 80042ec <_free_r>
|
|
8004b14: 4625 mov r5, r4
|
|
8004b16: 4628 mov r0, r5
|
|
8004b18: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
8004b1c: f000 f81a bl 8004b54 <_malloc_usable_size_r>
|
|
8004b20: 4284 cmp r4, r0
|
|
8004b22: 4606 mov r6, r0
|
|
8004b24: d802 bhi.n 8004b2c <_realloc_r+0x34>
|
|
8004b26: ebb4 0f50 cmp.w r4, r0, lsr #1
|
|
8004b2a: d8f4 bhi.n 8004b16 <_realloc_r+0x1e>
|
|
8004b2c: 4621 mov r1, r4
|
|
8004b2e: 4638 mov r0, r7
|
|
8004b30: f7ff fc48 bl 80043c4 <_malloc_r>
|
|
8004b34: 4680 mov r8, r0
|
|
8004b36: b908 cbnz r0, 8004b3c <_realloc_r+0x44>
|
|
8004b38: 4645 mov r5, r8
|
|
8004b3a: e7ec b.n 8004b16 <_realloc_r+0x1e>
|
|
8004b3c: 42b4 cmp r4, r6
|
|
8004b3e: 4622 mov r2, r4
|
|
8004b40: 4629 mov r1, r5
|
|
8004b42: bf28 it cs
|
|
8004b44: 4632 movcs r2, r6
|
|
8004b46: f7ff fbc3 bl 80042d0 <memcpy>
|
|
8004b4a: 4629 mov r1, r5
|
|
8004b4c: 4638 mov r0, r7
|
|
8004b4e: f7ff fbcd bl 80042ec <_free_r>
|
|
8004b52: e7f1 b.n 8004b38 <_realloc_r+0x40>
|
|
|
|
08004b54 <_malloc_usable_size_r>:
|
|
8004b54: f851 3c04 ldr.w r3, [r1, #-4]
|
|
8004b58: 1f18 subs r0, r3, #4
|
|
8004b5a: 2b00 cmp r3, #0
|
|
8004b5c: bfbc itt lt
|
|
8004b5e: 580b ldrlt r3, [r1, r0]
|
|
8004b60: 18c0 addlt r0, r0, r3
|
|
8004b62: 4770 bx lr
|
|
|
|
08004b64 <sqrtf>:
|
|
8004b64: b508 push {r3, lr}
|
|
8004b66: ed2d 8b02 vpush {d8}
|
|
8004b6a: eeb0 8a40 vmov.f32 s16, s0
|
|
8004b6e: f000 f8a1 bl 8004cb4 <__ieee754_sqrtf>
|
|
8004b72: eeb4 8a48 vcmp.f32 s16, s16
|
|
8004b76: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8004b7a: d60c bvs.n 8004b96 <sqrtf+0x32>
|
|
8004b7c: eddf 8a07 vldr s17, [pc, #28] @ 8004b9c <sqrtf+0x38>
|
|
8004b80: eeb4 8ae8 vcmpe.f32 s16, s17
|
|
8004b84: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8004b88: d505 bpl.n 8004b96 <sqrtf+0x32>
|
|
8004b8a: f7ff fb75 bl 8004278 <__errno>
|
|
8004b8e: ee88 0aa8 vdiv.f32 s0, s17, s17
|
|
8004b92: 2321 movs r3, #33 @ 0x21
|
|
8004b94: 6003 str r3, [r0, #0]
|
|
8004b96: ecbd 8b02 vpop {d8}
|
|
8004b9a: bd08 pop {r3, pc}
|
|
8004b9c: 00000000 .word 0x00000000
|
|
|
|
08004ba0 <cosf>:
|
|
8004ba0: ee10 3a10 vmov r3, s0
|
|
8004ba4: b507 push {r0, r1, r2, lr}
|
|
8004ba6: 4a1e ldr r2, [pc, #120] @ (8004c20 <cosf+0x80>)
|
|
8004ba8: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000
|
|
8004bac: 4293 cmp r3, r2
|
|
8004bae: d806 bhi.n 8004bbe <cosf+0x1e>
|
|
8004bb0: eddf 0a1c vldr s1, [pc, #112] @ 8004c24 <cosf+0x84>
|
|
8004bb4: b003 add sp, #12
|
|
8004bb6: f85d eb04 ldr.w lr, [sp], #4
|
|
8004bba: f000 b87f b.w 8004cbc <__kernel_cosf>
|
|
8004bbe: f1b3 4fff cmp.w r3, #2139095040 @ 0x7f800000
|
|
8004bc2: d304 bcc.n 8004bce <cosf+0x2e>
|
|
8004bc4: ee30 0a40 vsub.f32 s0, s0, s0
|
|
8004bc8: b003 add sp, #12
|
|
8004bca: f85d fb04 ldr.w pc, [sp], #4
|
|
8004bce: 4668 mov r0, sp
|
|
8004bd0: f000 f914 bl 8004dfc <__ieee754_rem_pio2f>
|
|
8004bd4: f000 0003 and.w r0, r0, #3
|
|
8004bd8: 2801 cmp r0, #1
|
|
8004bda: d009 beq.n 8004bf0 <cosf+0x50>
|
|
8004bdc: 2802 cmp r0, #2
|
|
8004bde: d010 beq.n 8004c02 <cosf+0x62>
|
|
8004be0: b9b0 cbnz r0, 8004c10 <cosf+0x70>
|
|
8004be2: eddd 0a01 vldr s1, [sp, #4]
|
|
8004be6: ed9d 0a00 vldr s0, [sp]
|
|
8004bea: f000 f867 bl 8004cbc <__kernel_cosf>
|
|
8004bee: e7eb b.n 8004bc8 <cosf+0x28>
|
|
8004bf0: eddd 0a01 vldr s1, [sp, #4]
|
|
8004bf4: ed9d 0a00 vldr s0, [sp]
|
|
8004bf8: f000 f8b8 bl 8004d6c <__kernel_sinf>
|
|
8004bfc: eeb1 0a40 vneg.f32 s0, s0
|
|
8004c00: e7e2 b.n 8004bc8 <cosf+0x28>
|
|
8004c02: eddd 0a01 vldr s1, [sp, #4]
|
|
8004c06: ed9d 0a00 vldr s0, [sp]
|
|
8004c0a: f000 f857 bl 8004cbc <__kernel_cosf>
|
|
8004c0e: e7f5 b.n 8004bfc <cosf+0x5c>
|
|
8004c10: eddd 0a01 vldr s1, [sp, #4]
|
|
8004c14: ed9d 0a00 vldr s0, [sp]
|
|
8004c18: 2001 movs r0, #1
|
|
8004c1a: f000 f8a7 bl 8004d6c <__kernel_sinf>
|
|
8004c1e: e7d3 b.n 8004bc8 <cosf+0x28>
|
|
8004c20: 3f490fd8 .word 0x3f490fd8
|
|
8004c24: 00000000 .word 0x00000000
|
|
|
|
08004c28 <sinf>:
|
|
8004c28: ee10 3a10 vmov r3, s0
|
|
8004c2c: b507 push {r0, r1, r2, lr}
|
|
8004c2e: 4a1f ldr r2, [pc, #124] @ (8004cac <sinf+0x84>)
|
|
8004c30: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000
|
|
8004c34: 4293 cmp r3, r2
|
|
8004c36: d807 bhi.n 8004c48 <sinf+0x20>
|
|
8004c38: eddf 0a1d vldr s1, [pc, #116] @ 8004cb0 <sinf+0x88>
|
|
8004c3c: 2000 movs r0, #0
|
|
8004c3e: b003 add sp, #12
|
|
8004c40: f85d eb04 ldr.w lr, [sp], #4
|
|
8004c44: f000 b892 b.w 8004d6c <__kernel_sinf>
|
|
8004c48: f1b3 4fff cmp.w r3, #2139095040 @ 0x7f800000
|
|
8004c4c: d304 bcc.n 8004c58 <sinf+0x30>
|
|
8004c4e: ee30 0a40 vsub.f32 s0, s0, s0
|
|
8004c52: b003 add sp, #12
|
|
8004c54: f85d fb04 ldr.w pc, [sp], #4
|
|
8004c58: 4668 mov r0, sp
|
|
8004c5a: f000 f8cf bl 8004dfc <__ieee754_rem_pio2f>
|
|
8004c5e: f000 0003 and.w r0, r0, #3
|
|
8004c62: 2801 cmp r0, #1
|
|
8004c64: d00a beq.n 8004c7c <sinf+0x54>
|
|
8004c66: 2802 cmp r0, #2
|
|
8004c68: d00f beq.n 8004c8a <sinf+0x62>
|
|
8004c6a: b9c0 cbnz r0, 8004c9e <sinf+0x76>
|
|
8004c6c: eddd 0a01 vldr s1, [sp, #4]
|
|
8004c70: ed9d 0a00 vldr s0, [sp]
|
|
8004c74: 2001 movs r0, #1
|
|
8004c76: f000 f879 bl 8004d6c <__kernel_sinf>
|
|
8004c7a: e7ea b.n 8004c52 <sinf+0x2a>
|
|
8004c7c: eddd 0a01 vldr s1, [sp, #4]
|
|
8004c80: ed9d 0a00 vldr s0, [sp]
|
|
8004c84: f000 f81a bl 8004cbc <__kernel_cosf>
|
|
8004c88: e7e3 b.n 8004c52 <sinf+0x2a>
|
|
8004c8a: eddd 0a01 vldr s1, [sp, #4]
|
|
8004c8e: ed9d 0a00 vldr s0, [sp]
|
|
8004c92: 2001 movs r0, #1
|
|
8004c94: f000 f86a bl 8004d6c <__kernel_sinf>
|
|
8004c98: eeb1 0a40 vneg.f32 s0, s0
|
|
8004c9c: e7d9 b.n 8004c52 <sinf+0x2a>
|
|
8004c9e: eddd 0a01 vldr s1, [sp, #4]
|
|
8004ca2: ed9d 0a00 vldr s0, [sp]
|
|
8004ca6: f000 f809 bl 8004cbc <__kernel_cosf>
|
|
8004caa: e7f5 b.n 8004c98 <sinf+0x70>
|
|
8004cac: 3f490fd8 .word 0x3f490fd8
|
|
8004cb0: 00000000 .word 0x00000000
|
|
|
|
08004cb4 <__ieee754_sqrtf>:
|
|
8004cb4: eeb1 0ac0 vsqrt.f32 s0, s0
|
|
8004cb8: 4770 bx lr
|
|
...
|
|
|
|
08004cbc <__kernel_cosf>:
|
|
8004cbc: ee10 3a10 vmov r3, s0
|
|
8004cc0: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000
|
|
8004cc4: f1b3 5f48 cmp.w r3, #838860800 @ 0x32000000
|
|
8004cc8: eef0 6a40 vmov.f32 s13, s0
|
|
8004ccc: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0
|
|
8004cd0: d204 bcs.n 8004cdc <__kernel_cosf+0x20>
|
|
8004cd2: eefd 7ae6 vcvt.s32.f32 s15, s13
|
|
8004cd6: ee17 2a90 vmov r2, s15
|
|
8004cda: b342 cbz r2, 8004d2e <__kernel_cosf+0x72>
|
|
8004cdc: ee26 7aa6 vmul.f32 s14, s13, s13
|
|
8004ce0: eddf 7a1a vldr s15, [pc, #104] @ 8004d4c <__kernel_cosf+0x90>
|
|
8004ce4: ed9f 6a1a vldr s12, [pc, #104] @ 8004d50 <__kernel_cosf+0x94>
|
|
8004ce8: 4a1a ldr r2, [pc, #104] @ (8004d54 <__kernel_cosf+0x98>)
|
|
8004cea: eea7 6a27 vfma.f32 s12, s14, s15
|
|
8004cee: 4293 cmp r3, r2
|
|
8004cf0: eddf 7a19 vldr s15, [pc, #100] @ 8004d58 <__kernel_cosf+0x9c>
|
|
8004cf4: eee6 7a07 vfma.f32 s15, s12, s14
|
|
8004cf8: ed9f 6a18 vldr s12, [pc, #96] @ 8004d5c <__kernel_cosf+0xa0>
|
|
8004cfc: eea7 6a87 vfma.f32 s12, s15, s14
|
|
8004d00: eddf 7a17 vldr s15, [pc, #92] @ 8004d60 <__kernel_cosf+0xa4>
|
|
8004d04: eee6 7a07 vfma.f32 s15, s12, s14
|
|
8004d08: ed9f 6a16 vldr s12, [pc, #88] @ 8004d64 <__kernel_cosf+0xa8>
|
|
8004d0c: eea7 6a87 vfma.f32 s12, s15, s14
|
|
8004d10: ee60 0ae6 vnmul.f32 s1, s1, s13
|
|
8004d14: ee26 6a07 vmul.f32 s12, s12, s14
|
|
8004d18: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5
|
|
8004d1c: eee7 0a06 vfma.f32 s1, s14, s12
|
|
8004d20: ee67 7a27 vmul.f32 s15, s14, s15
|
|
8004d24: d804 bhi.n 8004d30 <__kernel_cosf+0x74>
|
|
8004d26: ee77 7ae0 vsub.f32 s15, s15, s1
|
|
8004d2a: ee30 0a67 vsub.f32 s0, s0, s15
|
|
8004d2e: 4770 bx lr
|
|
8004d30: 4a0d ldr r2, [pc, #52] @ (8004d68 <__kernel_cosf+0xac>)
|
|
8004d32: 4293 cmp r3, r2
|
|
8004d34: bf9a itte ls
|
|
8004d36: f103 437f addls.w r3, r3, #4278190080 @ 0xff000000
|
|
8004d3a: ee07 3a10 vmovls s14, r3
|
|
8004d3e: eeb5 7a02 vmovhi.f32 s14, #82 @ 0x3e900000 0.2812500
|
|
8004d42: ee30 0a47 vsub.f32 s0, s0, s14
|
|
8004d46: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8004d4a: e7ec b.n 8004d26 <__kernel_cosf+0x6a>
|
|
8004d4c: ad47d74e .word 0xad47d74e
|
|
8004d50: 310f74f6 .word 0x310f74f6
|
|
8004d54: 3e999999 .word 0x3e999999
|
|
8004d58: b493f27c .word 0xb493f27c
|
|
8004d5c: 37d00d01 .word 0x37d00d01
|
|
8004d60: bab60b61 .word 0xbab60b61
|
|
8004d64: 3d2aaaab .word 0x3d2aaaab
|
|
8004d68: 3f480000 .word 0x3f480000
|
|
|
|
08004d6c <__kernel_sinf>:
|
|
8004d6c: ee10 3a10 vmov r3, s0
|
|
8004d70: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000
|
|
8004d74: f1b3 5f48 cmp.w r3, #838860800 @ 0x32000000
|
|
8004d78: d204 bcs.n 8004d84 <__kernel_sinf+0x18>
|
|
8004d7a: eefd 7ac0 vcvt.s32.f32 s15, s0
|
|
8004d7e: ee17 3a90 vmov r3, s15
|
|
8004d82: b35b cbz r3, 8004ddc <__kernel_sinf+0x70>
|
|
8004d84: ee20 7a00 vmul.f32 s14, s0, s0
|
|
8004d88: eddf 7a15 vldr s15, [pc, #84] @ 8004de0 <__kernel_sinf+0x74>
|
|
8004d8c: ed9f 6a15 vldr s12, [pc, #84] @ 8004de4 <__kernel_sinf+0x78>
|
|
8004d90: eea7 6a27 vfma.f32 s12, s14, s15
|
|
8004d94: eddf 7a14 vldr s15, [pc, #80] @ 8004de8 <__kernel_sinf+0x7c>
|
|
8004d98: eee6 7a07 vfma.f32 s15, s12, s14
|
|
8004d9c: ed9f 6a13 vldr s12, [pc, #76] @ 8004dec <__kernel_sinf+0x80>
|
|
8004da0: eea7 6a87 vfma.f32 s12, s15, s14
|
|
8004da4: eddf 7a12 vldr s15, [pc, #72] @ 8004df0 <__kernel_sinf+0x84>
|
|
8004da8: ee60 6a07 vmul.f32 s13, s0, s14
|
|
8004dac: eee6 7a07 vfma.f32 s15, s12, s14
|
|
8004db0: b930 cbnz r0, 8004dc0 <__kernel_sinf+0x54>
|
|
8004db2: ed9f 6a10 vldr s12, [pc, #64] @ 8004df4 <__kernel_sinf+0x88>
|
|
8004db6: eea7 6a27 vfma.f32 s12, s14, s15
|
|
8004dba: eea6 0a26 vfma.f32 s0, s12, s13
|
|
8004dbe: 4770 bx lr
|
|
8004dc0: ee67 7ae6 vnmul.f32 s15, s15, s13
|
|
8004dc4: eeb6 6a00 vmov.f32 s12, #96 @ 0x3f000000 0.5
|
|
8004dc8: eee0 7a86 vfma.f32 s15, s1, s12
|
|
8004dcc: eed7 0a87 vfnms.f32 s1, s15, s14
|
|
8004dd0: eddf 7a09 vldr s15, [pc, #36] @ 8004df8 <__kernel_sinf+0x8c>
|
|
8004dd4: eee6 0aa7 vfma.f32 s1, s13, s15
|
|
8004dd8: ee30 0a60 vsub.f32 s0, s0, s1
|
|
8004ddc: 4770 bx lr
|
|
8004dde: bf00 nop
|
|
8004de0: 2f2ec9d3 .word 0x2f2ec9d3
|
|
8004de4: b2d72f34 .word 0xb2d72f34
|
|
8004de8: 3638ef1b .word 0x3638ef1b
|
|
8004dec: b9500d01 .word 0xb9500d01
|
|
8004df0: 3c088889 .word 0x3c088889
|
|
8004df4: be2aaaab .word 0xbe2aaaab
|
|
8004df8: 3e2aaaab .word 0x3e2aaaab
|
|
|
|
08004dfc <__ieee754_rem_pio2f>:
|
|
8004dfc: b5f0 push {r4, r5, r6, r7, lr}
|
|
8004dfe: ee10 6a10 vmov r6, s0
|
|
8004e02: 4b88 ldr r3, [pc, #544] @ (8005024 <__ieee754_rem_pio2f+0x228>)
|
|
8004e04: f026 4500 bic.w r5, r6, #2147483648 @ 0x80000000
|
|
8004e08: 429d cmp r5, r3
|
|
8004e0a: b087 sub sp, #28
|
|
8004e0c: 4604 mov r4, r0
|
|
8004e0e: d805 bhi.n 8004e1c <__ieee754_rem_pio2f+0x20>
|
|
8004e10: 2300 movs r3, #0
|
|
8004e12: ed80 0a00 vstr s0, [r0]
|
|
8004e16: 6043 str r3, [r0, #4]
|
|
8004e18: 2000 movs r0, #0
|
|
8004e1a: e022 b.n 8004e62 <__ieee754_rem_pio2f+0x66>
|
|
8004e1c: 4b82 ldr r3, [pc, #520] @ (8005028 <__ieee754_rem_pio2f+0x22c>)
|
|
8004e1e: 429d cmp r5, r3
|
|
8004e20: d83a bhi.n 8004e98 <__ieee754_rem_pio2f+0x9c>
|
|
8004e22: f026 4300 bic.w r3, r6, #2147483648 @ 0x80000000
|
|
8004e26: 2e00 cmp r6, #0
|
|
8004e28: ed9f 7a80 vldr s14, [pc, #512] @ 800502c <__ieee754_rem_pio2f+0x230>
|
|
8004e2c: 4a80 ldr r2, [pc, #512] @ (8005030 <__ieee754_rem_pio2f+0x234>)
|
|
8004e2e: f023 030f bic.w r3, r3, #15
|
|
8004e32: dd18 ble.n 8004e66 <__ieee754_rem_pio2f+0x6a>
|
|
8004e34: 4293 cmp r3, r2
|
|
8004e36: ee70 7a47 vsub.f32 s15, s0, s14
|
|
8004e3a: bf09 itett eq
|
|
8004e3c: ed9f 7a7d vldreq s14, [pc, #500] @ 8005034 <__ieee754_rem_pio2f+0x238>
|
|
8004e40: eddf 6a7d vldrne s13, [pc, #500] @ 8005038 <__ieee754_rem_pio2f+0x23c>
|
|
8004e44: eddf 6a7d vldreq s13, [pc, #500] @ 800503c <__ieee754_rem_pio2f+0x240>
|
|
8004e48: ee77 7ac7 vsubeq.f32 s15, s15, s14
|
|
8004e4c: ee37 7ae6 vsub.f32 s14, s15, s13
|
|
8004e50: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8004e54: ed80 7a00 vstr s14, [r0]
|
|
8004e58: ee77 7ae6 vsub.f32 s15, s15, s13
|
|
8004e5c: edc0 7a01 vstr s15, [r0, #4]
|
|
8004e60: 2001 movs r0, #1
|
|
8004e62: b007 add sp, #28
|
|
8004e64: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8004e66: 4293 cmp r3, r2
|
|
8004e68: ee70 7a07 vadd.f32 s15, s0, s14
|
|
8004e6c: bf09 itett eq
|
|
8004e6e: ed9f 7a71 vldreq s14, [pc, #452] @ 8005034 <__ieee754_rem_pio2f+0x238>
|
|
8004e72: eddf 6a71 vldrne s13, [pc, #452] @ 8005038 <__ieee754_rem_pio2f+0x23c>
|
|
8004e76: eddf 6a71 vldreq s13, [pc, #452] @ 800503c <__ieee754_rem_pio2f+0x240>
|
|
8004e7a: ee77 7a87 vaddeq.f32 s15, s15, s14
|
|
8004e7e: ee37 7aa6 vadd.f32 s14, s15, s13
|
|
8004e82: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8004e86: ed80 7a00 vstr s14, [r0]
|
|
8004e8a: ee77 7aa6 vadd.f32 s15, s15, s13
|
|
8004e8e: edc0 7a01 vstr s15, [r0, #4]
|
|
8004e92: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8004e96: e7e4 b.n 8004e62 <__ieee754_rem_pio2f+0x66>
|
|
8004e98: 4b69 ldr r3, [pc, #420] @ (8005040 <__ieee754_rem_pio2f+0x244>)
|
|
8004e9a: 429d cmp r5, r3
|
|
8004e9c: d873 bhi.n 8004f86 <__ieee754_rem_pio2f+0x18a>
|
|
8004e9e: f000 f8dd bl 800505c <fabsf>
|
|
8004ea2: ed9f 7a68 vldr s14, [pc, #416] @ 8005044 <__ieee754_rem_pio2f+0x248>
|
|
8004ea6: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5
|
|
8004eaa: eee0 7a07 vfma.f32 s15, s0, s14
|
|
8004eae: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
8004eb2: eeb8 7ae7 vcvt.f32.s32 s14, s15
|
|
8004eb6: ee17 0a90 vmov r0, s15
|
|
8004eba: eddf 7a5c vldr s15, [pc, #368] @ 800502c <__ieee754_rem_pio2f+0x230>
|
|
8004ebe: eea7 0a67 vfms.f32 s0, s14, s15
|
|
8004ec2: 281f cmp r0, #31
|
|
8004ec4: eddf 7a5c vldr s15, [pc, #368] @ 8005038 <__ieee754_rem_pio2f+0x23c>
|
|
8004ec8: ee67 7a27 vmul.f32 s15, s14, s15
|
|
8004ecc: eeb1 6a47 vneg.f32 s12, s14
|
|
8004ed0: ee70 6a67 vsub.f32 s13, s0, s15
|
|
8004ed4: ee16 1a90 vmov r1, s13
|
|
8004ed8: dc09 bgt.n 8004eee <__ieee754_rem_pio2f+0xf2>
|
|
8004eda: 4a5b ldr r2, [pc, #364] @ (8005048 <__ieee754_rem_pio2f+0x24c>)
|
|
8004edc: 1e47 subs r7, r0, #1
|
|
8004ede: f026 4300 bic.w r3, r6, #2147483648 @ 0x80000000
|
|
8004ee2: f852 2027 ldr.w r2, [r2, r7, lsl #2]
|
|
8004ee6: f023 03ff bic.w r3, r3, #255 @ 0xff
|
|
8004eea: 4293 cmp r3, r2
|
|
8004eec: d107 bne.n 8004efe <__ieee754_rem_pio2f+0x102>
|
|
8004eee: f3c1 52c7 ubfx r2, r1, #23, #8
|
|
8004ef2: ebc2 52d5 rsb r2, r2, r5, lsr #23
|
|
8004ef6: 2a08 cmp r2, #8
|
|
8004ef8: ea4f 53e5 mov.w r3, r5, asr #23
|
|
8004efc: dc14 bgt.n 8004f28 <__ieee754_rem_pio2f+0x12c>
|
|
8004efe: 6021 str r1, [r4, #0]
|
|
8004f00: ed94 7a00 vldr s14, [r4]
|
|
8004f04: ee30 0a47 vsub.f32 s0, s0, s14
|
|
8004f08: 2e00 cmp r6, #0
|
|
8004f0a: ee30 0a67 vsub.f32 s0, s0, s15
|
|
8004f0e: ed84 0a01 vstr s0, [r4, #4]
|
|
8004f12: daa6 bge.n 8004e62 <__ieee754_rem_pio2f+0x66>
|
|
8004f14: eeb1 7a47 vneg.f32 s14, s14
|
|
8004f18: eeb1 0a40 vneg.f32 s0, s0
|
|
8004f1c: ed84 7a00 vstr s14, [r4]
|
|
8004f20: ed84 0a01 vstr s0, [r4, #4]
|
|
8004f24: 4240 negs r0, r0
|
|
8004f26: e79c b.n 8004e62 <__ieee754_rem_pio2f+0x66>
|
|
8004f28: eddf 5a42 vldr s11, [pc, #264] @ 8005034 <__ieee754_rem_pio2f+0x238>
|
|
8004f2c: eef0 6a40 vmov.f32 s13, s0
|
|
8004f30: eee6 6a25 vfma.f32 s13, s12, s11
|
|
8004f34: ee70 7a66 vsub.f32 s15, s0, s13
|
|
8004f38: eee6 7a25 vfma.f32 s15, s12, s11
|
|
8004f3c: eddf 5a3f vldr s11, [pc, #252] @ 800503c <__ieee754_rem_pio2f+0x240>
|
|
8004f40: eed7 7a25 vfnms.f32 s15, s14, s11
|
|
8004f44: ee76 5ae7 vsub.f32 s11, s13, s15
|
|
8004f48: ee15 2a90 vmov r2, s11
|
|
8004f4c: f3c2 51c7 ubfx r1, r2, #23, #8
|
|
8004f50: 1a5b subs r3, r3, r1
|
|
8004f52: 2b19 cmp r3, #25
|
|
8004f54: dc04 bgt.n 8004f60 <__ieee754_rem_pio2f+0x164>
|
|
8004f56: edc4 5a00 vstr s11, [r4]
|
|
8004f5a: eeb0 0a66 vmov.f32 s0, s13
|
|
8004f5e: e7cf b.n 8004f00 <__ieee754_rem_pio2f+0x104>
|
|
8004f60: eddf 5a3a vldr s11, [pc, #232] @ 800504c <__ieee754_rem_pio2f+0x250>
|
|
8004f64: eeb0 0a66 vmov.f32 s0, s13
|
|
8004f68: eea6 0a25 vfma.f32 s0, s12, s11
|
|
8004f6c: ee76 7ac0 vsub.f32 s15, s13, s0
|
|
8004f70: eddf 6a37 vldr s13, [pc, #220] @ 8005050 <__ieee754_rem_pio2f+0x254>
|
|
8004f74: eee6 7a25 vfma.f32 s15, s12, s11
|
|
8004f78: eed7 7a26 vfnms.f32 s15, s14, s13
|
|
8004f7c: ee30 7a67 vsub.f32 s14, s0, s15
|
|
8004f80: ed84 7a00 vstr s14, [r4]
|
|
8004f84: e7bc b.n 8004f00 <__ieee754_rem_pio2f+0x104>
|
|
8004f86: f1b5 4fff cmp.w r5, #2139095040 @ 0x7f800000
|
|
8004f8a: d306 bcc.n 8004f9a <__ieee754_rem_pio2f+0x19e>
|
|
8004f8c: ee70 7a40 vsub.f32 s15, s0, s0
|
|
8004f90: edc0 7a01 vstr s15, [r0, #4]
|
|
8004f94: edc0 7a00 vstr s15, [r0]
|
|
8004f98: e73e b.n 8004e18 <__ieee754_rem_pio2f+0x1c>
|
|
8004f9a: 15ea asrs r2, r5, #23
|
|
8004f9c: 3a86 subs r2, #134 @ 0x86
|
|
8004f9e: eba5 53c2 sub.w r3, r5, r2, lsl #23
|
|
8004fa2: ee07 3a90 vmov s15, r3
|
|
8004fa6: eebd 7ae7 vcvt.s32.f32 s14, s15
|
|
8004faa: eddf 6a2a vldr s13, [pc, #168] @ 8005054 <__ieee754_rem_pio2f+0x258>
|
|
8004fae: eeb8 7ac7 vcvt.f32.s32 s14, s14
|
|
8004fb2: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8004fb6: ed8d 7a03 vstr s14, [sp, #12]
|
|
8004fba: ee67 7aa6 vmul.f32 s15, s15, s13
|
|
8004fbe: eebd 7ae7 vcvt.s32.f32 s14, s15
|
|
8004fc2: eeb8 7ac7 vcvt.f32.s32 s14, s14
|
|
8004fc6: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8004fca: ed8d 7a04 vstr s14, [sp, #16]
|
|
8004fce: ee67 7aa6 vmul.f32 s15, s15, s13
|
|
8004fd2: eef5 7a40 vcmp.f32 s15, #0.0
|
|
8004fd6: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8004fda: edcd 7a05 vstr s15, [sp, #20]
|
|
8004fde: d11e bne.n 800501e <__ieee754_rem_pio2f+0x222>
|
|
8004fe0: eeb5 7a40 vcmp.f32 s14, #0.0
|
|
8004fe4: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8004fe8: bf0c ite eq
|
|
8004fea: 2301 moveq r3, #1
|
|
8004fec: 2302 movne r3, #2
|
|
8004fee: 491a ldr r1, [pc, #104] @ (8005058 <__ieee754_rem_pio2f+0x25c>)
|
|
8004ff0: 9101 str r1, [sp, #4]
|
|
8004ff2: 2102 movs r1, #2
|
|
8004ff4: 9100 str r1, [sp, #0]
|
|
8004ff6: a803 add r0, sp, #12
|
|
8004ff8: 4621 mov r1, r4
|
|
8004ffa: f000 f837 bl 800506c <__kernel_rem_pio2f>
|
|
8004ffe: 2e00 cmp r6, #0
|
|
8005000: f6bf af2f bge.w 8004e62 <__ieee754_rem_pio2f+0x66>
|
|
8005004: edd4 7a00 vldr s15, [r4]
|
|
8005008: eef1 7a67 vneg.f32 s15, s15
|
|
800500c: edc4 7a00 vstr s15, [r4]
|
|
8005010: edd4 7a01 vldr s15, [r4, #4]
|
|
8005014: eef1 7a67 vneg.f32 s15, s15
|
|
8005018: edc4 7a01 vstr s15, [r4, #4]
|
|
800501c: e782 b.n 8004f24 <__ieee754_rem_pio2f+0x128>
|
|
800501e: 2303 movs r3, #3
|
|
8005020: e7e5 b.n 8004fee <__ieee754_rem_pio2f+0x1f2>
|
|
8005022: bf00 nop
|
|
8005024: 3f490fd8 .word 0x3f490fd8
|
|
8005028: 4016cbe3 .word 0x4016cbe3
|
|
800502c: 3fc90f80 .word 0x3fc90f80
|
|
8005030: 3fc90fd0 .word 0x3fc90fd0
|
|
8005034: 37354400 .word 0x37354400
|
|
8005038: 37354443 .word 0x37354443
|
|
800503c: 2e85a308 .word 0x2e85a308
|
|
8005040: 43490f80 .word 0x43490f80
|
|
8005044: 3f22f984 .word 0x3f22f984
|
|
8005048: 0800802c .word 0x0800802c
|
|
800504c: 2e85a300 .word 0x2e85a300
|
|
8005050: 248d3132 .word 0x248d3132
|
|
8005054: 43800000 .word 0x43800000
|
|
8005058: 080080ac .word 0x080080ac
|
|
|
|
0800505c <fabsf>:
|
|
800505c: ee10 3a10 vmov r3, s0
|
|
8005060: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000
|
|
8005064: ee00 3a10 vmov s0, r3
|
|
8005068: 4770 bx lr
|
|
...
|
|
|
|
0800506c <__kernel_rem_pio2f>:
|
|
800506c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8005070: ed2d 8b04 vpush {d8-d9}
|
|
8005074: b0d9 sub sp, #356 @ 0x164
|
|
8005076: 4690 mov r8, r2
|
|
8005078: 9001 str r0, [sp, #4]
|
|
800507a: 4ab6 ldr r2, [pc, #728] @ (8005354 <__kernel_rem_pio2f+0x2e8>)
|
|
800507c: 9866 ldr r0, [sp, #408] @ 0x198
|
|
800507e: f118 0f04 cmn.w r8, #4
|
|
8005082: f852 a020 ldr.w sl, [r2, r0, lsl #2]
|
|
8005086: 460f mov r7, r1
|
|
8005088: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff
|
|
800508c: db26 blt.n 80050dc <__kernel_rem_pio2f+0x70>
|
|
800508e: f1b8 0203 subs.w r2, r8, #3
|
|
8005092: bf48 it mi
|
|
8005094: f108 0204 addmi.w r2, r8, #4
|
|
8005098: 10d2 asrs r2, r2, #3
|
|
800509a: 1c55 adds r5, r2, #1
|
|
800509c: 9967 ldr r1, [sp, #412] @ 0x19c
|
|
800509e: ed9f 7ab1 vldr s14, [pc, #708] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
80050a2: 00e8 lsls r0, r5, #3
|
|
80050a4: eba2 060b sub.w r6, r2, fp
|
|
80050a8: 9002 str r0, [sp, #8]
|
|
80050aa: eba8 05c5 sub.w r5, r8, r5, lsl #3
|
|
80050ae: eb0a 0c0b add.w ip, sl, fp
|
|
80050b2: ac1c add r4, sp, #112 @ 0x70
|
|
80050b4: eb01 0e86 add.w lr, r1, r6, lsl #2
|
|
80050b8: 2000 movs r0, #0
|
|
80050ba: 4560 cmp r0, ip
|
|
80050bc: dd10 ble.n 80050e0 <__kernel_rem_pio2f+0x74>
|
|
80050be: a91c add r1, sp, #112 @ 0x70
|
|
80050c0: eb01 0083 add.w r0, r1, r3, lsl #2
|
|
80050c4: f50d 7988 add.w r9, sp, #272 @ 0x110
|
|
80050c8: 2600 movs r6, #0
|
|
80050ca: 4556 cmp r6, sl
|
|
80050cc: dc24 bgt.n 8005118 <__kernel_rem_pio2f+0xac>
|
|
80050ce: f8dd e004 ldr.w lr, [sp, #4]
|
|
80050d2: eddf 7aa4 vldr s15, [pc, #656] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
80050d6: 4684 mov ip, r0
|
|
80050d8: 2400 movs r4, #0
|
|
80050da: e016 b.n 800510a <__kernel_rem_pio2f+0x9e>
|
|
80050dc: 2200 movs r2, #0
|
|
80050de: e7dc b.n 800509a <__kernel_rem_pio2f+0x2e>
|
|
80050e0: 42c6 cmn r6, r0
|
|
80050e2: bf5d ittte pl
|
|
80050e4: f85e 1020 ldrpl.w r1, [lr, r0, lsl #2]
|
|
80050e8: ee07 1a90 vmovpl s15, r1
|
|
80050ec: eef8 7ae7 vcvtpl.f32.s32 s15, s15
|
|
80050f0: eef0 7a47 vmovmi.f32 s15, s14
|
|
80050f4: ece4 7a01 vstmia r4!, {s15}
|
|
80050f8: 3001 adds r0, #1
|
|
80050fa: e7de b.n 80050ba <__kernel_rem_pio2f+0x4e>
|
|
80050fc: ecfe 6a01 vldmia lr!, {s13}
|
|
8005100: ed3c 7a01 vldmdb ip!, {s14}
|
|
8005104: eee6 7a87 vfma.f32 s15, s13, s14
|
|
8005108: 3401 adds r4, #1
|
|
800510a: 455c cmp r4, fp
|
|
800510c: ddf6 ble.n 80050fc <__kernel_rem_pio2f+0x90>
|
|
800510e: ece9 7a01 vstmia r9!, {s15}
|
|
8005112: 3601 adds r6, #1
|
|
8005114: 3004 adds r0, #4
|
|
8005116: e7d8 b.n 80050ca <__kernel_rem_pio2f+0x5e>
|
|
8005118: a908 add r1, sp, #32
|
|
800511a: eb01 018a add.w r1, r1, sl, lsl #2
|
|
800511e: 9104 str r1, [sp, #16]
|
|
8005120: 9967 ldr r1, [sp, #412] @ 0x19c
|
|
8005122: eddf 8a8f vldr s17, [pc, #572] @ 8005360 <__kernel_rem_pio2f+0x2f4>
|
|
8005126: ed9f 9a8d vldr s18, [pc, #564] @ 800535c <__kernel_rem_pio2f+0x2f0>
|
|
800512a: eb01 0282 add.w r2, r1, r2, lsl #2
|
|
800512e: 9203 str r2, [sp, #12]
|
|
8005130: 4654 mov r4, sl
|
|
8005132: 00a2 lsls r2, r4, #2
|
|
8005134: 9205 str r2, [sp, #20]
|
|
8005136: aa58 add r2, sp, #352 @ 0x160
|
|
8005138: eb02 0284 add.w r2, r2, r4, lsl #2
|
|
800513c: ed12 0a14 vldr s0, [r2, #-80] @ 0xffffffb0
|
|
8005140: a944 add r1, sp, #272 @ 0x110
|
|
8005142: aa08 add r2, sp, #32
|
|
8005144: eb01 0084 add.w r0, r1, r4, lsl #2
|
|
8005148: 4694 mov ip, r2
|
|
800514a: 4626 mov r6, r4
|
|
800514c: 2e00 cmp r6, #0
|
|
800514e: dc4c bgt.n 80051ea <__kernel_rem_pio2f+0x17e>
|
|
8005150: 4628 mov r0, r5
|
|
8005152: e9cd 2306 strd r2, r3, [sp, #24]
|
|
8005156: f000 f9f1 bl 800553c <scalbnf>
|
|
800515a: eeb0 8a40 vmov.f32 s16, s0
|
|
800515e: eeb4 0a00 vmov.f32 s0, #64 @ 0x3e000000 0.125
|
|
8005162: ee28 0a00 vmul.f32 s0, s16, s0
|
|
8005166: f000 fa4f bl 8005608 <floorf>
|
|
800516a: eef2 7a00 vmov.f32 s15, #32 @ 0x41000000 8.0
|
|
800516e: eea0 8a67 vfms.f32 s16, s0, s15
|
|
8005172: 2d00 cmp r5, #0
|
|
8005174: e9dd 2306 ldrd r2, r3, [sp, #24]
|
|
8005178: eefd 7ac8 vcvt.s32.f32 s15, s16
|
|
800517c: ee17 9a90 vmov r9, s15
|
|
8005180: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
8005184: ee38 8a67 vsub.f32 s16, s16, s15
|
|
8005188: dd41 ble.n 800520e <__kernel_rem_pio2f+0x1a2>
|
|
800518a: f104 3cff add.w ip, r4, #4294967295 @ 0xffffffff
|
|
800518e: a908 add r1, sp, #32
|
|
8005190: f1c5 0e08 rsb lr, r5, #8
|
|
8005194: f851 602c ldr.w r6, [r1, ip, lsl #2]
|
|
8005198: fa46 f00e asr.w r0, r6, lr
|
|
800519c: 4481 add r9, r0
|
|
800519e: fa00 f00e lsl.w r0, r0, lr
|
|
80051a2: 1a36 subs r6, r6, r0
|
|
80051a4: f1c5 0007 rsb r0, r5, #7
|
|
80051a8: f841 602c str.w r6, [r1, ip, lsl #2]
|
|
80051ac: 4106 asrs r6, r0
|
|
80051ae: 2e00 cmp r6, #0
|
|
80051b0: dd3c ble.n 800522c <__kernel_rem_pio2f+0x1c0>
|
|
80051b2: f04f 0e00 mov.w lr, #0
|
|
80051b6: f109 0901 add.w r9, r9, #1
|
|
80051ba: 4670 mov r0, lr
|
|
80051bc: 4574 cmp r4, lr
|
|
80051be: dc68 bgt.n 8005292 <__kernel_rem_pio2f+0x226>
|
|
80051c0: 2d00 cmp r5, #0
|
|
80051c2: dd03 ble.n 80051cc <__kernel_rem_pio2f+0x160>
|
|
80051c4: 2d01 cmp r5, #1
|
|
80051c6: d074 beq.n 80052b2 <__kernel_rem_pio2f+0x246>
|
|
80051c8: 2d02 cmp r5, #2
|
|
80051ca: d07d beq.n 80052c8 <__kernel_rem_pio2f+0x25c>
|
|
80051cc: 2e02 cmp r6, #2
|
|
80051ce: d12d bne.n 800522c <__kernel_rem_pio2f+0x1c0>
|
|
80051d0: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0
|
|
80051d4: ee30 8a48 vsub.f32 s16, s0, s16
|
|
80051d8: b340 cbz r0, 800522c <__kernel_rem_pio2f+0x1c0>
|
|
80051da: 4628 mov r0, r5
|
|
80051dc: 9306 str r3, [sp, #24]
|
|
80051de: f000 f9ad bl 800553c <scalbnf>
|
|
80051e2: 9b06 ldr r3, [sp, #24]
|
|
80051e4: ee38 8a40 vsub.f32 s16, s16, s0
|
|
80051e8: e020 b.n 800522c <__kernel_rem_pio2f+0x1c0>
|
|
80051ea: ee60 7a28 vmul.f32 s15, s0, s17
|
|
80051ee: 3e01 subs r6, #1
|
|
80051f0: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80051f4: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
80051f8: eea7 0ac9 vfms.f32 s0, s15, s18
|
|
80051fc: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
8005200: ecac 0a01 vstmia ip!, {s0}
|
|
8005204: ed30 0a01 vldmdb r0!, {s0}
|
|
8005208: ee37 0a80 vadd.f32 s0, s15, s0
|
|
800520c: e79e b.n 800514c <__kernel_rem_pio2f+0xe0>
|
|
800520e: d105 bne.n 800521c <__kernel_rem_pio2f+0x1b0>
|
|
8005210: 1e60 subs r0, r4, #1
|
|
8005212: a908 add r1, sp, #32
|
|
8005214: f851 6020 ldr.w r6, [r1, r0, lsl #2]
|
|
8005218: 11f6 asrs r6, r6, #7
|
|
800521a: e7c8 b.n 80051ae <__kernel_rem_pio2f+0x142>
|
|
800521c: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5
|
|
8005220: eeb4 8ae7 vcmpe.f32 s16, s15
|
|
8005224: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8005228: da31 bge.n 800528e <__kernel_rem_pio2f+0x222>
|
|
800522a: 2600 movs r6, #0
|
|
800522c: eeb5 8a40 vcmp.f32 s16, #0.0
|
|
8005230: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8005234: f040 8098 bne.w 8005368 <__kernel_rem_pio2f+0x2fc>
|
|
8005238: 1e60 subs r0, r4, #1
|
|
800523a: 2200 movs r2, #0
|
|
800523c: 4550 cmp r0, sl
|
|
800523e: da4b bge.n 80052d8 <__kernel_rem_pio2f+0x26c>
|
|
8005240: 2a00 cmp r2, #0
|
|
8005242: d065 beq.n 8005310 <__kernel_rem_pio2f+0x2a4>
|
|
8005244: 3c01 subs r4, #1
|
|
8005246: ab08 add r3, sp, #32
|
|
8005248: 3d08 subs r5, #8
|
|
800524a: f853 3024 ldr.w r3, [r3, r4, lsl #2]
|
|
800524e: 2b00 cmp r3, #0
|
|
8005250: d0f8 beq.n 8005244 <__kernel_rem_pio2f+0x1d8>
|
|
8005252: 4628 mov r0, r5
|
|
8005254: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0
|
|
8005258: f000 f970 bl 800553c <scalbnf>
|
|
800525c: 1c63 adds r3, r4, #1
|
|
800525e: aa44 add r2, sp, #272 @ 0x110
|
|
8005260: ed9f 7a3f vldr s14, [pc, #252] @ 8005360 <__kernel_rem_pio2f+0x2f4>
|
|
8005264: 0099 lsls r1, r3, #2
|
|
8005266: eb02 0283 add.w r2, r2, r3, lsl #2
|
|
800526a: 4623 mov r3, r4
|
|
800526c: 2b00 cmp r3, #0
|
|
800526e: f280 80a9 bge.w 80053c4 <__kernel_rem_pio2f+0x358>
|
|
8005272: 4623 mov r3, r4
|
|
8005274: 2b00 cmp r3, #0
|
|
8005276: f2c0 80c7 blt.w 8005408 <__kernel_rem_pio2f+0x39c>
|
|
800527a: aa44 add r2, sp, #272 @ 0x110
|
|
800527c: eb02 0583 add.w r5, r2, r3, lsl #2
|
|
8005280: f8df c0d4 ldr.w ip, [pc, #212] @ 8005358 <__kernel_rem_pio2f+0x2ec>
|
|
8005284: eddf 7a37 vldr s15, [pc, #220] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
8005288: 2000 movs r0, #0
|
|
800528a: 1ae2 subs r2, r4, r3
|
|
800528c: e0b1 b.n 80053f2 <__kernel_rem_pio2f+0x386>
|
|
800528e: 2602 movs r6, #2
|
|
8005290: e78f b.n 80051b2 <__kernel_rem_pio2f+0x146>
|
|
8005292: f852 1b04 ldr.w r1, [r2], #4
|
|
8005296: b948 cbnz r0, 80052ac <__kernel_rem_pio2f+0x240>
|
|
8005298: b121 cbz r1, 80052a4 <__kernel_rem_pio2f+0x238>
|
|
800529a: f5c1 7180 rsb r1, r1, #256 @ 0x100
|
|
800529e: f842 1c04 str.w r1, [r2, #-4]
|
|
80052a2: 2101 movs r1, #1
|
|
80052a4: f10e 0e01 add.w lr, lr, #1
|
|
80052a8: 4608 mov r0, r1
|
|
80052aa: e787 b.n 80051bc <__kernel_rem_pio2f+0x150>
|
|
80052ac: f1c1 01ff rsb r1, r1, #255 @ 0xff
|
|
80052b0: e7f5 b.n 800529e <__kernel_rem_pio2f+0x232>
|
|
80052b2: f104 3cff add.w ip, r4, #4294967295 @ 0xffffffff
|
|
80052b6: aa08 add r2, sp, #32
|
|
80052b8: f852 202c ldr.w r2, [r2, ip, lsl #2]
|
|
80052bc: f002 027f and.w r2, r2, #127 @ 0x7f
|
|
80052c0: a908 add r1, sp, #32
|
|
80052c2: f841 202c str.w r2, [r1, ip, lsl #2]
|
|
80052c6: e781 b.n 80051cc <__kernel_rem_pio2f+0x160>
|
|
80052c8: f104 3cff add.w ip, r4, #4294967295 @ 0xffffffff
|
|
80052cc: aa08 add r2, sp, #32
|
|
80052ce: f852 202c ldr.w r2, [r2, ip, lsl #2]
|
|
80052d2: f002 023f and.w r2, r2, #63 @ 0x3f
|
|
80052d6: e7f3 b.n 80052c0 <__kernel_rem_pio2f+0x254>
|
|
80052d8: a908 add r1, sp, #32
|
|
80052da: f851 1020 ldr.w r1, [r1, r0, lsl #2]
|
|
80052de: 3801 subs r0, #1
|
|
80052e0: 430a orrs r2, r1
|
|
80052e2: e7ab b.n 800523c <__kernel_rem_pio2f+0x1d0>
|
|
80052e4: 3201 adds r2, #1
|
|
80052e6: f850 6d04 ldr.w r6, [r0, #-4]!
|
|
80052ea: 2e00 cmp r6, #0
|
|
80052ec: d0fa beq.n 80052e4 <__kernel_rem_pio2f+0x278>
|
|
80052ee: 9905 ldr r1, [sp, #20]
|
|
80052f0: f501 71b0 add.w r1, r1, #352 @ 0x160
|
|
80052f4: eb0d 0001 add.w r0, sp, r1
|
|
80052f8: 18e6 adds r6, r4, r3
|
|
80052fa: a91c add r1, sp, #112 @ 0x70
|
|
80052fc: f104 0c01 add.w ip, r4, #1
|
|
8005300: 384c subs r0, #76 @ 0x4c
|
|
8005302: eb01 0686 add.w r6, r1, r6, lsl #2
|
|
8005306: 4422 add r2, r4
|
|
8005308: 4562 cmp r2, ip
|
|
800530a: da04 bge.n 8005316 <__kernel_rem_pio2f+0x2aa>
|
|
800530c: 4614 mov r4, r2
|
|
800530e: e710 b.n 8005132 <__kernel_rem_pio2f+0xc6>
|
|
8005310: 9804 ldr r0, [sp, #16]
|
|
8005312: 2201 movs r2, #1
|
|
8005314: e7e7 b.n 80052e6 <__kernel_rem_pio2f+0x27a>
|
|
8005316: 9903 ldr r1, [sp, #12]
|
|
8005318: f8dd e004 ldr.w lr, [sp, #4]
|
|
800531c: f851 102c ldr.w r1, [r1, ip, lsl #2]
|
|
8005320: 9105 str r1, [sp, #20]
|
|
8005322: ee07 1a90 vmov s15, r1
|
|
8005326: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
800532a: 2400 movs r4, #0
|
|
800532c: ece6 7a01 vstmia r6!, {s15}
|
|
8005330: eddf 7a0c vldr s15, [pc, #48] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
8005334: 46b1 mov r9, r6
|
|
8005336: 455c cmp r4, fp
|
|
8005338: dd04 ble.n 8005344 <__kernel_rem_pio2f+0x2d8>
|
|
800533a: ece0 7a01 vstmia r0!, {s15}
|
|
800533e: f10c 0c01 add.w ip, ip, #1
|
|
8005342: e7e1 b.n 8005308 <__kernel_rem_pio2f+0x29c>
|
|
8005344: ecfe 6a01 vldmia lr!, {s13}
|
|
8005348: ed39 7a01 vldmdb r9!, {s14}
|
|
800534c: 3401 adds r4, #1
|
|
800534e: eee6 7a87 vfma.f32 s15, s13, s14
|
|
8005352: e7f0 b.n 8005336 <__kernel_rem_pio2f+0x2ca>
|
|
8005354: 080083f0 .word 0x080083f0
|
|
8005358: 080083c4 .word 0x080083c4
|
|
800535c: 43800000 .word 0x43800000
|
|
8005360: 3b800000 .word 0x3b800000
|
|
8005364: 00000000 .word 0x00000000
|
|
8005368: 9b02 ldr r3, [sp, #8]
|
|
800536a: eeb0 0a48 vmov.f32 s0, s16
|
|
800536e: eba3 0008 sub.w r0, r3, r8
|
|
8005372: f000 f8e3 bl 800553c <scalbnf>
|
|
8005376: ed1f 7a07 vldr s14, [pc, #-28] @ 800535c <__kernel_rem_pio2f+0x2f0>
|
|
800537a: eeb4 0ac7 vcmpe.f32 s0, s14
|
|
800537e: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
8005382: db19 blt.n 80053b8 <__kernel_rem_pio2f+0x34c>
|
|
8005384: ed5f 7a0a vldr s15, [pc, #-40] @ 8005360 <__kernel_rem_pio2f+0x2f4>
|
|
8005388: ee60 7a27 vmul.f32 s15, s0, s15
|
|
800538c: aa08 add r2, sp, #32
|
|
800538e: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
8005392: 3508 adds r5, #8
|
|
8005394: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
8005398: eea7 0ac7 vfms.f32 s0, s15, s14
|
|
800539c: eefd 7ae7 vcvt.s32.f32 s15, s15
|
|
80053a0: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
80053a4: ee10 3a10 vmov r3, s0
|
|
80053a8: f842 3024 str.w r3, [r2, r4, lsl #2]
|
|
80053ac: ee17 3a90 vmov r3, s15
|
|
80053b0: 3401 adds r4, #1
|
|
80053b2: f842 3024 str.w r3, [r2, r4, lsl #2]
|
|
80053b6: e74c b.n 8005252 <__kernel_rem_pio2f+0x1e6>
|
|
80053b8: eebd 0ac0 vcvt.s32.f32 s0, s0
|
|
80053bc: aa08 add r2, sp, #32
|
|
80053be: ee10 3a10 vmov r3, s0
|
|
80053c2: e7f6 b.n 80053b2 <__kernel_rem_pio2f+0x346>
|
|
80053c4: a808 add r0, sp, #32
|
|
80053c6: f850 0023 ldr.w r0, [r0, r3, lsl #2]
|
|
80053ca: 9001 str r0, [sp, #4]
|
|
80053cc: ee07 0a90 vmov s15, r0
|
|
80053d0: eef8 7ae7 vcvt.f32.s32 s15, s15
|
|
80053d4: 3b01 subs r3, #1
|
|
80053d6: ee67 7a80 vmul.f32 s15, s15, s0
|
|
80053da: ee20 0a07 vmul.f32 s0, s0, s14
|
|
80053de: ed62 7a01 vstmdb r2!, {s15}
|
|
80053e2: e743 b.n 800526c <__kernel_rem_pio2f+0x200>
|
|
80053e4: ecfc 6a01 vldmia ip!, {s13}
|
|
80053e8: ecb5 7a01 vldmia r5!, {s14}
|
|
80053ec: eee6 7a87 vfma.f32 s15, s13, s14
|
|
80053f0: 3001 adds r0, #1
|
|
80053f2: 4550 cmp r0, sl
|
|
80053f4: dc01 bgt.n 80053fa <__kernel_rem_pio2f+0x38e>
|
|
80053f6: 4290 cmp r0, r2
|
|
80053f8: ddf4 ble.n 80053e4 <__kernel_rem_pio2f+0x378>
|
|
80053fa: a858 add r0, sp, #352 @ 0x160
|
|
80053fc: eb00 0282 add.w r2, r0, r2, lsl #2
|
|
8005400: ed42 7a28 vstr s15, [r2, #-160] @ 0xffffff60
|
|
8005404: 3b01 subs r3, #1
|
|
8005406: e735 b.n 8005274 <__kernel_rem_pio2f+0x208>
|
|
8005408: 9b66 ldr r3, [sp, #408] @ 0x198
|
|
800540a: 2b02 cmp r3, #2
|
|
800540c: dc09 bgt.n 8005422 <__kernel_rem_pio2f+0x3b6>
|
|
800540e: 2b00 cmp r3, #0
|
|
8005410: dc27 bgt.n 8005462 <__kernel_rem_pio2f+0x3f6>
|
|
8005412: d040 beq.n 8005496 <__kernel_rem_pio2f+0x42a>
|
|
8005414: f009 0007 and.w r0, r9, #7
|
|
8005418: b059 add sp, #356 @ 0x164
|
|
800541a: ecbd 8b04 vpop {d8-d9}
|
|
800541e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
8005422: 9b66 ldr r3, [sp, #408] @ 0x198
|
|
8005424: 2b03 cmp r3, #3
|
|
8005426: d1f5 bne.n 8005414 <__kernel_rem_pio2f+0x3a8>
|
|
8005428: aa30 add r2, sp, #192 @ 0xc0
|
|
800542a: 1f0b subs r3, r1, #4
|
|
800542c: 4413 add r3, r2
|
|
800542e: 461a mov r2, r3
|
|
8005430: 4620 mov r0, r4
|
|
8005432: 2800 cmp r0, #0
|
|
8005434: dc50 bgt.n 80054d8 <__kernel_rem_pio2f+0x46c>
|
|
8005436: 4622 mov r2, r4
|
|
8005438: 2a01 cmp r2, #1
|
|
800543a: dc5d bgt.n 80054f8 <__kernel_rem_pio2f+0x48c>
|
|
800543c: ab30 add r3, sp, #192 @ 0xc0
|
|
800543e: ed5f 7a37 vldr s15, [pc, #-220] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
8005442: 440b add r3, r1
|
|
8005444: 2c01 cmp r4, #1
|
|
8005446: dc67 bgt.n 8005518 <__kernel_rem_pio2f+0x4ac>
|
|
8005448: eddd 6a30 vldr s13, [sp, #192] @ 0xc0
|
|
800544c: ed9d 7a31 vldr s14, [sp, #196] @ 0xc4
|
|
8005450: 2e00 cmp r6, #0
|
|
8005452: d167 bne.n 8005524 <__kernel_rem_pio2f+0x4b8>
|
|
8005454: edc7 6a00 vstr s13, [r7]
|
|
8005458: ed87 7a01 vstr s14, [r7, #4]
|
|
800545c: edc7 7a02 vstr s15, [r7, #8]
|
|
8005460: e7d8 b.n 8005414 <__kernel_rem_pio2f+0x3a8>
|
|
8005462: ab30 add r3, sp, #192 @ 0xc0
|
|
8005464: ed1f 7a41 vldr s14, [pc, #-260] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
8005468: 440b add r3, r1
|
|
800546a: 4622 mov r2, r4
|
|
800546c: 2a00 cmp r2, #0
|
|
800546e: da24 bge.n 80054ba <__kernel_rem_pio2f+0x44e>
|
|
8005470: b34e cbz r6, 80054c6 <__kernel_rem_pio2f+0x45a>
|
|
8005472: eef1 7a47 vneg.f32 s15, s14
|
|
8005476: edc7 7a00 vstr s15, [r7]
|
|
800547a: eddd 7a30 vldr s15, [sp, #192] @ 0xc0
|
|
800547e: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
8005482: aa31 add r2, sp, #196 @ 0xc4
|
|
8005484: 2301 movs r3, #1
|
|
8005486: 429c cmp r4, r3
|
|
8005488: da20 bge.n 80054cc <__kernel_rem_pio2f+0x460>
|
|
800548a: b10e cbz r6, 8005490 <__kernel_rem_pio2f+0x424>
|
|
800548c: eef1 7a67 vneg.f32 s15, s15
|
|
8005490: edc7 7a01 vstr s15, [r7, #4]
|
|
8005494: e7be b.n 8005414 <__kernel_rem_pio2f+0x3a8>
|
|
8005496: ab30 add r3, sp, #192 @ 0xc0
|
|
8005498: ed5f 7a4e vldr s15, [pc, #-312] @ 8005364 <__kernel_rem_pio2f+0x2f8>
|
|
800549c: 440b add r3, r1
|
|
800549e: 2c00 cmp r4, #0
|
|
80054a0: da05 bge.n 80054ae <__kernel_rem_pio2f+0x442>
|
|
80054a2: b10e cbz r6, 80054a8 <__kernel_rem_pio2f+0x43c>
|
|
80054a4: eef1 7a67 vneg.f32 s15, s15
|
|
80054a8: edc7 7a00 vstr s15, [r7]
|
|
80054ac: e7b2 b.n 8005414 <__kernel_rem_pio2f+0x3a8>
|
|
80054ae: ed33 7a01 vldmdb r3!, {s14}
|
|
80054b2: 3c01 subs r4, #1
|
|
80054b4: ee77 7a87 vadd.f32 s15, s15, s14
|
|
80054b8: e7f1 b.n 800549e <__kernel_rem_pio2f+0x432>
|
|
80054ba: ed73 7a01 vldmdb r3!, {s15}
|
|
80054be: 3a01 subs r2, #1
|
|
80054c0: ee37 7a27 vadd.f32 s14, s14, s15
|
|
80054c4: e7d2 b.n 800546c <__kernel_rem_pio2f+0x400>
|
|
80054c6: eef0 7a47 vmov.f32 s15, s14
|
|
80054ca: e7d4 b.n 8005476 <__kernel_rem_pio2f+0x40a>
|
|
80054cc: ecb2 7a01 vldmia r2!, {s14}
|
|
80054d0: 3301 adds r3, #1
|
|
80054d2: ee77 7a87 vadd.f32 s15, s15, s14
|
|
80054d6: e7d6 b.n 8005486 <__kernel_rem_pio2f+0x41a>
|
|
80054d8: ed72 7a01 vldmdb r2!, {s15}
|
|
80054dc: edd2 6a01 vldr s13, [r2, #4]
|
|
80054e0: ee37 7aa6 vadd.f32 s14, s15, s13
|
|
80054e4: 3801 subs r0, #1
|
|
80054e6: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
80054ea: ed82 7a00 vstr s14, [r2]
|
|
80054ee: ee77 7aa6 vadd.f32 s15, s15, s13
|
|
80054f2: edc2 7a01 vstr s15, [r2, #4]
|
|
80054f6: e79c b.n 8005432 <__kernel_rem_pio2f+0x3c6>
|
|
80054f8: ed73 7a01 vldmdb r3!, {s15}
|
|
80054fc: edd3 6a01 vldr s13, [r3, #4]
|
|
8005500: ee37 7aa6 vadd.f32 s14, s15, s13
|
|
8005504: 3a01 subs r2, #1
|
|
8005506: ee77 7ac7 vsub.f32 s15, s15, s14
|
|
800550a: ed83 7a00 vstr s14, [r3]
|
|
800550e: ee77 7aa6 vadd.f32 s15, s15, s13
|
|
8005512: edc3 7a01 vstr s15, [r3, #4]
|
|
8005516: e78f b.n 8005438 <__kernel_rem_pio2f+0x3cc>
|
|
8005518: ed33 7a01 vldmdb r3!, {s14}
|
|
800551c: 3c01 subs r4, #1
|
|
800551e: ee77 7a87 vadd.f32 s15, s15, s14
|
|
8005522: e78f b.n 8005444 <__kernel_rem_pio2f+0x3d8>
|
|
8005524: eef1 6a66 vneg.f32 s13, s13
|
|
8005528: eeb1 7a47 vneg.f32 s14, s14
|
|
800552c: edc7 6a00 vstr s13, [r7]
|
|
8005530: ed87 7a01 vstr s14, [r7, #4]
|
|
8005534: eef1 7a67 vneg.f32 s15, s15
|
|
8005538: e790 b.n 800545c <__kernel_rem_pio2f+0x3f0>
|
|
800553a: bf00 nop
|
|
|
|
0800553c <scalbnf>:
|
|
800553c: ee10 3a10 vmov r3, s0
|
|
8005540: f033 4200 bics.w r2, r3, #2147483648 @ 0x80000000
|
|
8005544: d02b beq.n 800559e <scalbnf+0x62>
|
|
8005546: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000
|
|
800554a: d302 bcc.n 8005552 <scalbnf+0x16>
|
|
800554c: ee30 0a00 vadd.f32 s0, s0, s0
|
|
8005550: 4770 bx lr
|
|
8005552: f013 4fff tst.w r3, #2139095040 @ 0x7f800000
|
|
8005556: d123 bne.n 80055a0 <scalbnf+0x64>
|
|
8005558: 4b24 ldr r3, [pc, #144] @ (80055ec <scalbnf+0xb0>)
|
|
800555a: eddf 7a25 vldr s15, [pc, #148] @ 80055f0 <scalbnf+0xb4>
|
|
800555e: 4298 cmp r0, r3
|
|
8005560: ee20 0a27 vmul.f32 s0, s0, s15
|
|
8005564: db17 blt.n 8005596 <scalbnf+0x5a>
|
|
8005566: ee10 3a10 vmov r3, s0
|
|
800556a: f3c3 52c7 ubfx r2, r3, #23, #8
|
|
800556e: 3a19 subs r2, #25
|
|
8005570: f24c 3150 movw r1, #50000 @ 0xc350
|
|
8005574: 4288 cmp r0, r1
|
|
8005576: dd15 ble.n 80055a4 <scalbnf+0x68>
|
|
8005578: eddf 7a1e vldr s15, [pc, #120] @ 80055f4 <scalbnf+0xb8>
|
|
800557c: eddf 6a1e vldr s13, [pc, #120] @ 80055f8 <scalbnf+0xbc>
|
|
8005580: ee10 3a10 vmov r3, s0
|
|
8005584: eeb0 7a67 vmov.f32 s14, s15
|
|
8005588: 2b00 cmp r3, #0
|
|
800558a: bfb8 it lt
|
|
800558c: eef0 7a66 vmovlt.f32 s15, s13
|
|
8005590: ee27 0a87 vmul.f32 s0, s15, s14
|
|
8005594: 4770 bx lr
|
|
8005596: eddf 7a19 vldr s15, [pc, #100] @ 80055fc <scalbnf+0xc0>
|
|
800559a: ee27 0a80 vmul.f32 s0, s15, s0
|
|
800559e: 4770 bx lr
|
|
80055a0: 0dd2 lsrs r2, r2, #23
|
|
80055a2: e7e5 b.n 8005570 <scalbnf+0x34>
|
|
80055a4: 4410 add r0, r2
|
|
80055a6: 28fe cmp r0, #254 @ 0xfe
|
|
80055a8: dce6 bgt.n 8005578 <scalbnf+0x3c>
|
|
80055aa: 2800 cmp r0, #0
|
|
80055ac: dd06 ble.n 80055bc <scalbnf+0x80>
|
|
80055ae: f023 43ff bic.w r3, r3, #2139095040 @ 0x7f800000
|
|
80055b2: ea43 53c0 orr.w r3, r3, r0, lsl #23
|
|
80055b6: ee00 3a10 vmov s0, r3
|
|
80055ba: 4770 bx lr
|
|
80055bc: f110 0f16 cmn.w r0, #22
|
|
80055c0: da09 bge.n 80055d6 <scalbnf+0x9a>
|
|
80055c2: eddf 7a0e vldr s15, [pc, #56] @ 80055fc <scalbnf+0xc0>
|
|
80055c6: eddf 6a0e vldr s13, [pc, #56] @ 8005600 <scalbnf+0xc4>
|
|
80055ca: ee10 3a10 vmov r3, s0
|
|
80055ce: eeb0 7a67 vmov.f32 s14, s15
|
|
80055d2: 2b00 cmp r3, #0
|
|
80055d4: e7d9 b.n 800558a <scalbnf+0x4e>
|
|
80055d6: 3019 adds r0, #25
|
|
80055d8: f023 43ff bic.w r3, r3, #2139095040 @ 0x7f800000
|
|
80055dc: ea43 53c0 orr.w r3, r3, r0, lsl #23
|
|
80055e0: ed9f 0a08 vldr s0, [pc, #32] @ 8005604 <scalbnf+0xc8>
|
|
80055e4: ee07 3a90 vmov s15, r3
|
|
80055e8: e7d7 b.n 800559a <scalbnf+0x5e>
|
|
80055ea: bf00 nop
|
|
80055ec: ffff3cb0 .word 0xffff3cb0
|
|
80055f0: 4c000000 .word 0x4c000000
|
|
80055f4: 7149f2ca .word 0x7149f2ca
|
|
80055f8: f149f2ca .word 0xf149f2ca
|
|
80055fc: 0da24260 .word 0x0da24260
|
|
8005600: 8da24260 .word 0x8da24260
|
|
8005604: 33000000 .word 0x33000000
|
|
|
|
08005608 <floorf>:
|
|
8005608: ee10 3a10 vmov r3, s0
|
|
800560c: f3c3 52c7 ubfx r2, r3, #23, #8
|
|
8005610: 3a7f subs r2, #127 @ 0x7f
|
|
8005612: 2a16 cmp r2, #22
|
|
8005614: f023 4100 bic.w r1, r3, #2147483648 @ 0x80000000
|
|
8005618: dc2b bgt.n 8005672 <floorf+0x6a>
|
|
800561a: 2a00 cmp r2, #0
|
|
800561c: da12 bge.n 8005644 <floorf+0x3c>
|
|
800561e: eddf 7a19 vldr s15, [pc, #100] @ 8005684 <floorf+0x7c>
|
|
8005622: ee30 0a27 vadd.f32 s0, s0, s15
|
|
8005626: eeb5 0ac0 vcmpe.f32 s0, #0.0
|
|
800562a: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
800562e: dd06 ble.n 800563e <floorf+0x36>
|
|
8005630: 2b00 cmp r3, #0
|
|
8005632: da24 bge.n 800567e <floorf+0x76>
|
|
8005634: 2900 cmp r1, #0
|
|
8005636: 4b14 ldr r3, [pc, #80] @ (8005688 <floorf+0x80>)
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|
8005638: bf08 it eq
|
|
800563a: f04f 4300 moveq.w r3, #2147483648 @ 0x80000000
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|
800563e: ee00 3a10 vmov s0, r3
|
|
8005642: 4770 bx lr
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|
8005644: 4911 ldr r1, [pc, #68] @ (800568c <floorf+0x84>)
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8005646: 4111 asrs r1, r2
|
|
8005648: 420b tst r3, r1
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800564a: d0fa beq.n 8005642 <floorf+0x3a>
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|
800564c: eddf 7a0d vldr s15, [pc, #52] @ 8005684 <floorf+0x7c>
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|
8005650: ee30 0a27 vadd.f32 s0, s0, s15
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|
8005654: eeb5 0ac0 vcmpe.f32 s0, #0.0
|
|
8005658: eef1 fa10 vmrs APSR_nzcv, fpscr
|
|
800565c: ddef ble.n 800563e <floorf+0x36>
|
|
800565e: 2b00 cmp r3, #0
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|
8005660: bfbe ittt lt
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|
8005662: f44f 0000 movlt.w r0, #8388608 @ 0x800000
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|
8005666: fa40 f202 asrlt.w r2, r0, r2
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800566a: 189b addlt r3, r3, r2
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|
800566c: ea23 0301 bic.w r3, r3, r1
|
|
8005670: e7e5 b.n 800563e <floorf+0x36>
|
|
8005672: f1b1 4fff cmp.w r1, #2139095040 @ 0x7f800000
|
|
8005676: d3e4 bcc.n 8005642 <floorf+0x3a>
|
|
8005678: ee30 0a00 vadd.f32 s0, s0, s0
|
|
800567c: 4770 bx lr
|
|
800567e: 2300 movs r3, #0
|
|
8005680: e7dd b.n 800563e <floorf+0x36>
|
|
8005682: bf00 nop
|
|
8005684: 7149f2ca .word 0x7149f2ca
|
|
8005688: bf800000 .word 0xbf800000
|
|
800568c: 007fffff .word 0x007fffff
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|
|
|
08005690 <_init>:
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|
8005690: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8005692: bf00 nop
|
|
8005694: bcf8 pop {r3, r4, r5, r6, r7}
|
|
8005696: bc08 pop {r3}
|
|
8005698: 469e mov lr, r3
|
|
800569a: 4770 bx lr
|
|
|
|
0800569c <_fini>:
|
|
800569c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800569e: bf00 nop
|
|
80056a0: bcf8 pop {r3, r4, r5, r6, r7}
|
|
80056a2: bc08 pop {r3}
|
|
80056a4: 469e mov lr, r3
|
|
80056a6: 4770 bx lr
|