7013 lines
272 KiB
Plaintext
7013 lines
272 KiB
Plaintext
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SDK_Keyboard.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 00000188 08000000 08000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 000030a0 08000190 08000190 00001190 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00002924 08003230 08003230 00004230 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM 00000008 08005b54 08005b54 00006b54 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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4 .init_array 00000004 08005b5c 08005b5c 00006b5c 2**2
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CONTENTS, ALLOC, LOAD, DATA
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5 .fini_array 00000004 08005b60 08005b60 00006b60 2**2
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CONTENTS, ALLOC, LOAD, DATA
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6 .data 00000074 20000000 08005b64 00007000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .ccmram 00000000 10000000 10000000 00007074 2**0
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CONTENTS
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8 .bss 00000644 20000074 20000074 00007074 2**2
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ALLOC
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9 ._user_heap_stack 00000600 200006b8 200006b8 00007074 2**0
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ALLOC
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10 .ARM.attributes 00000030 00000000 00000000 00007074 2**0
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CONTENTS, READONLY
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11 .debug_info 0000d0a6 00000000 00000000 000070a4 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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12 .debug_abbrev 000024b1 00000000 00000000 0001414a 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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13 .debug_loclists 00005a19 00000000 00000000 000165fb 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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14 .debug_aranges 00000a98 00000000 00000000 0001c018 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_rnglists 000007f6 00000000 00000000 0001cab0 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_macro 00021e68 00000000 00000000 0001d2a6 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_line 000109ae 00000000 00000000 0003f10e 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_str 000c5b94 00000000 00000000 0004fabc 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .comment 00000043 00000000 00000000 00115650 2**0
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CONTENTS, READONLY
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20 .debug_frame 00002124 00000000 00000000 00115694 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_line_str 00000054 00000000 00000000 001177b8 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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Disassembly of section .text:
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08000190 <__do_global_dtors_aux>:
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8000190: b510 push {r4, lr}
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8000192: 4c05 ldr r4, [pc, #20] @ (80001a8 <__do_global_dtors_aux+0x18>)
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8000194: 7823 ldrb r3, [r4, #0]
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8000196: b933 cbnz r3, 80001a6 <__do_global_dtors_aux+0x16>
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8000198: 4b04 ldr r3, [pc, #16] @ (80001ac <__do_global_dtors_aux+0x1c>)
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800019a: b113 cbz r3, 80001a2 <__do_global_dtors_aux+0x12>
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800019c: 4804 ldr r0, [pc, #16] @ (80001b0 <__do_global_dtors_aux+0x20>)
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800019e: f3af 8000 nop.w
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80001a2: 2301 movs r3, #1
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80001a4: 7023 strb r3, [r4, #0]
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80001a6: bd10 pop {r4, pc}
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80001a8: 20000074 .word 0x20000074
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80001ac: 00000000 .word 0x00000000
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80001b0: 08003218 .word 0x08003218
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080001b4 <frame_dummy>:
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80001b4: b508 push {r3, lr}
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80001b6: 4b03 ldr r3, [pc, #12] @ (80001c4 <frame_dummy+0x10>)
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80001b8: b11b cbz r3, 80001c2 <frame_dummy+0xe>
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80001ba: 4903 ldr r1, [pc, #12] @ (80001c8 <frame_dummy+0x14>)
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80001bc: 4803 ldr r0, [pc, #12] @ (80001cc <frame_dummy+0x18>)
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80001be: f3af 8000 nop.w
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80001c2: bd08 pop {r3, pc}
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80001c4: 00000000 .word 0x00000000
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80001c8: 20000078 .word 0x20000078
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80001cc: 08003218 .word 0x08003218
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080001d0 <strlen>:
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80001d0: 4603 mov r3, r0
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80001d2: f813 2b01 ldrb.w r2, [r3], #1
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80001d6: 2a00 cmp r2, #0
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80001d8: d1fb bne.n 80001d2 <strlen+0x2>
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80001da: 1a18 subs r0, r3, r0
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80001dc: 3801 subs r0, #1
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80001de: 4770 bx lr
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080001e0 <memchr>:
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80001e0: f001 01ff and.w r1, r1, #255 @ 0xff
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80001e4: 2a10 cmp r2, #16
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80001e6: db2b blt.n 8000240 <memchr+0x60>
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80001e8: f010 0f07 tst.w r0, #7
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80001ec: d008 beq.n 8000200 <memchr+0x20>
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80001ee: f810 3b01 ldrb.w r3, [r0], #1
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80001f2: 3a01 subs r2, #1
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80001f4: 428b cmp r3, r1
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80001f6: d02d beq.n 8000254 <memchr+0x74>
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80001f8: f010 0f07 tst.w r0, #7
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80001fc: b342 cbz r2, 8000250 <memchr+0x70>
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80001fe: d1f6 bne.n 80001ee <memchr+0xe>
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8000200: b4f0 push {r4, r5, r6, r7}
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8000202: ea41 2101 orr.w r1, r1, r1, lsl #8
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8000206: ea41 4101 orr.w r1, r1, r1, lsl #16
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800020a: f022 0407 bic.w r4, r2, #7
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800020e: f07f 0700 mvns.w r7, #0
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8000212: 2300 movs r3, #0
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8000214: e8f0 5602 ldrd r5, r6, [r0], #8
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8000218: 3c08 subs r4, #8
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800021a: ea85 0501 eor.w r5, r5, r1
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800021e: ea86 0601 eor.w r6, r6, r1
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8000222: fa85 f547 uadd8 r5, r5, r7
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8000226: faa3 f587 sel r5, r3, r7
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800022a: fa86 f647 uadd8 r6, r6, r7
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800022e: faa5 f687 sel r6, r5, r7
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8000232: b98e cbnz r6, 8000258 <memchr+0x78>
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8000234: d1ee bne.n 8000214 <memchr+0x34>
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8000236: bcf0 pop {r4, r5, r6, r7}
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8000238: f001 01ff and.w r1, r1, #255 @ 0xff
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800023c: f002 0207 and.w r2, r2, #7
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8000240: b132 cbz r2, 8000250 <memchr+0x70>
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8000242: f810 3b01 ldrb.w r3, [r0], #1
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8000246: 3a01 subs r2, #1
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8000248: ea83 0301 eor.w r3, r3, r1
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800024c: b113 cbz r3, 8000254 <memchr+0x74>
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800024e: d1f8 bne.n 8000242 <memchr+0x62>
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8000250: 2000 movs r0, #0
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8000252: 4770 bx lr
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8000254: 3801 subs r0, #1
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8000256: 4770 bx lr
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8000258: 2d00 cmp r5, #0
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800025a: bf06 itte eq
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800025c: 4635 moveq r5, r6
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800025e: 3803 subeq r0, #3
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8000260: 3807 subne r0, #7
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8000262: f015 0f01 tst.w r5, #1
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8000266: d107 bne.n 8000278 <memchr+0x98>
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8000268: 3001 adds r0, #1
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800026a: f415 7f80 tst.w r5, #256 @ 0x100
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800026e: bf02 ittt eq
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8000270: 3001 addeq r0, #1
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8000272: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
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8000276: 3001 addeq r0, #1
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8000278: bcf0 pop {r4, r5, r6, r7}
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800027a: 3801 subs r0, #1
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800027c: 4770 bx lr
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800027e: bf00 nop
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08000280 <__aeabi_uldivmod>:
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8000280: b953 cbnz r3, 8000298 <__aeabi_uldivmod+0x18>
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8000282: b94a cbnz r2, 8000298 <__aeabi_uldivmod+0x18>
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8000284: 2900 cmp r1, #0
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8000286: bf08 it eq
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8000288: 2800 cmpeq r0, #0
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800028a: bf1c itt ne
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800028c: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
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8000290: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
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8000294: f000 b988 b.w 80005a8 <__aeabi_idiv0>
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8000298: f1ad 0c08 sub.w ip, sp, #8
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800029c: e96d ce04 strd ip, lr, [sp, #-16]!
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80002a0: f000 f806 bl 80002b0 <__udivmoddi4>
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80002a4: f8dd e004 ldr.w lr, [sp, #4]
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80002a8: e9dd 2302 ldrd r2, r3, [sp, #8]
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80002ac: b004 add sp, #16
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80002ae: 4770 bx lr
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080002b0 <__udivmoddi4>:
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80002b0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
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80002b4: 9d08 ldr r5, [sp, #32]
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80002b6: 468e mov lr, r1
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80002b8: 4604 mov r4, r0
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80002ba: 4688 mov r8, r1
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80002bc: 2b00 cmp r3, #0
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80002be: d14a bne.n 8000356 <__udivmoddi4+0xa6>
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80002c0: 428a cmp r2, r1
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80002c2: 4617 mov r7, r2
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80002c4: d962 bls.n 800038c <__udivmoddi4+0xdc>
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80002c6: fab2 f682 clz r6, r2
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80002ca: b14e cbz r6, 80002e0 <__udivmoddi4+0x30>
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80002cc: f1c6 0320 rsb r3, r6, #32
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80002d0: fa01 f806 lsl.w r8, r1, r6
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80002d4: fa20 f303 lsr.w r3, r0, r3
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80002d8: 40b7 lsls r7, r6
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80002da: ea43 0808 orr.w r8, r3, r8
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80002de: 40b4 lsls r4, r6
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80002e0: ea4f 4e17 mov.w lr, r7, lsr #16
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80002e4: fa1f fc87 uxth.w ip, r7
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80002e8: fbb8 f1fe udiv r1, r8, lr
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80002ec: 0c23 lsrs r3, r4, #16
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80002ee: fb0e 8811 mls r8, lr, r1, r8
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80002f2: ea43 4308 orr.w r3, r3, r8, lsl #16
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80002f6: fb01 f20c mul.w r2, r1, ip
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80002fa: 429a cmp r2, r3
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80002fc: d909 bls.n 8000312 <__udivmoddi4+0x62>
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80002fe: 18fb adds r3, r7, r3
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8000300: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff
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8000304: f080 80ea bcs.w 80004dc <__udivmoddi4+0x22c>
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8000308: 429a cmp r2, r3
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800030a: f240 80e7 bls.w 80004dc <__udivmoddi4+0x22c>
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800030e: 3902 subs r1, #2
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8000310: 443b add r3, r7
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8000312: 1a9a subs r2, r3, r2
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8000314: b2a3 uxth r3, r4
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8000316: fbb2 f0fe udiv r0, r2, lr
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800031a: fb0e 2210 mls r2, lr, r0, r2
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800031e: ea43 4302 orr.w r3, r3, r2, lsl #16
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8000322: fb00 fc0c mul.w ip, r0, ip
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8000326: 459c cmp ip, r3
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8000328: d909 bls.n 800033e <__udivmoddi4+0x8e>
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800032a: 18fb adds r3, r7, r3
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800032c: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff
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8000330: f080 80d6 bcs.w 80004e0 <__udivmoddi4+0x230>
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8000334: 459c cmp ip, r3
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8000336: f240 80d3 bls.w 80004e0 <__udivmoddi4+0x230>
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800033a: 443b add r3, r7
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800033c: 3802 subs r0, #2
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800033e: ea40 4001 orr.w r0, r0, r1, lsl #16
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8000342: eba3 030c sub.w r3, r3, ip
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8000346: 2100 movs r1, #0
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8000348: b11d cbz r5, 8000352 <__udivmoddi4+0xa2>
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800034a: 40f3 lsrs r3, r6
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800034c: 2200 movs r2, #0
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800034e: e9c5 3200 strd r3, r2, [r5]
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8000352: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
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8000356: 428b cmp r3, r1
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8000358: d905 bls.n 8000366 <__udivmoddi4+0xb6>
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800035a: b10d cbz r5, 8000360 <__udivmoddi4+0xb0>
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800035c: e9c5 0100 strd r0, r1, [r5]
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8000360: 2100 movs r1, #0
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8000362: 4608 mov r0, r1
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8000364: e7f5 b.n 8000352 <__udivmoddi4+0xa2>
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8000366: fab3 f183 clz r1, r3
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800036a: 2900 cmp r1, #0
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800036c: d146 bne.n 80003fc <__udivmoddi4+0x14c>
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800036e: 4573 cmp r3, lr
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8000370: d302 bcc.n 8000378 <__udivmoddi4+0xc8>
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8000372: 4282 cmp r2, r0
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8000374: f200 8105 bhi.w 8000582 <__udivmoddi4+0x2d2>
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8000378: 1a84 subs r4, r0, r2
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800037a: eb6e 0203 sbc.w r2, lr, r3
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800037e: 2001 movs r0, #1
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8000380: 4690 mov r8, r2
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8000382: 2d00 cmp r5, #0
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8000384: d0e5 beq.n 8000352 <__udivmoddi4+0xa2>
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8000386: e9c5 4800 strd r4, r8, [r5]
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800038a: e7e2 b.n 8000352 <__udivmoddi4+0xa2>
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800038c: 2a00 cmp r2, #0
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800038e: f000 8090 beq.w 80004b2 <__udivmoddi4+0x202>
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8000392: fab2 f682 clz r6, r2
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8000396: 2e00 cmp r6, #0
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8000398: f040 80a4 bne.w 80004e4 <__udivmoddi4+0x234>
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800039c: 1a8a subs r2, r1, r2
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800039e: 0c03 lsrs r3, r0, #16
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80003a0: ea4f 4e17 mov.w lr, r7, lsr #16
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80003a4: b280 uxth r0, r0
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80003a6: b2bc uxth r4, r7
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80003a8: 2101 movs r1, #1
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80003aa: fbb2 fcfe udiv ip, r2, lr
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80003ae: fb0e 221c mls r2, lr, ip, r2
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80003b2: ea43 4302 orr.w r3, r3, r2, lsl #16
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80003b6: fb04 f20c mul.w r2, r4, ip
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80003ba: 429a cmp r2, r3
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80003bc: d907 bls.n 80003ce <__udivmoddi4+0x11e>
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80003be: 18fb adds r3, r7, r3
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80003c0: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff
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80003c4: d202 bcs.n 80003cc <__udivmoddi4+0x11c>
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80003c6: 429a cmp r2, r3
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80003c8: f200 80e0 bhi.w 800058c <__udivmoddi4+0x2dc>
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80003cc: 46c4 mov ip, r8
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80003ce: 1a9b subs r3, r3, r2
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80003d0: fbb3 f2fe udiv r2, r3, lr
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80003d4: fb0e 3312 mls r3, lr, r2, r3
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80003d8: ea40 4303 orr.w r3, r0, r3, lsl #16
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80003dc: fb02 f404 mul.w r4, r2, r4
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80003e0: 429c cmp r4, r3
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80003e2: d907 bls.n 80003f4 <__udivmoddi4+0x144>
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80003e4: 18fb adds r3, r7, r3
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80003e6: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff
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80003ea: d202 bcs.n 80003f2 <__udivmoddi4+0x142>
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80003ec: 429c cmp r4, r3
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80003ee: f200 80ca bhi.w 8000586 <__udivmoddi4+0x2d6>
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80003f2: 4602 mov r2, r0
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80003f4: 1b1b subs r3, r3, r4
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80003f6: ea42 400c orr.w r0, r2, ip, lsl #16
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80003fa: e7a5 b.n 8000348 <__udivmoddi4+0x98>
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80003fc: f1c1 0620 rsb r6, r1, #32
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8000400: 408b lsls r3, r1
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8000402: fa22 f706 lsr.w r7, r2, r6
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8000406: 431f orrs r7, r3
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8000408: fa0e f401 lsl.w r4, lr, r1
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800040c: fa20 f306 lsr.w r3, r0, r6
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8000410: fa2e fe06 lsr.w lr, lr, r6
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8000414: ea4f 4917 mov.w r9, r7, lsr #16
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8000418: 4323 orrs r3, r4
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800041a: fa00 f801 lsl.w r8, r0, r1
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800041e: fa1f fc87 uxth.w ip, r7
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8000422: fbbe f0f9 udiv r0, lr, r9
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8000426: 0c1c lsrs r4, r3, #16
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8000428: fb09 ee10 mls lr, r9, r0, lr
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800042c: ea44 440e orr.w r4, r4, lr, lsl #16
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8000430: fb00 fe0c mul.w lr, r0, ip
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8000434: 45a6 cmp lr, r4
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8000436: fa02 f201 lsl.w r2, r2, r1
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800043a: d909 bls.n 8000450 <__udivmoddi4+0x1a0>
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800043c: 193c adds r4, r7, r4
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800043e: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff
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8000442: f080 809c bcs.w 800057e <__udivmoddi4+0x2ce>
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8000446: 45a6 cmp lr, r4
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8000448: f240 8099 bls.w 800057e <__udivmoddi4+0x2ce>
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800044c: 3802 subs r0, #2
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800044e: 443c add r4, r7
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8000450: eba4 040e sub.w r4, r4, lr
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8000454: fa1f fe83 uxth.w lr, r3
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8000458: fbb4 f3f9 udiv r3, r4, r9
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800045c: fb09 4413 mls r4, r9, r3, r4
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8000460: ea4e 4404 orr.w r4, lr, r4, lsl #16
|
|
8000464: fb03 fc0c mul.w ip, r3, ip
|
|
8000468: 45a4 cmp ip, r4
|
|
800046a: d908 bls.n 800047e <__udivmoddi4+0x1ce>
|
|
800046c: 193c adds r4, r7, r4
|
|
800046e: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff
|
|
8000472: f080 8082 bcs.w 800057a <__udivmoddi4+0x2ca>
|
|
8000476: 45a4 cmp ip, r4
|
|
8000478: d97f bls.n 800057a <__udivmoddi4+0x2ca>
|
|
800047a: 3b02 subs r3, #2
|
|
800047c: 443c add r4, r7
|
|
800047e: ea43 4000 orr.w r0, r3, r0, lsl #16
|
|
8000482: eba4 040c sub.w r4, r4, ip
|
|
8000486: fba0 ec02 umull lr, ip, r0, r2
|
|
800048a: 4564 cmp r4, ip
|
|
800048c: 4673 mov r3, lr
|
|
800048e: 46e1 mov r9, ip
|
|
8000490: d362 bcc.n 8000558 <__udivmoddi4+0x2a8>
|
|
8000492: d05f beq.n 8000554 <__udivmoddi4+0x2a4>
|
|
8000494: b15d cbz r5, 80004ae <__udivmoddi4+0x1fe>
|
|
8000496: ebb8 0203 subs.w r2, r8, r3
|
|
800049a: eb64 0409 sbc.w r4, r4, r9
|
|
800049e: fa04 f606 lsl.w r6, r4, r6
|
|
80004a2: fa22 f301 lsr.w r3, r2, r1
|
|
80004a6: 431e orrs r6, r3
|
|
80004a8: 40cc lsrs r4, r1
|
|
80004aa: e9c5 6400 strd r6, r4, [r5]
|
|
80004ae: 2100 movs r1, #0
|
|
80004b0: e74f b.n 8000352 <__udivmoddi4+0xa2>
|
|
80004b2: fbb1 fcf2 udiv ip, r1, r2
|
|
80004b6: 0c01 lsrs r1, r0, #16
|
|
80004b8: ea41 410e orr.w r1, r1, lr, lsl #16
|
|
80004bc: b280 uxth r0, r0
|
|
80004be: ea40 4201 orr.w r2, r0, r1, lsl #16
|
|
80004c2: 463b mov r3, r7
|
|
80004c4: 4638 mov r0, r7
|
|
80004c6: 463c mov r4, r7
|
|
80004c8: 46b8 mov r8, r7
|
|
80004ca: 46be mov lr, r7
|
|
80004cc: 2620 movs r6, #32
|
|
80004ce: fbb1 f1f7 udiv r1, r1, r7
|
|
80004d2: eba2 0208 sub.w r2, r2, r8
|
|
80004d6: ea41 410c orr.w r1, r1, ip, lsl #16
|
|
80004da: e766 b.n 80003aa <__udivmoddi4+0xfa>
|
|
80004dc: 4601 mov r1, r0
|
|
80004de: e718 b.n 8000312 <__udivmoddi4+0x62>
|
|
80004e0: 4610 mov r0, r2
|
|
80004e2: e72c b.n 800033e <__udivmoddi4+0x8e>
|
|
80004e4: f1c6 0220 rsb r2, r6, #32
|
|
80004e8: fa2e f302 lsr.w r3, lr, r2
|
|
80004ec: 40b7 lsls r7, r6
|
|
80004ee: 40b1 lsls r1, r6
|
|
80004f0: fa20 f202 lsr.w r2, r0, r2
|
|
80004f4: ea4f 4e17 mov.w lr, r7, lsr #16
|
|
80004f8: 430a orrs r2, r1
|
|
80004fa: fbb3 f8fe udiv r8, r3, lr
|
|
80004fe: b2bc uxth r4, r7
|
|
8000500: fb0e 3318 mls r3, lr, r8, r3
|
|
8000504: 0c11 lsrs r1, r2, #16
|
|
8000506: ea41 4103 orr.w r1, r1, r3, lsl #16
|
|
800050a: fb08 f904 mul.w r9, r8, r4
|
|
800050e: 40b0 lsls r0, r6
|
|
8000510: 4589 cmp r9, r1
|
|
8000512: ea4f 4310 mov.w r3, r0, lsr #16
|
|
8000516: b280 uxth r0, r0
|
|
8000518: d93e bls.n 8000598 <__udivmoddi4+0x2e8>
|
|
800051a: 1879 adds r1, r7, r1
|
|
800051c: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff
|
|
8000520: d201 bcs.n 8000526 <__udivmoddi4+0x276>
|
|
8000522: 4589 cmp r9, r1
|
|
8000524: d81f bhi.n 8000566 <__udivmoddi4+0x2b6>
|
|
8000526: eba1 0109 sub.w r1, r1, r9
|
|
800052a: fbb1 f9fe udiv r9, r1, lr
|
|
800052e: fb09 f804 mul.w r8, r9, r4
|
|
8000532: fb0e 1119 mls r1, lr, r9, r1
|
|
8000536: b292 uxth r2, r2
|
|
8000538: ea42 4201 orr.w r2, r2, r1, lsl #16
|
|
800053c: 4542 cmp r2, r8
|
|
800053e: d229 bcs.n 8000594 <__udivmoddi4+0x2e4>
|
|
8000540: 18ba adds r2, r7, r2
|
|
8000542: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff
|
|
8000546: d2c4 bcs.n 80004d2 <__udivmoddi4+0x222>
|
|
8000548: 4542 cmp r2, r8
|
|
800054a: d2c2 bcs.n 80004d2 <__udivmoddi4+0x222>
|
|
800054c: f1a9 0102 sub.w r1, r9, #2
|
|
8000550: 443a add r2, r7
|
|
8000552: e7be b.n 80004d2 <__udivmoddi4+0x222>
|
|
8000554: 45f0 cmp r8, lr
|
|
8000556: d29d bcs.n 8000494 <__udivmoddi4+0x1e4>
|
|
8000558: ebbe 0302 subs.w r3, lr, r2
|
|
800055c: eb6c 0c07 sbc.w ip, ip, r7
|
|
8000560: 3801 subs r0, #1
|
|
8000562: 46e1 mov r9, ip
|
|
8000564: e796 b.n 8000494 <__udivmoddi4+0x1e4>
|
|
8000566: eba7 0909 sub.w r9, r7, r9
|
|
800056a: 4449 add r1, r9
|
|
800056c: f1a8 0c02 sub.w ip, r8, #2
|
|
8000570: fbb1 f9fe udiv r9, r1, lr
|
|
8000574: fb09 f804 mul.w r8, r9, r4
|
|
8000578: e7db b.n 8000532 <__udivmoddi4+0x282>
|
|
800057a: 4673 mov r3, lr
|
|
800057c: e77f b.n 800047e <__udivmoddi4+0x1ce>
|
|
800057e: 4650 mov r0, sl
|
|
8000580: e766 b.n 8000450 <__udivmoddi4+0x1a0>
|
|
8000582: 4608 mov r0, r1
|
|
8000584: e6fd b.n 8000382 <__udivmoddi4+0xd2>
|
|
8000586: 443b add r3, r7
|
|
8000588: 3a02 subs r2, #2
|
|
800058a: e733 b.n 80003f4 <__udivmoddi4+0x144>
|
|
800058c: f1ac 0c02 sub.w ip, ip, #2
|
|
8000590: 443b add r3, r7
|
|
8000592: e71c b.n 80003ce <__udivmoddi4+0x11e>
|
|
8000594: 4649 mov r1, r9
|
|
8000596: e79c b.n 80004d2 <__udivmoddi4+0x222>
|
|
8000598: eba1 0109 sub.w r1, r1, r9
|
|
800059c: 46c4 mov ip, r8
|
|
800059e: fbb1 f9fe udiv r9, r1, lr
|
|
80005a2: fb09 f804 mul.w r8, r9, r4
|
|
80005a6: e7c4 b.n 8000532 <__udivmoddi4+0x282>
|
|
|
|
080005a8 <__aeabi_idiv0>:
|
|
80005a8: 4770 bx lr
|
|
80005aa: bf00 nop
|
|
|
|
080005ac <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
80005ac: b510 push {r4, lr}
|
|
80005ae: 4604 mov r4, r0
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
80005b0: 4b0e ldr r3, [pc, #56] @ (80005ec <HAL_InitTick+0x40>)
|
|
80005b2: 781a ldrb r2, [r3, #0]
|
|
80005b4: f44f 737a mov.w r3, #1000 @ 0x3e8
|
|
80005b8: fbb3 f3f2 udiv r3, r3, r2
|
|
80005bc: 4a0c ldr r2, [pc, #48] @ (80005f0 <HAL_InitTick+0x44>)
|
|
80005be: 6810 ldr r0, [r2, #0]
|
|
80005c0: fbb0 f0f3 udiv r0, r0, r3
|
|
80005c4: f000 f8ac bl 8000720 <HAL_SYSTICK_Config>
|
|
80005c8: b968 cbnz r0, 80005e6 <HAL_InitTick+0x3a>
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
80005ca: 2c0f cmp r4, #15
|
|
80005cc: d901 bls.n 80005d2 <HAL_InitTick+0x26>
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
uwTickPrio = TickPriority;
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
80005ce: 2001 movs r0, #1
|
|
80005d0: e00a b.n 80005e8 <HAL_InitTick+0x3c>
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
80005d2: 2200 movs r2, #0
|
|
80005d4: 4621 mov r1, r4
|
|
80005d6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
80005da: f000 f891 bl 8000700 <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
80005de: 4b03 ldr r3, [pc, #12] @ (80005ec <HAL_InitTick+0x40>)
|
|
80005e0: 605c str r4, [r3, #4]
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80005e2: 2000 movs r0, #0
|
|
80005e4: e000 b.n 80005e8 <HAL_InitTick+0x3c>
|
|
return HAL_ERROR;
|
|
80005e6: 2001 movs r0, #1
|
|
}
|
|
80005e8: bd10 pop {r4, pc}
|
|
80005ea: bf00 nop
|
|
80005ec: 20000000 .word 0x20000000
|
|
80005f0: 20000020 .word 0x20000020
|
|
|
|
080005f4 <HAL_Init>:
|
|
{
|
|
80005f4: b508 push {r3, lr}
|
|
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
|
|
80005f6: 4b0b ldr r3, [pc, #44] @ (8000624 <HAL_Init+0x30>)
|
|
80005f8: 681a ldr r2, [r3, #0]
|
|
80005fa: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
80005fe: 601a str r2, [r3, #0]
|
|
__HAL_FLASH_DATA_CACHE_ENABLE();
|
|
8000600: 681a ldr r2, [r3, #0]
|
|
8000602: f442 6280 orr.w r2, r2, #1024 @ 0x400
|
|
8000606: 601a str r2, [r3, #0]
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
8000608: 681a ldr r2, [r3, #0]
|
|
800060a: f442 7280 orr.w r2, r2, #256 @ 0x100
|
|
800060e: 601a str r2, [r3, #0]
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
8000610: 2003 movs r0, #3
|
|
8000612: f000 f863 bl 80006dc <HAL_NVIC_SetPriorityGrouping>
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
8000616: 2000 movs r0, #0
|
|
8000618: f7ff ffc8 bl 80005ac <HAL_InitTick>
|
|
HAL_MspInit();
|
|
800061c: f002 f874 bl 8002708 <HAL_MspInit>
|
|
}
|
|
8000620: 2000 movs r0, #0
|
|
8000622: bd08 pop {r3, pc}
|
|
8000624: 40023c00 .word 0x40023c00
|
|
|
|
08000628 <HAL_IncTick>:
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
uwTick += uwTickFreq;
|
|
8000628: 4a03 ldr r2, [pc, #12] @ (8000638 <HAL_IncTick+0x10>)
|
|
800062a: 6811 ldr r1, [r2, #0]
|
|
800062c: 4b03 ldr r3, [pc, #12] @ (800063c <HAL_IncTick+0x14>)
|
|
800062e: 781b ldrb r3, [r3, #0]
|
|
8000630: 440b add r3, r1
|
|
8000632: 6013 str r3, [r2, #0]
|
|
}
|
|
8000634: 4770 bx lr
|
|
8000636: bf00 nop
|
|
8000638: 20000090 .word 0x20000090
|
|
800063c: 20000000 .word 0x20000000
|
|
|
|
08000640 <HAL_GetTick>:
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
return uwTick;
|
|
8000640: 4b01 ldr r3, [pc, #4] @ (8000648 <HAL_GetTick+0x8>)
|
|
8000642: 6818 ldr r0, [r3, #0]
|
|
}
|
|
8000644: 4770 bx lr
|
|
8000646: bf00 nop
|
|
8000648: 20000090 .word 0x20000090
|
|
|
|
0800064c <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
800064c: b538 push {r3, r4, r5, lr}
|
|
800064e: 4604 mov r4, r0
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8000650: f7ff fff6 bl 8000640 <HAL_GetTick>
|
|
8000654: 4605 mov r5, r0
|
|
uint32_t wait = Delay;
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
8000656: f1b4 3fff cmp.w r4, #4294967295 @ 0xffffffff
|
|
800065a: d002 beq.n 8000662 <HAL_Delay+0x16>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
800065c: 4b04 ldr r3, [pc, #16] @ (8000670 <HAL_Delay+0x24>)
|
|
800065e: 781b ldrb r3, [r3, #0]
|
|
8000660: 441c add r4, r3
|
|
}
|
|
|
|
while((HAL_GetTick() - tickstart) < wait)
|
|
8000662: f7ff ffed bl 8000640 <HAL_GetTick>
|
|
8000666: 1b40 subs r0, r0, r5
|
|
8000668: 42a0 cmp r0, r4
|
|
800066a: d3fa bcc.n 8000662 <HAL_Delay+0x16>
|
|
{
|
|
}
|
|
}
|
|
800066c: bd38 pop {r3, r4, r5, pc}
|
|
800066e: bf00 nop
|
|
8000670: 20000000 .word 0x20000000
|
|
|
|
08000674 <__NVIC_SetPriority>:
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8000674: 2800 cmp r0, #0
|
|
8000676: db08 blt.n 800068a <__NVIC_SetPriority+0x16>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8000678: 0109 lsls r1, r1, #4
|
|
800067a: b2c9 uxtb r1, r1
|
|
800067c: f100 4060 add.w r0, r0, #3758096384 @ 0xe0000000
|
|
8000680: f500 4061 add.w r0, r0, #57600 @ 0xe100
|
|
8000684: f880 1300 strb.w r1, [r0, #768] @ 0x300
|
|
8000688: 4770 bx lr
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800068a: f000 000f and.w r0, r0, #15
|
|
800068e: 0109 lsls r1, r1, #4
|
|
8000690: b2c9 uxtb r1, r1
|
|
8000692: 4b01 ldr r3, [pc, #4] @ (8000698 <__NVIC_SetPriority+0x24>)
|
|
8000694: 5419 strb r1, [r3, r0]
|
|
}
|
|
}
|
|
8000696: 4770 bx lr
|
|
8000698: e000ed14 .word 0xe000ed14
|
|
|
|
0800069c <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800069c: b500 push {lr}
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
800069e: f000 0007 and.w r0, r0, #7
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
80006a2: f1c0 0c07 rsb ip, r0, #7
|
|
80006a6: f1bc 0f04 cmp.w ip, #4
|
|
80006aa: bf28 it cs
|
|
80006ac: f04f 0c04 movcs.w ip, #4
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
80006b0: 1d03 adds r3, r0, #4
|
|
80006b2: 2b06 cmp r3, #6
|
|
80006b4: d90f bls.n 80006d6 <NVIC_EncodePriority+0x3a>
|
|
80006b6: 1ec3 subs r3, r0, #3
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
80006b8: f04f 3eff mov.w lr, #4294967295 @ 0xffffffff
|
|
80006bc: fa0e f00c lsl.w r0, lr, ip
|
|
80006c0: ea21 0100 bic.w r1, r1, r0
|
|
80006c4: 4099 lsls r1, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
80006c6: fa0e fe03 lsl.w lr, lr, r3
|
|
80006ca: ea22 020e bic.w r2, r2, lr
|
|
);
|
|
}
|
|
80006ce: ea41 0002 orr.w r0, r1, r2
|
|
80006d2: f85d fb04 ldr.w pc, [sp], #4
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
80006d6: 2300 movs r3, #0
|
|
80006d8: e7ee b.n 80006b8 <NVIC_EncodePriority+0x1c>
|
|
...
|
|
|
|
080006dc <HAL_NVIC_SetPriorityGrouping>:
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
80006dc: 4a07 ldr r2, [pc, #28] @ (80006fc <HAL_NVIC_SetPriorityGrouping+0x20>)
|
|
80006de: 68d3 ldr r3, [r2, #12]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
80006e0: f423 63e0 bic.w r3, r3, #1792 @ 0x700
|
|
80006e4: 041b lsls r3, r3, #16
|
|
80006e6: 0c1b lsrs r3, r3, #16
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
80006e8: 0200 lsls r0, r0, #8
|
|
80006ea: f400 60e0 and.w r0, r0, #1792 @ 0x700
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
80006ee: 4303 orrs r3, r0
|
|
reg_value = (reg_value |
|
|
80006f0: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
|
|
80006f4: f443 3300 orr.w r3, r3, #131072 @ 0x20000
|
|
SCB->AIRCR = reg_value;
|
|
80006f8: 60d3 str r3, [r2, #12]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
}
|
|
80006fa: 4770 bx lr
|
|
80006fc: e000ed00 .word 0xe000ed00
|
|
|
|
08000700 <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
8000700: b510 push {r4, lr}
|
|
8000702: 4604 mov r4, r0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <HAL_NVIC_SetPriority+0x1c>)
|
|
8000706: 68d8 ldr r0, [r3, #12]
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
8000708: f3c0 2002 ubfx r0, r0, #8, #3
|
|
800070c: f7ff ffc6 bl 800069c <NVIC_EncodePriority>
|
|
8000710: 4601 mov r1, r0
|
|
8000712: 4620 mov r0, r4
|
|
8000714: f7ff ffae bl 8000674 <__NVIC_SetPriority>
|
|
}
|
|
8000718: bd10 pop {r4, pc}
|
|
800071a: bf00 nop
|
|
800071c: e000ed00 .word 0xe000ed00
|
|
|
|
08000720 <HAL_SYSTICK_Config>:
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
8000720: 3801 subs r0, #1
|
|
8000722: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000
|
|
8000726: d20b bcs.n 8000740 <HAL_SYSTICK_Config+0x20>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
8000728: f04f 23e0 mov.w r3, #3758153728 @ 0xe000e000
|
|
800072c: 6158 str r0, [r3, #20]
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800072e: 4a05 ldr r2, [pc, #20] @ (8000744 <HAL_SYSTICK_Config+0x24>)
|
|
8000730: 21f0 movs r1, #240 @ 0xf0
|
|
8000732: f882 1023 strb.w r1, [r2, #35] @ 0x23
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
8000736: 2000 movs r0, #0
|
|
8000738: 6198 str r0, [r3, #24]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
800073a: 2207 movs r2, #7
|
|
800073c: 611a str r2, [r3, #16]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
800073e: 4770 bx lr
|
|
return (1UL); /* Reload value impossible */
|
|
8000740: 2001 movs r0, #1
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
return SysTick_Config(TicksNumb);
|
|
}
|
|
8000742: 4770 bx lr
|
|
8000744: e000ed00 .word 0xe000ed00
|
|
|
|
08000748 <HAL_GPIO_Init>:
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
|
|
|
|
/* Configure the port pins */
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
8000748: 2300 movs r3, #0
|
|
800074a: 2b0f cmp r3, #15
|
|
800074c: f200 80da bhi.w 8000904 <HAL_GPIO_Init+0x1bc>
|
|
{
|
|
8000750: b5f0 push {r4, r5, r6, r7, lr}
|
|
8000752: b083 sub sp, #12
|
|
8000754: e03a b.n 80007cc <HAL_GPIO_Init+0x84>
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2U];
|
|
temp &= ~(0x0FU << (4U * (position & 0x03U)));
|
|
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
|
|
8000756: 2207 movs r2, #7
|
|
8000758: e000 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
800075a: 2200 movs r2, #0
|
|
800075c: 40aa lsls r2, r5
|
|
800075e: 4332 orrs r2, r6
|
|
SYSCFG->EXTICR[position >> 2U] = temp;
|
|
8000760: 3402 adds r4, #2
|
|
8000762: 4d69 ldr r5, [pc, #420] @ (8000908 <HAL_GPIO_Init+0x1c0>)
|
|
8000764: f845 2024 str.w r2, [r5, r4, lsl #2]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->IMR;
|
|
8000768: 4a68 ldr r2, [pc, #416] @ (800090c <HAL_GPIO_Init+0x1c4>)
|
|
800076a: 6814 ldr r4, [r2, #0]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
800076c: ea6f 020c mvn.w r2, ip
|
|
8000770: ea24 050c bic.w r5, r4, ip
|
|
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
|
8000774: 684e ldr r6, [r1, #4]
|
|
8000776: f416 3f80 tst.w r6, #65536 @ 0x10000
|
|
800077a: d001 beq.n 8000780 <HAL_GPIO_Init+0x38>
|
|
{
|
|
temp |= iocurrent;
|
|
800077c: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->IMR = temp;
|
|
8000780: 4c62 ldr r4, [pc, #392] @ (800090c <HAL_GPIO_Init+0x1c4>)
|
|
8000782: 6025 str r5, [r4, #0]
|
|
|
|
temp = EXTI->EMR;
|
|
8000784: 6864 ldr r4, [r4, #4]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
8000786: ea02 0504 and.w r5, r2, r4
|
|
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
|
800078a: 684e ldr r6, [r1, #4]
|
|
800078c: f416 3f00 tst.w r6, #131072 @ 0x20000
|
|
8000790: d001 beq.n 8000796 <HAL_GPIO_Init+0x4e>
|
|
{
|
|
temp |= iocurrent;
|
|
8000792: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->EMR = temp;
|
|
8000796: 4c5d ldr r4, [pc, #372] @ (800090c <HAL_GPIO_Init+0x1c4>)
|
|
8000798: 6065 str r5, [r4, #4]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
800079a: 68a4 ldr r4, [r4, #8]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
800079c: ea02 0504 and.w r5, r2, r4
|
|
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
|
80007a0: 684e ldr r6, [r1, #4]
|
|
80007a2: f416 1f80 tst.w r6, #1048576 @ 0x100000
|
|
80007a6: d001 beq.n 80007ac <HAL_GPIO_Init+0x64>
|
|
{
|
|
temp |= iocurrent;
|
|
80007a8: ea4c 0504 orr.w r5, ip, r4
|
|
}
|
|
EXTI->RTSR = temp;
|
|
80007ac: 4c57 ldr r4, [pc, #348] @ (800090c <HAL_GPIO_Init+0x1c4>)
|
|
80007ae: 60a5 str r5, [r4, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
80007b0: 68e4 ldr r4, [r4, #12]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80007b2: 4022 ands r2, r4
|
|
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
|
80007b4: 684d ldr r5, [r1, #4]
|
|
80007b6: f415 1f00 tst.w r5, #2097152 @ 0x200000
|
|
80007ba: d001 beq.n 80007c0 <HAL_GPIO_Init+0x78>
|
|
{
|
|
temp |= iocurrent;
|
|
80007bc: ea4c 0204 orr.w r2, ip, r4
|
|
}
|
|
EXTI->FTSR = temp;
|
|
80007c0: 4c52 ldr r4, [pc, #328] @ (800090c <HAL_GPIO_Init+0x1c4>)
|
|
80007c2: 60e2 str r2, [r4, #12]
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
80007c4: 3301 adds r3, #1
|
|
80007c6: 2b0f cmp r3, #15
|
|
80007c8: f200 809a bhi.w 8000900 <HAL_GPIO_Init+0x1b8>
|
|
ioposition = 0x01U << position;
|
|
80007cc: 2201 movs r2, #1
|
|
80007ce: 409a lsls r2, r3
|
|
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
|
80007d0: 680c ldr r4, [r1, #0]
|
|
80007d2: ea04 0c02 and.w ip, r4, r2
|
|
if(iocurrent == ioposition)
|
|
80007d6: ea32 0404 bics.w r4, r2, r4
|
|
80007da: d1f3 bne.n 80007c4 <HAL_GPIO_Init+0x7c>
|
|
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
|
|
80007dc: 684c ldr r4, [r1, #4]
|
|
80007de: 1e65 subs r5, r4, #1
|
|
80007e0: 2d01 cmp r5, #1
|
|
80007e2: d903 bls.n 80007ec <HAL_GPIO_Init+0xa4>
|
|
80007e4: 2c11 cmp r4, #17
|
|
80007e6: d001 beq.n 80007ec <HAL_GPIO_Init+0xa4>
|
|
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
|
|
80007e8: 2c12 cmp r4, #18
|
|
80007ea: d112 bne.n 8000812 <HAL_GPIO_Init+0xca>
|
|
temp = GPIOx->OSPEEDR;
|
|
80007ec: 6885 ldr r5, [r0, #8]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
|
|
80007ee: 005e lsls r6, r3, #1
|
|
80007f0: 2403 movs r4, #3
|
|
80007f2: 40b4 lsls r4, r6
|
|
80007f4: ea25 0504 bic.w r5, r5, r4
|
|
temp |= (GPIO_Init->Speed << (position * 2U));
|
|
80007f8: 68cc ldr r4, [r1, #12]
|
|
80007fa: 40b4 lsls r4, r6
|
|
80007fc: 432c orrs r4, r5
|
|
GPIOx->OSPEEDR = temp;
|
|
80007fe: 6084 str r4, [r0, #8]
|
|
temp = GPIOx->OTYPER;
|
|
8000800: 6844 ldr r4, [r0, #4]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
8000802: ea24 0402 bic.w r4, r4, r2
|
|
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
|
|
8000806: 684a ldr r2, [r1, #4]
|
|
8000808: f3c2 1200 ubfx r2, r2, #4, #1
|
|
800080c: 409a lsls r2, r3
|
|
800080e: 4322 orrs r2, r4
|
|
GPIOx->OTYPER = temp;
|
|
8000810: 6042 str r2, [r0, #4]
|
|
temp = GPIOx->PUPDR;
|
|
8000812: 68c5 ldr r5, [r0, #12]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
|
|
8000814: ea4f 0e43 mov.w lr, r3, lsl #1
|
|
8000818: 2203 movs r2, #3
|
|
800081a: fa02 f20e lsl.w r2, r2, lr
|
|
800081e: 43d4 mvns r4, r2
|
|
8000820: ea25 0502 bic.w r5, r5, r2
|
|
temp |= ((GPIO_Init->Pull) << (position * 2U));
|
|
8000824: 688a ldr r2, [r1, #8]
|
|
8000826: fa02 f20e lsl.w r2, r2, lr
|
|
800082a: 432a orrs r2, r5
|
|
GPIOx->PUPDR = temp;
|
|
800082c: 60c2 str r2, [r0, #12]
|
|
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
|
|
800082e: 684a ldr r2, [r1, #4]
|
|
8000830: 2a02 cmp r2, #2
|
|
8000832: d001 beq.n 8000838 <HAL_GPIO_Init+0xf0>
|
|
8000834: 2a12 cmp r2, #18
|
|
8000836: d10f bne.n 8000858 <HAL_GPIO_Init+0x110>
|
|
temp = GPIOx->AFR[position >> 3U];
|
|
8000838: 08dd lsrs r5, r3, #3
|
|
800083a: 3508 adds r5, #8
|
|
800083c: f850 7025 ldr.w r7, [r0, r5, lsl #2]
|
|
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
|
|
8000840: f003 0607 and.w r6, r3, #7
|
|
8000844: 00b6 lsls r6, r6, #2
|
|
8000846: 220f movs r2, #15
|
|
8000848: 40b2 lsls r2, r6
|
|
800084a: ea27 0702 bic.w r7, r7, r2
|
|
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
|
|
800084e: 690a ldr r2, [r1, #16]
|
|
8000850: 40b2 lsls r2, r6
|
|
8000852: 433a orrs r2, r7
|
|
GPIOx->AFR[position >> 3U] = temp;
|
|
8000854: f840 2025 str.w r2, [r0, r5, lsl #2]
|
|
temp = GPIOx->MODER;
|
|
8000858: 6802 ldr r2, [r0, #0]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
|
|
800085a: 4014 ands r4, r2
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
|
|
800085c: 684a ldr r2, [r1, #4]
|
|
800085e: f002 0203 and.w r2, r2, #3
|
|
8000862: fa02 f20e lsl.w r2, r2, lr
|
|
8000866: 4322 orrs r2, r4
|
|
GPIOx->MODER = temp;
|
|
8000868: 6002 str r2, [r0, #0]
|
|
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
|
800086a: 684a ldr r2, [r1, #4]
|
|
800086c: f012 5f80 tst.w r2, #268435456 @ 0x10000000
|
|
8000870: d0a8 beq.n 80007c4 <HAL_GPIO_Init+0x7c>
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
8000872: 2200 movs r2, #0
|
|
8000874: 9201 str r2, [sp, #4]
|
|
8000876: 4a26 ldr r2, [pc, #152] @ (8000910 <HAL_GPIO_Init+0x1c8>)
|
|
8000878: 6c54 ldr r4, [r2, #68] @ 0x44
|
|
800087a: f444 4480 orr.w r4, r4, #16384 @ 0x4000
|
|
800087e: 6454 str r4, [r2, #68] @ 0x44
|
|
8000880: 6c52 ldr r2, [r2, #68] @ 0x44
|
|
8000882: f402 4280 and.w r2, r2, #16384 @ 0x4000
|
|
8000886: 9201 str r2, [sp, #4]
|
|
8000888: 9a01 ldr r2, [sp, #4]
|
|
temp = SYSCFG->EXTICR[position >> 2U];
|
|
800088a: 089c lsrs r4, r3, #2
|
|
800088c: 1ca5 adds r5, r4, #2
|
|
800088e: 4a1e ldr r2, [pc, #120] @ (8000908 <HAL_GPIO_Init+0x1c0>)
|
|
8000890: f852 6025 ldr.w r6, [r2, r5, lsl #2]
|
|
temp &= ~(0x0FU << (4U * (position & 0x03U)));
|
|
8000894: f003 0503 and.w r5, r3, #3
|
|
8000898: 00ad lsls r5, r5, #2
|
|
800089a: 220f movs r2, #15
|
|
800089c: 40aa lsls r2, r5
|
|
800089e: ea26 0602 bic.w r6, r6, r2
|
|
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
|
|
80008a2: 4a1c ldr r2, [pc, #112] @ (8000914 <HAL_GPIO_Init+0x1cc>)
|
|
80008a4: 4290 cmp r0, r2
|
|
80008a6: f43f af58 beq.w 800075a <HAL_GPIO_Init+0x12>
|
|
80008aa: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008ae: 4290 cmp r0, r2
|
|
80008b0: d01a beq.n 80008e8 <HAL_GPIO_Init+0x1a0>
|
|
80008b2: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008b6: 4290 cmp r0, r2
|
|
80008b8: d018 beq.n 80008ec <HAL_GPIO_Init+0x1a4>
|
|
80008ba: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008be: 4290 cmp r0, r2
|
|
80008c0: d016 beq.n 80008f0 <HAL_GPIO_Init+0x1a8>
|
|
80008c2: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008c6: 4290 cmp r0, r2
|
|
80008c8: d014 beq.n 80008f4 <HAL_GPIO_Init+0x1ac>
|
|
80008ca: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008ce: 4290 cmp r0, r2
|
|
80008d0: d012 beq.n 80008f8 <HAL_GPIO_Init+0x1b0>
|
|
80008d2: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008d6: 4290 cmp r0, r2
|
|
80008d8: d010 beq.n 80008fc <HAL_GPIO_Init+0x1b4>
|
|
80008da: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
80008de: 4290 cmp r0, r2
|
|
80008e0: f43f af39 beq.w 8000756 <HAL_GPIO_Init+0xe>
|
|
80008e4: 2208 movs r2, #8
|
|
80008e6: e739 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008e8: 2201 movs r2, #1
|
|
80008ea: e737 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008ec: 2202 movs r2, #2
|
|
80008ee: e735 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008f0: 2203 movs r2, #3
|
|
80008f2: e733 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008f4: 2204 movs r2, #4
|
|
80008f6: e731 b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008f8: 2205 movs r2, #5
|
|
80008fa: e72f b.n 800075c <HAL_GPIO_Init+0x14>
|
|
80008fc: 2206 movs r2, #6
|
|
80008fe: e72d b.n 800075c <HAL_GPIO_Init+0x14>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
8000900: b003 add sp, #12
|
|
8000902: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8000904: 4770 bx lr
|
|
8000906: bf00 nop
|
|
8000908: 40013800 .word 0x40013800
|
|
800090c: 40013c00 .word 0x40013c00
|
|
8000910: 40023800 .word 0x40023800
|
|
8000914: 40020000 .word 0x40020000
|
|
|
|
08000918 <I2C_IsAcknowledgeFailed>:
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8000918: 6803 ldr r3, [r0, #0]
|
|
800091a: 695a ldr r2, [r3, #20]
|
|
800091c: f412 6f80 tst.w r2, #1024 @ 0x400
|
|
8000920: d101 bne.n 8000926 <I2C_IsAcknowledgeFailed+0xe>
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
return HAL_OK;
|
|
8000922: 2000 movs r0, #0
|
|
}
|
|
8000924: 4770 bx lr
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
8000926: f46f 6280 mvn.w r2, #1024 @ 0x400
|
|
800092a: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
800092c: 2300 movs r3, #0
|
|
800092e: 6303 str r3, [r0, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000930: 2220 movs r2, #32
|
|
8000932: f880 203d strb.w r2, [r0, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000936: f880 303e strb.w r3, [r0, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
800093a: 6c02 ldr r2, [r0, #64] @ 0x40
|
|
800093c: f042 0204 orr.w r2, r2, #4
|
|
8000940: 6402 str r2, [r0, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000942: f880 303c strb.w r3, [r0, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000946: 2001 movs r0, #1
|
|
8000948: 4770 bx lr
|
|
|
|
0800094a <I2C_WaitOnFlagUntilTimeout>:
|
|
{
|
|
800094a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
800094e: 4607 mov r7, r0
|
|
8000950: 460d mov r5, r1
|
|
8000952: 4690 mov r8, r2
|
|
8000954: 461e mov r6, r3
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8000956: e024 b.n 80009a2 <I2C_WaitOnFlagUntilTimeout+0x58>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000958: f7ff fe72 bl 8000640 <HAL_GetTick>
|
|
800095c: 9b06 ldr r3, [sp, #24]
|
|
800095e: 1ac0 subs r0, r0, r3
|
|
8000960: 42b0 cmp r0, r6
|
|
8000962: d800 bhi.n 8000966 <I2C_WaitOnFlagUntilTimeout+0x1c>
|
|
8000964: b9ee cbnz r6, 80009a2 <I2C_WaitOnFlagUntilTimeout+0x58>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000966: 2300 movs r3, #0
|
|
8000968: 633b str r3, [r7, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800096a: 2220 movs r2, #32
|
|
800096c: f887 203d strb.w r2, [r7, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000970: f887 303e strb.w r3, [r7, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000974: 6c3a ldr r2, [r7, #64] @ 0x40
|
|
8000976: f042 0220 orr.w r2, r2, #32
|
|
800097a: 643a str r2, [r7, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
800097c: f887 303c strb.w r3, [r7, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000980: 2001 movs r0, #1
|
|
8000982: e01e b.n 80009c2 <I2C_WaitOnFlagUntilTimeout+0x78>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8000984: 683b ldr r3, [r7, #0]
|
|
8000986: 699c ldr r4, [r3, #24]
|
|
8000988: ea25 0c04 bic.w ip, r5, r4
|
|
800098c: fa1f fc8c uxth.w ip, ip
|
|
8000990: fabc fc8c clz ip, ip
|
|
8000994: ea4f 1c5c mov.w ip, ip, lsr #5
|
|
8000998: 45e0 cmp r8, ip
|
|
800099a: d111 bne.n 80009c0 <I2C_WaitOnFlagUntilTimeout+0x76>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
800099c: f1b6 3fff cmp.w r6, #4294967295 @ 0xffffffff
|
|
80009a0: d1da bne.n 8000958 <I2C_WaitOnFlagUntilTimeout+0xe>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
80009a2: f3c5 4307 ubfx r3, r5, #16, #8
|
|
80009a6: 2b01 cmp r3, #1
|
|
80009a8: d1ec bne.n 8000984 <I2C_WaitOnFlagUntilTimeout+0x3a>
|
|
80009aa: 683b ldr r3, [r7, #0]
|
|
80009ac: 695b ldr r3, [r3, #20]
|
|
80009ae: ea25 0c03 bic.w ip, r5, r3
|
|
80009b2: fa1f fc8c uxth.w ip, ip
|
|
80009b6: fabc fc8c clz ip, ip
|
|
80009ba: ea4f 1c5c mov.w ip, ip, lsr #5
|
|
80009be: e7eb b.n 8000998 <I2C_WaitOnFlagUntilTimeout+0x4e>
|
|
return HAL_OK;
|
|
80009c0: 2000 movs r0, #0
|
|
}
|
|
80009c2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
|
|
080009c6 <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
|
{
|
|
80009c6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
80009ca: 4605 mov r5, r0
|
|
80009cc: 460e mov r6, r1
|
|
80009ce: 4617 mov r7, r2
|
|
80009d0: 4698 mov r8, r3
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
80009d2: e03d b.n 8000a50 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x8a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80009d4: 681a ldr r2, [r3, #0]
|
|
80009d6: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
80009da: 601a str r2, [r3, #0]
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
80009dc: 682b ldr r3, [r5, #0]
|
|
80009de: f46f 6280 mvn.w r2, #1024 @ 0x400
|
|
80009e2: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80009e4: 2300 movs r3, #0
|
|
80009e6: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80009e8: 2220 movs r2, #32
|
|
80009ea: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80009ee: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
80009f2: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
80009f4: f042 0204 orr.w r2, r2, #4
|
|
80009f8: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
80009fa: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
80009fe: 2001 movs r0, #1
|
|
8000a00: e034 b.n 8000a6c <I2C_WaitOnMasterAddressFlagUntilTimeout+0xa6>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000a02: f7ff fe1d bl 8000640 <HAL_GetTick>
|
|
8000a06: eba0 0008 sub.w r0, r0, r8
|
|
8000a0a: 42b8 cmp r0, r7
|
|
8000a0c: d800 bhi.n 8000a10 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x4a>
|
|
8000a0e: b9ff cbnz r7, 8000a50 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x8a>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000a10: 2300 movs r3, #0
|
|
8000a12: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000a14: 2220 movs r2, #32
|
|
8000a16: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000a1a: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000a1e: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
8000a20: f042 0220 orr.w r2, r2, #32
|
|
8000a24: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000a26: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000a2a: 2001 movs r0, #1
|
|
8000a2c: e01e b.n 8000a6c <I2C_WaitOnMasterAddressFlagUntilTimeout+0xa6>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8000a2e: 682b ldr r3, [r5, #0]
|
|
8000a30: 699c ldr r4, [r3, #24]
|
|
8000a32: ea26 0404 bic.w r4, r6, r4
|
|
8000a36: b2a4 uxth r4, r4
|
|
8000a38: 3c00 subs r4, #0
|
|
8000a3a: bf18 it ne
|
|
8000a3c: 2401 movne r4, #1
|
|
8000a3e: b1a4 cbz r4, 8000a6a <I2C_WaitOnMasterAddressFlagUntilTimeout+0xa4>
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8000a40: 682b ldr r3, [r5, #0]
|
|
8000a42: 695a ldr r2, [r3, #20]
|
|
8000a44: f412 6f80 tst.w r2, #1024 @ 0x400
|
|
8000a48: d1c4 bne.n 80009d4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xe>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000a4a: f1b7 3fff cmp.w r7, #4294967295 @ 0xffffffff
|
|
8000a4e: d1d8 bne.n 8000a02 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x3c>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8000a50: f3c6 4307 ubfx r3, r6, #16, #8
|
|
8000a54: 2b01 cmp r3, #1
|
|
8000a56: d1ea bne.n 8000a2e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
|
|
8000a58: 682b ldr r3, [r5, #0]
|
|
8000a5a: 695c ldr r4, [r3, #20]
|
|
8000a5c: ea26 0404 bic.w r4, r6, r4
|
|
8000a60: b2a4 uxth r4, r4
|
|
8000a62: 3c00 subs r4, #0
|
|
8000a64: bf18 it ne
|
|
8000a66: 2401 movne r4, #1
|
|
8000a68: e7e9 b.n 8000a3e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x78>
|
|
return HAL_OK;
|
|
8000a6a: 2000 movs r0, #0
|
|
}
|
|
8000a6c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
|
|
08000a70 <I2C_WaitOnTXEFlagUntilTimeout>:
|
|
{
|
|
8000a70: b570 push {r4, r5, r6, lr}
|
|
8000a72: 4604 mov r4, r0
|
|
8000a74: 460d mov r5, r1
|
|
8000a76: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
|
8000a78: 6823 ldr r3, [r4, #0]
|
|
8000a7a: 695b ldr r3, [r3, #20]
|
|
8000a7c: f013 0f80 tst.w r3, #128 @ 0x80
|
|
8000a80: d11c bne.n 8000abc <I2C_WaitOnTXEFlagUntilTimeout+0x4c>
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8000a82: 4620 mov r0, r4
|
|
8000a84: f7ff ff48 bl 8000918 <I2C_IsAcknowledgeFailed>
|
|
8000a88: b9d0 cbnz r0, 8000ac0 <I2C_WaitOnTXEFlagUntilTimeout+0x50>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000a8a: f1b5 3fff cmp.w r5, #4294967295 @ 0xffffffff
|
|
8000a8e: d0f3 beq.n 8000a78 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000a90: f7ff fdd6 bl 8000640 <HAL_GetTick>
|
|
8000a94: 1b80 subs r0, r0, r6
|
|
8000a96: 42a8 cmp r0, r5
|
|
8000a98: d801 bhi.n 8000a9e <I2C_WaitOnTXEFlagUntilTimeout+0x2e>
|
|
8000a9a: 2d00 cmp r5, #0
|
|
8000a9c: d1ec bne.n 8000a78 <I2C_WaitOnTXEFlagUntilTimeout+0x8>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000a9e: 2300 movs r3, #0
|
|
8000aa0: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000aa2: 2220 movs r2, #32
|
|
8000aa4: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000aa8: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000aac: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000aae: f042 0220 orr.w r2, r2, #32
|
|
8000ab2: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000ab4: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000ab8: 2001 movs r0, #1
|
|
8000aba: e000 b.n 8000abe <I2C_WaitOnTXEFlagUntilTimeout+0x4e>
|
|
return HAL_OK;
|
|
8000abc: 2000 movs r0, #0
|
|
}
|
|
8000abe: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8000ac0: 2001 movs r0, #1
|
|
8000ac2: e7fc b.n 8000abe <I2C_WaitOnTXEFlagUntilTimeout+0x4e>
|
|
|
|
08000ac4 <I2C_RequestMemoryWrite>:
|
|
{
|
|
8000ac4: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8000ac8: b085 sub sp, #20
|
|
8000aca: 4604 mov r4, r0
|
|
8000acc: 460d mov r5, r1
|
|
8000ace: 4691 mov r9, r2
|
|
8000ad0: 461f mov r7, r3
|
|
8000ad2: f8dd 8030 ldr.w r8, [sp, #48] @ 0x30
|
|
8000ad6: 9e0d ldr r6, [sp, #52] @ 0x34
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000ad8: 6803 ldr r3, [r0, #0]
|
|
8000ada: 6819 ldr r1, [r3, #0]
|
|
8000adc: f441 7180 orr.w r1, r1, #256 @ 0x100
|
|
8000ae0: 6019 str r1, [r3, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000ae2: 9600 str r6, [sp, #0]
|
|
8000ae4: 4643 mov r3, r8
|
|
8000ae6: 2200 movs r2, #0
|
|
8000ae8: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000aec: f7ff ff2d bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8000af0: b960 cbnz r0, 8000b0c <I2C_RequestMemoryWrite+0x48>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
|
8000af2: 6823 ldr r3, [r4, #0]
|
|
8000af4: f005 05fe and.w r5, r5, #254 @ 0xfe
|
|
8000af8: 611d str r5, [r3, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000afa: 4633 mov r3, r6
|
|
8000afc: 4642 mov r2, r8
|
|
8000afe: 4926 ldr r1, [pc, #152] @ (8000b98 <I2C_RequestMemoryWrite+0xd4>)
|
|
8000b00: 4620 mov r0, r4
|
|
8000b02: f7ff ff60 bl 80009c6 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000b06: b168 cbz r0, 8000b24 <I2C_RequestMemoryWrite+0x60>
|
|
return HAL_ERROR;
|
|
8000b08: 2001 movs r0, #1
|
|
8000b0a: e008 b.n 8000b1e <I2C_RequestMemoryWrite+0x5a>
|
|
if (hi2c->Instance->CR1 & I2C_CR1_START)
|
|
8000b0c: 6823 ldr r3, [r4, #0]
|
|
8000b0e: 681b ldr r3, [r3, #0]
|
|
8000b10: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000b14: d002 beq.n 8000b1c <I2C_RequestMemoryWrite+0x58>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000b16: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000b1a: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000b1c: 2003 movs r0, #3
|
|
}
|
|
8000b1e: b005 add sp, #20
|
|
8000b20: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8000b24: 2300 movs r3, #0
|
|
8000b26: 9303 str r3, [sp, #12]
|
|
8000b28: 6823 ldr r3, [r4, #0]
|
|
8000b2a: 695a ldr r2, [r3, #20]
|
|
8000b2c: 9203 str r2, [sp, #12]
|
|
8000b2e: 699b ldr r3, [r3, #24]
|
|
8000b30: 9303 str r3, [sp, #12]
|
|
8000b32: 9b03 ldr r3, [sp, #12]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000b34: 4632 mov r2, r6
|
|
8000b36: 4641 mov r1, r8
|
|
8000b38: 4620 mov r0, r4
|
|
8000b3a: f7ff ff99 bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000b3e: b930 cbnz r0, 8000b4e <I2C_RequestMemoryWrite+0x8a>
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
8000b40: 2f01 cmp r7, #1
|
|
8000b42: d10f bne.n 8000b64 <I2C_RequestMemoryWrite+0xa0>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000b44: 6823 ldr r3, [r4, #0]
|
|
8000b46: fa5f f689 uxtb.w r6, r9
|
|
8000b4a: 611e str r6, [r3, #16]
|
|
8000b4c: e7e7 b.n 8000b1e <I2C_RequestMemoryWrite+0x5a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000b4e: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000b50: 2b04 cmp r3, #4
|
|
8000b52: d001 beq.n 8000b58 <I2C_RequestMemoryWrite+0x94>
|
|
return HAL_ERROR;
|
|
8000b54: 2001 movs r0, #1
|
|
8000b56: e7e2 b.n 8000b1e <I2C_RequestMemoryWrite+0x5a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000b58: 6822 ldr r2, [r4, #0]
|
|
8000b5a: 6813 ldr r3, [r2, #0]
|
|
8000b5c: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000b60: 6013 str r3, [r2, #0]
|
|
8000b62: e7f7 b.n 8000b54 <I2C_RequestMemoryWrite+0x90>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8000b64: 6823 ldr r3, [r4, #0]
|
|
8000b66: ea4f 2219 mov.w r2, r9, lsr #8
|
|
8000b6a: 611a str r2, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000b6c: 4632 mov r2, r6
|
|
8000b6e: 4641 mov r1, r8
|
|
8000b70: 4620 mov r0, r4
|
|
8000b72: f7ff ff7d bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000b76: b920 cbnz r0, 8000b82 <I2C_RequestMemoryWrite+0xbe>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000b78: 6823 ldr r3, [r4, #0]
|
|
8000b7a: fa5f f689 uxtb.w r6, r9
|
|
8000b7e: 611e str r6, [r3, #16]
|
|
8000b80: e7cd b.n 8000b1e <I2C_RequestMemoryWrite+0x5a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000b82: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000b84: 2b04 cmp r3, #4
|
|
8000b86: d001 beq.n 8000b8c <I2C_RequestMemoryWrite+0xc8>
|
|
return HAL_ERROR;
|
|
8000b88: 2001 movs r0, #1
|
|
8000b8a: e7c8 b.n 8000b1e <I2C_RequestMemoryWrite+0x5a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000b8c: 6822 ldr r2, [r4, #0]
|
|
8000b8e: 6813 ldr r3, [r2, #0]
|
|
8000b90: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000b94: 6013 str r3, [r2, #0]
|
|
8000b96: e7f7 b.n 8000b88 <I2C_RequestMemoryWrite+0xc4>
|
|
8000b98: 00010002 .word 0x00010002
|
|
|
|
08000b9c <I2C_RequestMemoryRead>:
|
|
{
|
|
8000b9c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8000ba0: b084 sub sp, #16
|
|
8000ba2: 4604 mov r4, r0
|
|
8000ba4: 460d mov r5, r1
|
|
8000ba6: 4616 mov r6, r2
|
|
8000ba8: 4699 mov r9, r3
|
|
8000baa: 9f0c ldr r7, [sp, #48] @ 0x30
|
|
8000bac: f8dd 8034 ldr.w r8, [sp, #52] @ 0x34
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8000bb0: 6802 ldr r2, [r0, #0]
|
|
8000bb2: 6813 ldr r3, [r2, #0]
|
|
8000bb4: f443 6380 orr.w r3, r3, #1024 @ 0x400
|
|
8000bb8: 6013 str r3, [r2, #0]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000bba: 6803 ldr r3, [r0, #0]
|
|
8000bbc: 6819 ldr r1, [r3, #0]
|
|
8000bbe: f441 7180 orr.w r1, r1, #256 @ 0x100
|
|
8000bc2: 6019 str r1, [r3, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000bc4: f8cd 8000 str.w r8, [sp]
|
|
8000bc8: 463b mov r3, r7
|
|
8000bca: 2200 movs r2, #0
|
|
8000bcc: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000bd0: f7ff febb bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8000bd4: b970 cbnz r0, 8000bf4 <I2C_RequestMemoryRead+0x58>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
|
8000bd6: fa5f fa85 uxtb.w sl, r5
|
|
8000bda: 6823 ldr r3, [r4, #0]
|
|
8000bdc: f005 05fe and.w r5, r5, #254 @ 0xfe
|
|
8000be0: 611d str r5, [r3, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000be2: 4643 mov r3, r8
|
|
8000be4: 463a mov r2, r7
|
|
8000be6: 4941 ldr r1, [pc, #260] @ (8000cec <I2C_RequestMemoryRead+0x150>)
|
|
8000be8: 4620 mov r0, r4
|
|
8000bea: f7ff feec bl 80009c6 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000bee: b168 cbz r0, 8000c0c <I2C_RequestMemoryRead+0x70>
|
|
return HAL_ERROR;
|
|
8000bf0: 2001 movs r0, #1
|
|
8000bf2: e008 b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
if (hi2c->Instance->CR1 & I2C_CR1_START)
|
|
8000bf4: 6823 ldr r3, [r4, #0]
|
|
8000bf6: 681b ldr r3, [r3, #0]
|
|
8000bf8: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000bfc: d002 beq.n 8000c04 <I2C_RequestMemoryRead+0x68>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000bfe: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000c02: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000c04: 2003 movs r0, #3
|
|
}
|
|
8000c06: b004 add sp, #16
|
|
8000c08: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8000c0c: 2300 movs r3, #0
|
|
8000c0e: 9303 str r3, [sp, #12]
|
|
8000c10: 6823 ldr r3, [r4, #0]
|
|
8000c12: 695a ldr r2, [r3, #20]
|
|
8000c14: 9203 str r2, [sp, #12]
|
|
8000c16: 699b ldr r3, [r3, #24]
|
|
8000c18: 9303 str r3, [sp, #12]
|
|
8000c1a: 9b03 ldr r3, [sp, #12]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000c1c: 4642 mov r2, r8
|
|
8000c1e: 4639 mov r1, r7
|
|
8000c20: 4620 mov r0, r4
|
|
8000c22: f7ff ff25 bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000c26: b980 cbnz r0, 8000c4a <I2C_RequestMemoryRead+0xae>
|
|
if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
|
|
8000c28: f1b9 0f01 cmp.w r9, #1
|
|
8000c2c: d118 bne.n 8000c60 <I2C_RequestMemoryRead+0xc4>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000c2e: 6823 ldr r3, [r4, #0]
|
|
8000c30: b2f6 uxtb r6, r6
|
|
8000c32: 611e str r6, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000c34: 4642 mov r2, r8
|
|
8000c36: 4639 mov r1, r7
|
|
8000c38: 4620 mov r0, r4
|
|
8000c3a: f7ff ff19 bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000c3e: b368 cbz r0, 8000c9c <I2C_RequestMemoryRead+0x100>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000c40: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000c42: 2b04 cmp r3, #4
|
|
8000c44: d024 beq.n 8000c90 <I2C_RequestMemoryRead+0xf4>
|
|
return HAL_ERROR;
|
|
8000c46: 2001 movs r0, #1
|
|
8000c48: e7dd b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000c4a: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000c4c: 2b04 cmp r3, #4
|
|
8000c4e: d001 beq.n 8000c54 <I2C_RequestMemoryRead+0xb8>
|
|
return HAL_ERROR;
|
|
8000c50: 2001 movs r0, #1
|
|
8000c52: e7d8 b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000c54: 6822 ldr r2, [r4, #0]
|
|
8000c56: 6813 ldr r3, [r2, #0]
|
|
8000c58: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000c5c: 6013 str r3, [r2, #0]
|
|
8000c5e: e7f7 b.n 8000c50 <I2C_RequestMemoryRead+0xb4>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
|
|
8000c60: 6823 ldr r3, [r4, #0]
|
|
8000c62: 0a32 lsrs r2, r6, #8
|
|
8000c64: 611a str r2, [r3, #16]
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
|
|
8000c66: 4642 mov r2, r8
|
|
8000c68: 4639 mov r1, r7
|
|
8000c6a: 4620 mov r0, r4
|
|
8000c6c: f7ff ff00 bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8000c70: b918 cbnz r0, 8000c7a <I2C_RequestMemoryRead+0xde>
|
|
hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
|
|
8000c72: 6823 ldr r3, [r4, #0]
|
|
8000c74: b2f6 uxtb r6, r6
|
|
8000c76: 611e str r6, [r3, #16]
|
|
8000c78: e7dc b.n 8000c34 <I2C_RequestMemoryRead+0x98>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8000c7a: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8000c7c: 2b04 cmp r3, #4
|
|
8000c7e: d001 beq.n 8000c84 <I2C_RequestMemoryRead+0xe8>
|
|
return HAL_ERROR;
|
|
8000c80: 2001 movs r0, #1
|
|
8000c82: e7c0 b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000c84: 6822 ldr r2, [r4, #0]
|
|
8000c86: 6813 ldr r3, [r2, #0]
|
|
8000c88: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000c8c: 6013 str r3, [r2, #0]
|
|
8000c8e: e7f7 b.n 8000c80 <I2C_RequestMemoryRead+0xe4>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8000c90: 6822 ldr r2, [r4, #0]
|
|
8000c92: 6813 ldr r3, [r2, #0]
|
|
8000c94: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8000c98: 6013 str r3, [r2, #0]
|
|
8000c9a: e7d4 b.n 8000c46 <I2C_RequestMemoryRead+0xaa>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8000c9c: 6822 ldr r2, [r4, #0]
|
|
8000c9e: 6813 ldr r3, [r2, #0]
|
|
8000ca0: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
8000ca4: 6013 str r3, [r2, #0]
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8000ca6: f8cd 8000 str.w r8, [sp]
|
|
8000caa: 463b mov r3, r7
|
|
8000cac: 2200 movs r2, #0
|
|
8000cae: f04f 1101 mov.w r1, #65537 @ 0x10001
|
|
8000cb2: 4620 mov r0, r4
|
|
8000cb4: f7ff fe49 bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8000cb8: b968 cbnz r0, 8000cd6 <I2C_RequestMemoryRead+0x13a>
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
|
8000cba: 6822 ldr r2, [r4, #0]
|
|
8000cbc: f04a 0301 orr.w r3, sl, #1
|
|
8000cc0: 6113 str r3, [r2, #16]
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8000cc2: 4643 mov r3, r8
|
|
8000cc4: 463a mov r2, r7
|
|
8000cc6: 4909 ldr r1, [pc, #36] @ (8000cec <I2C_RequestMemoryRead+0x150>)
|
|
8000cc8: 4620 mov r0, r4
|
|
8000cca: f7ff fe7c bl 80009c6 <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8000cce: 2800 cmp r0, #0
|
|
8000cd0: d099 beq.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
return HAL_ERROR;
|
|
8000cd2: 2001 movs r0, #1
|
|
8000cd4: e797 b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
if (hi2c->Instance->CR1 & I2C_CR1_START)
|
|
8000cd6: 6823 ldr r3, [r4, #0]
|
|
8000cd8: 681b ldr r3, [r3, #0]
|
|
8000cda: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8000cde: d002 beq.n 8000ce6 <I2C_RequestMemoryRead+0x14a>
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8000ce0: f44f 7300 mov.w r3, #512 @ 0x200
|
|
8000ce4: 6423 str r3, [r4, #64] @ 0x40
|
|
return HAL_TIMEOUT;
|
|
8000ce6: 2003 movs r0, #3
|
|
8000ce8: e78d b.n 8000c06 <I2C_RequestMemoryRead+0x6a>
|
|
8000cea: bf00 nop
|
|
8000cec: 00010002 .word 0x00010002
|
|
|
|
08000cf0 <I2C_WaitOnBTFFlagUntilTimeout>:
|
|
{
|
|
8000cf0: b570 push {r4, r5, r6, lr}
|
|
8000cf2: 4604 mov r4, r0
|
|
8000cf4: 460d mov r5, r1
|
|
8000cf6: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
|
8000cf8: 6823 ldr r3, [r4, #0]
|
|
8000cfa: 695b ldr r3, [r3, #20]
|
|
8000cfc: f013 0f04 tst.w r3, #4
|
|
8000d00: d11c bne.n 8000d3c <I2C_WaitOnBTFFlagUntilTimeout+0x4c>
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8000d02: 4620 mov r0, r4
|
|
8000d04: f7ff fe08 bl 8000918 <I2C_IsAcknowledgeFailed>
|
|
8000d08: b9d0 cbnz r0, 8000d40 <I2C_WaitOnBTFFlagUntilTimeout+0x50>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8000d0a: f1b5 3fff cmp.w r5, #4294967295 @ 0xffffffff
|
|
8000d0e: d0f3 beq.n 8000cf8 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000d10: f7ff fc96 bl 8000640 <HAL_GetTick>
|
|
8000d14: 1b80 subs r0, r0, r6
|
|
8000d16: 42a8 cmp r0, r5
|
|
8000d18: d801 bhi.n 8000d1e <I2C_WaitOnBTFFlagUntilTimeout+0x2e>
|
|
8000d1a: 2d00 cmp r5, #0
|
|
8000d1c: d1ec bne.n 8000cf8 <I2C_WaitOnBTFFlagUntilTimeout+0x8>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000d1e: 2300 movs r3, #0
|
|
8000d20: 6323 str r3, [r4, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000d22: 2220 movs r2, #32
|
|
8000d24: f884 203d strb.w r2, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000d28: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000d2c: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
8000d2e: f042 0220 orr.w r2, r2, #32
|
|
8000d32: 6422 str r2, [r4, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000d34: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000d38: 2001 movs r0, #1
|
|
8000d3a: e000 b.n 8000d3e <I2C_WaitOnBTFFlagUntilTimeout+0x4e>
|
|
return HAL_OK;
|
|
8000d3c: 2000 movs r0, #0
|
|
}
|
|
8000d3e: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8000d40: 2001 movs r0, #1
|
|
8000d42: e7fc b.n 8000d3e <I2C_WaitOnBTFFlagUntilTimeout+0x4e>
|
|
|
|
08000d44 <I2C_WaitOnRXNEFlagUntilTimeout>:
|
|
{
|
|
8000d44: b570 push {r4, r5, r6, lr}
|
|
8000d46: 4605 mov r5, r0
|
|
8000d48: 460c mov r4, r1
|
|
8000d4a: 4616 mov r6, r2
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
8000d4c: 682b ldr r3, [r5, #0]
|
|
8000d4e: 6959 ldr r1, [r3, #20]
|
|
8000d50: f011 0f40 tst.w r1, #64 @ 0x40
|
|
8000d54: d129 bne.n 8000daa <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
|
8000d56: 6959 ldr r1, [r3, #20]
|
|
8000d58: f011 0f10 tst.w r1, #16
|
|
8000d5c: d115 bne.n 8000d8a <I2C_WaitOnRXNEFlagUntilTimeout+0x46>
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8000d5e: f7ff fc6f bl 8000640 <HAL_GetTick>
|
|
8000d62: 1b80 subs r0, r0, r6
|
|
8000d64: 42a0 cmp r0, r4
|
|
8000d66: d801 bhi.n 8000d6c <I2C_WaitOnRXNEFlagUntilTimeout+0x28>
|
|
8000d68: 2c00 cmp r4, #0
|
|
8000d6a: d1ef bne.n 8000d4c <I2C_WaitOnRXNEFlagUntilTimeout+0x8>
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000d6c: 2300 movs r3, #0
|
|
8000d6e: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000d70: 2220 movs r2, #32
|
|
8000d72: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000d76: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8000d7a: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
8000d7c: f042 0220 orr.w r2, r2, #32
|
|
8000d80: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000d82: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000d86: 2001 movs r0, #1
|
|
}
|
|
8000d88: bd70 pop {r4, r5, r6, pc}
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
8000d8a: f06f 0210 mvn.w r2, #16
|
|
8000d8e: 615a str r2, [r3, #20]
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000d90: 2300 movs r3, #0
|
|
8000d92: 632b str r3, [r5, #48] @ 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000d94: 2220 movs r2, #32
|
|
8000d96: f885 203d strb.w r2, [r5, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000d9a: f885 303e strb.w r3, [r5, #62] @ 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
|
8000d9e: 6c2a ldr r2, [r5, #64] @ 0x40
|
|
8000da0: 642a str r2, [r5, #64] @ 0x40
|
|
__HAL_UNLOCK(hi2c);
|
|
8000da2: f885 303c strb.w r3, [r5, #60] @ 0x3c
|
|
return HAL_ERROR;
|
|
8000da6: 2001 movs r0, #1
|
|
8000da8: e7ee b.n 8000d88 <I2C_WaitOnRXNEFlagUntilTimeout+0x44>
|
|
return HAL_OK;
|
|
8000daa: 2000 movs r0, #0
|
|
8000dac: e7ec b.n 8000d88 <I2C_WaitOnRXNEFlagUntilTimeout+0x44>
|
|
...
|
|
|
|
08000db0 <HAL_I2C_Init>:
|
|
if (hi2c == NULL)
|
|
8000db0: 2800 cmp r0, #0
|
|
8000db2: f000 80cc beq.w 8000f4e <HAL_I2C_Init+0x19e>
|
|
{
|
|
8000db6: b570 push {r4, r5, r6, lr}
|
|
8000db8: 4604 mov r4, r0
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
8000dba: f890 303d ldrb.w r3, [r0, #61] @ 0x3d
|
|
8000dbe: 2b00 cmp r3, #0
|
|
8000dc0: d077 beq.n 8000eb2 <HAL_I2C_Init+0x102>
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
8000dc2: 2324 movs r3, #36 @ 0x24
|
|
8000dc4: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
8000dc8: 6822 ldr r2, [r4, #0]
|
|
8000dca: 6813 ldr r3, [r2, #0]
|
|
8000dcc: f023 0301 bic.w r3, r3, #1
|
|
8000dd0: 6013 str r3, [r2, #0]
|
|
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
|
8000dd2: 6822 ldr r2, [r4, #0]
|
|
8000dd4: 6813 ldr r3, [r2, #0]
|
|
8000dd6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8000dda: 6013 str r3, [r2, #0]
|
|
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
|
8000ddc: 6822 ldr r2, [r4, #0]
|
|
8000dde: 6813 ldr r3, [r2, #0]
|
|
8000de0: f423 4300 bic.w r3, r3, #32768 @ 0x8000
|
|
8000de4: 6013 str r3, [r2, #0]
|
|
pclk1 = HAL_RCC_GetPCLK1Freq();
|
|
8000de6: f000 fde5 bl 80019b4 <HAL_RCC_GetPCLK1Freq>
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
8000dea: 6862 ldr r2, [r4, #4]
|
|
8000dec: 4b5a ldr r3, [pc, #360] @ (8000f58 <HAL_I2C_Init+0x1a8>)
|
|
8000dee: 429a cmp r2, r3
|
|
8000df0: d864 bhi.n 8000ebc <HAL_I2C_Init+0x10c>
|
|
8000df2: 4b5a ldr r3, [pc, #360] @ (8000f5c <HAL_I2C_Init+0x1ac>)
|
|
8000df4: 4298 cmp r0, r3
|
|
8000df6: bf8c ite hi
|
|
8000df8: 2300 movhi r3, #0
|
|
8000dfa: 2301 movls r3, #1
|
|
8000dfc: 2b00 cmp r3, #0
|
|
8000dfe: f040 80a8 bne.w 8000f52 <HAL_I2C_Init+0x1a2>
|
|
freqrange = I2C_FREQRANGE(pclk1);
|
|
8000e02: 4957 ldr r1, [pc, #348] @ (8000f60 <HAL_I2C_Init+0x1b0>)
|
|
8000e04: fba1 3100 umull r3, r1, r1, r0
|
|
8000e08: 0c8b lsrs r3, r1, #18
|
|
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
|
8000e0a: 6825 ldr r5, [r4, #0]
|
|
8000e0c: 686a ldr r2, [r5, #4]
|
|
8000e0e: f022 023f bic.w r2, r2, #63 @ 0x3f
|
|
8000e12: ea42 4291 orr.w r2, r2, r1, lsr #18
|
|
8000e16: 606a str r2, [r5, #4]
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
8000e18: 6821 ldr r1, [r4, #0]
|
|
8000e1a: 6a0a ldr r2, [r1, #32]
|
|
8000e1c: f022 023f bic.w r2, r2, #63 @ 0x3f
|
|
8000e20: 6866 ldr r6, [r4, #4]
|
|
8000e22: 4d4d ldr r5, [pc, #308] @ (8000f58 <HAL_I2C_Init+0x1a8>)
|
|
8000e24: 42ae cmp r6, r5
|
|
8000e26: d84f bhi.n 8000ec8 <HAL_I2C_Init+0x118>
|
|
8000e28: 3301 adds r3, #1
|
|
8000e2a: 4313 orrs r3, r2
|
|
8000e2c: 620b str r3, [r1, #32]
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
8000e2e: 6821 ldr r1, [r4, #0]
|
|
8000e30: 69ca ldr r2, [r1, #28]
|
|
8000e32: f422 424f bic.w r2, r2, #52992 @ 0xcf00
|
|
8000e36: f022 02ff bic.w r2, r2, #255 @ 0xff
|
|
8000e3a: 6865 ldr r5, [r4, #4]
|
|
8000e3c: 4b46 ldr r3, [pc, #280] @ (8000f58 <HAL_I2C_Init+0x1a8>)
|
|
8000e3e: 429d cmp r5, r3
|
|
8000e40: d84c bhi.n 8000edc <HAL_I2C_Init+0x12c>
|
|
8000e42: 1e43 subs r3, r0, #1
|
|
8000e44: 006d lsls r5, r5, #1
|
|
8000e46: fbb3 f3f5 udiv r3, r3, r5
|
|
8000e4a: 3301 adds r3, #1
|
|
8000e4c: f640 70fc movw r0, #4092 @ 0xffc
|
|
8000e50: 4203 tst r3, r0
|
|
8000e52: d078 beq.n 8000f46 <HAL_I2C_Init+0x196>
|
|
8000e54: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000e58: 431a orrs r2, r3
|
|
8000e5a: 61ca str r2, [r1, #28]
|
|
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
|
8000e5c: 6821 ldr r1, [r4, #0]
|
|
8000e5e: 680b ldr r3, [r1, #0]
|
|
8000e60: f023 03c0 bic.w r3, r3, #192 @ 0xc0
|
|
8000e64: 69e2 ldr r2, [r4, #28]
|
|
8000e66: 6a20 ldr r0, [r4, #32]
|
|
8000e68: 4302 orrs r2, r0
|
|
8000e6a: 4313 orrs r3, r2
|
|
8000e6c: 600b str r3, [r1, #0]
|
|
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
|
8000e6e: 6821 ldr r1, [r4, #0]
|
|
8000e70: 688b ldr r3, [r1, #8]
|
|
8000e72: f423 4303 bic.w r3, r3, #33536 @ 0x8300
|
|
8000e76: f023 03ff bic.w r3, r3, #255 @ 0xff
|
|
8000e7a: 6922 ldr r2, [r4, #16]
|
|
8000e7c: 68e0 ldr r0, [r4, #12]
|
|
8000e7e: 4302 orrs r2, r0
|
|
8000e80: 4313 orrs r3, r2
|
|
8000e82: 608b str r3, [r1, #8]
|
|
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
|
8000e84: 6821 ldr r1, [r4, #0]
|
|
8000e86: 68cb ldr r3, [r1, #12]
|
|
8000e88: f023 03ff bic.w r3, r3, #255 @ 0xff
|
|
8000e8c: 6962 ldr r2, [r4, #20]
|
|
8000e8e: 69a0 ldr r0, [r4, #24]
|
|
8000e90: 4302 orrs r2, r0
|
|
8000e92: 4313 orrs r3, r2
|
|
8000e94: 60cb str r3, [r1, #12]
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8000e96: 6822 ldr r2, [r4, #0]
|
|
8000e98: 6813 ldr r3, [r2, #0]
|
|
8000e9a: f043 0301 orr.w r3, r3, #1
|
|
8000e9e: 6013 str r3, [r2, #0]
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8000ea0: 2000 movs r0, #0
|
|
8000ea2: 6420 str r0, [r4, #64] @ 0x40
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8000ea4: 2320 movs r3, #32
|
|
8000ea6: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8000eaa: 6320 str r0, [r4, #48] @ 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8000eac: f884 003e strb.w r0, [r4, #62] @ 0x3e
|
|
}
|
|
8000eb0: bd70 pop {r4, r5, r6, pc}
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
8000eb2: f880 303c strb.w r3, [r0, #60] @ 0x3c
|
|
HAL_I2C_MspInit(hi2c);
|
|
8000eb6: f000 ffa9 bl 8001e0c <HAL_I2C_MspInit>
|
|
8000eba: e782 b.n 8000dc2 <HAL_I2C_Init+0x12>
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
8000ebc: 4b29 ldr r3, [pc, #164] @ (8000f64 <HAL_I2C_Init+0x1b4>)
|
|
8000ebe: 4298 cmp r0, r3
|
|
8000ec0: bf8c ite hi
|
|
8000ec2: 2300 movhi r3, #0
|
|
8000ec4: 2301 movls r3, #1
|
|
8000ec6: e799 b.n 8000dfc <HAL_I2C_Init+0x4c>
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
8000ec8: f44f 7596 mov.w r5, #300 @ 0x12c
|
|
8000ecc: fb05 f303 mul.w r3, r5, r3
|
|
8000ed0: 4d25 ldr r5, [pc, #148] @ (8000f68 <HAL_I2C_Init+0x1b8>)
|
|
8000ed2: fba5 5303 umull r5, r3, r5, r3
|
|
8000ed6: 099b lsrs r3, r3, #6
|
|
8000ed8: 3301 adds r3, #1
|
|
8000eda: e7a6 b.n 8000e2a <HAL_I2C_Init+0x7a>
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
8000edc: 68a6 ldr r6, [r4, #8]
|
|
8000ede: b9be cbnz r6, 8000f10 <HAL_I2C_Init+0x160>
|
|
8000ee0: 1e43 subs r3, r0, #1
|
|
8000ee2: eb05 0c45 add.w ip, r5, r5, lsl #1
|
|
8000ee6: fbb3 f3fc udiv r3, r3, ip
|
|
8000eea: 3301 adds r3, #1
|
|
8000eec: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000ef0: fab3 f383 clz r3, r3
|
|
8000ef4: 095b lsrs r3, r3, #5
|
|
8000ef6: bb43 cbnz r3, 8000f4a <HAL_I2C_Init+0x19a>
|
|
8000ef8: b9c6 cbnz r6, 8000f2c <HAL_I2C_Init+0x17c>
|
|
8000efa: 1e43 subs r3, r0, #1
|
|
8000efc: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
8000f00: fbb3 f3f5 udiv r3, r3, r5
|
|
8000f04: 3301 adds r3, #1
|
|
8000f06: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000f0a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
|
|
8000f0e: e7a3 b.n 8000e58 <HAL_I2C_Init+0xa8>
|
|
8000f10: 1e43 subs r3, r0, #1
|
|
8000f12: eb05 0c85 add.w ip, r5, r5, lsl #2
|
|
8000f16: eb0c 0c8c add.w ip, ip, ip, lsl #2
|
|
8000f1a: fbb3 f3fc udiv r3, r3, ip
|
|
8000f1e: 3301 adds r3, #1
|
|
8000f20: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000f24: fab3 f383 clz r3, r3
|
|
8000f28: 095b lsrs r3, r3, #5
|
|
8000f2a: e7e4 b.n 8000ef6 <HAL_I2C_Init+0x146>
|
|
8000f2c: 1e43 subs r3, r0, #1
|
|
8000f2e: eb05 0585 add.w r5, r5, r5, lsl #2
|
|
8000f32: eb05 0585 add.w r5, r5, r5, lsl #2
|
|
8000f36: fbb3 f3f5 udiv r3, r3, r5
|
|
8000f3a: 3301 adds r3, #1
|
|
8000f3c: f3c3 030b ubfx r3, r3, #0, #12
|
|
8000f40: f443 4340 orr.w r3, r3, #49152 @ 0xc000
|
|
8000f44: e788 b.n 8000e58 <HAL_I2C_Init+0xa8>
|
|
8000f46: 2304 movs r3, #4
|
|
8000f48: e786 b.n 8000e58 <HAL_I2C_Init+0xa8>
|
|
8000f4a: 2301 movs r3, #1
|
|
8000f4c: e784 b.n 8000e58 <HAL_I2C_Init+0xa8>
|
|
return HAL_ERROR;
|
|
8000f4e: 2001 movs r0, #1
|
|
}
|
|
8000f50: 4770 bx lr
|
|
return HAL_ERROR;
|
|
8000f52: 2001 movs r0, #1
|
|
8000f54: e7ac b.n 8000eb0 <HAL_I2C_Init+0x100>
|
|
8000f56: bf00 nop
|
|
8000f58: 000186a0 .word 0x000186a0
|
|
8000f5c: 001e847f .word 0x001e847f
|
|
8000f60: 431bde83 .word 0x431bde83
|
|
8000f64: 003d08ff .word 0x003d08ff
|
|
8000f68: 10624dd3 .word 0x10624dd3
|
|
|
|
08000f6c <HAL_I2C_Mem_Write>:
|
|
{
|
|
8000f6c: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8000f70: b083 sub sp, #12
|
|
8000f72: 4604 mov r4, r0
|
|
8000f74: 460f mov r7, r1
|
|
8000f76: 4690 mov r8, r2
|
|
8000f78: 4699 mov r9, r3
|
|
8000f7a: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8000f7c: f7ff fb60 bl 8000640 <HAL_GetTick>
|
|
8000f80: 4605 mov r5, r0
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
8000f82: f894 003d ldrb.w r0, [r4, #61] @ 0x3d
|
|
8000f86: b2c0 uxtb r0, r0
|
|
8000f88: 2820 cmp r0, #32
|
|
8000f8a: d003 beq.n 8000f94 <HAL_I2C_Mem_Write+0x28>
|
|
return HAL_BUSY;
|
|
8000f8c: 2002 movs r0, #2
|
|
}
|
|
8000f8e: b003 add sp, #12
|
|
8000f90: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
8000f94: 9500 str r5, [sp, #0]
|
|
8000f96: 2319 movs r3, #25
|
|
8000f98: 2201 movs r2, #1
|
|
8000f9a: 494b ldr r1, [pc, #300] @ (80010c8 <HAL_I2C_Mem_Write+0x15c>)
|
|
8000f9c: 4620 mov r0, r4
|
|
8000f9e: f7ff fcd4 bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8000fa2: 2800 cmp r0, #0
|
|
8000fa4: f040 8089 bne.w 80010ba <HAL_I2C_Mem_Write+0x14e>
|
|
__HAL_LOCK(hi2c);
|
|
8000fa8: f894 303c ldrb.w r3, [r4, #60] @ 0x3c
|
|
8000fac: 2b01 cmp r3, #1
|
|
8000fae: f000 8086 beq.w 80010be <HAL_I2C_Mem_Write+0x152>
|
|
8000fb2: 2301 movs r3, #1
|
|
8000fb4: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
8000fb8: 6823 ldr r3, [r4, #0]
|
|
8000fba: 681a ldr r2, [r3, #0]
|
|
8000fbc: f012 0f01 tst.w r2, #1
|
|
8000fc0: d103 bne.n 8000fca <HAL_I2C_Mem_Write+0x5e>
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8000fc2: 681a ldr r2, [r3, #0]
|
|
8000fc4: f042 0201 orr.w r2, r2, #1
|
|
8000fc8: 601a str r2, [r3, #0]
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8000fca: 6822 ldr r2, [r4, #0]
|
|
8000fcc: 6813 ldr r3, [r2, #0]
|
|
8000fce: f423 6300 bic.w r3, r3, #2048 @ 0x800
|
|
8000fd2: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
|
8000fd4: 2321 movs r3, #33 @ 0x21
|
|
8000fd6: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
8000fda: 2340 movs r3, #64 @ 0x40
|
|
8000fdc: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8000fe0: 2300 movs r3, #0
|
|
8000fe2: 6423 str r3, [r4, #64] @ 0x40
|
|
hi2c->pBuffPtr = pData;
|
|
8000fe4: 9b0a ldr r3, [sp, #40] @ 0x28
|
|
8000fe6: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
8000fe8: f8bd 302c ldrh.w r3, [sp, #44] @ 0x2c
|
|
8000fec: 8563 strh r3, [r4, #42] @ 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8000fee: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8000ff0: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
8000ff2: 4b36 ldr r3, [pc, #216] @ (80010cc <HAL_I2C_Mem_Write+0x160>)
|
|
8000ff4: 62e3 str r3, [r4, #44] @ 0x2c
|
|
if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
8000ff6: 9501 str r5, [sp, #4]
|
|
8000ff8: 9600 str r6, [sp, #0]
|
|
8000ffa: 464b mov r3, r9
|
|
8000ffc: 4642 mov r2, r8
|
|
8000ffe: 4639 mov r1, r7
|
|
8001000: 4620 mov r0, r4
|
|
8001002: f7ff fd5f bl 8000ac4 <I2C_RequestMemoryWrite>
|
|
8001006: 2800 cmp r0, #0
|
|
8001008: d15b bne.n 80010c2 <HAL_I2C_Mem_Write+0x156>
|
|
while (hi2c->XferSize > 0U)
|
|
800100a: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
800100c: 2b00 cmp r3, #0
|
|
800100e: d035 beq.n 800107c <HAL_I2C_Mem_Write+0x110>
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8001010: 462a mov r2, r5
|
|
8001012: 4631 mov r1, r6
|
|
8001014: 4620 mov r0, r4
|
|
8001016: f7ff fd2b bl 8000a70 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
800101a: bb20 cbnz r0, 8001066 <HAL_I2C_Mem_Write+0xfa>
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
800101c: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
800101e: 6823 ldr r3, [r4, #0]
|
|
8001020: 7812 ldrb r2, [r2, #0]
|
|
8001022: 611a str r2, [r3, #16]
|
|
hi2c->pBuffPtr++;
|
|
8001024: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
8001026: 1c53 adds r3, r2, #1
|
|
8001028: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
800102a: 8d21 ldrh r1, [r4, #40] @ 0x28
|
|
800102c: 3901 subs r1, #1
|
|
800102e: b289 uxth r1, r1
|
|
8001030: 8521 strh r1, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001032: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001034: b29b uxth r3, r3
|
|
8001036: 3b01 subs r3, #1
|
|
8001038: b29b uxth r3, r3
|
|
800103a: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
|
800103c: 6823 ldr r3, [r4, #0]
|
|
800103e: 6958 ldr r0, [r3, #20]
|
|
8001040: f010 0f04 tst.w r0, #4
|
|
8001044: d0e1 beq.n 800100a <HAL_I2C_Mem_Write+0x9e>
|
|
8001046: 2900 cmp r1, #0
|
|
8001048: d0df beq.n 800100a <HAL_I2C_Mem_Write+0x9e>
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
800104a: 7852 ldrb r2, [r2, #1]
|
|
800104c: 611a str r2, [r3, #16]
|
|
hi2c->pBuffPtr++;
|
|
800104e: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001050: 3301 adds r3, #1
|
|
8001052: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001054: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001056: 3b01 subs r3, #1
|
|
8001058: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
800105a: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
800105c: b29b uxth r3, r3
|
|
800105e: 3b01 subs r3, #1
|
|
8001060: b29b uxth r3, r3
|
|
8001062: 8563 strh r3, [r4, #42] @ 0x2a
|
|
8001064: e7d1 b.n 800100a <HAL_I2C_Mem_Write+0x9e>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8001066: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8001068: 2b04 cmp r3, #4
|
|
800106a: d001 beq.n 8001070 <HAL_I2C_Mem_Write+0x104>
|
|
return HAL_ERROR;
|
|
800106c: 2001 movs r0, #1
|
|
800106e: e78e b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001070: 6822 ldr r2, [r4, #0]
|
|
8001072: 6813 ldr r3, [r2, #0]
|
|
8001074: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8001078: 6013 str r3, [r2, #0]
|
|
800107a: e7f7 b.n 800106c <HAL_I2C_Mem_Write+0x100>
|
|
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
800107c: 462a mov r2, r5
|
|
800107e: 4631 mov r1, r6
|
|
8001080: 4620 mov r0, r4
|
|
8001082: f7ff fe35 bl 8000cf0 <I2C_WaitOnBTFFlagUntilTimeout>
|
|
8001086: b150 cbz r0, 800109e <HAL_I2C_Mem_Write+0x132>
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
8001088: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
800108a: 2b04 cmp r3, #4
|
|
800108c: d001 beq.n 8001092 <HAL_I2C_Mem_Write+0x126>
|
|
return HAL_ERROR;
|
|
800108e: 2001 movs r0, #1
|
|
8001090: e77d b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001092: 6822 ldr r2, [r4, #0]
|
|
8001094: 6813 ldr r3, [r2, #0]
|
|
8001096: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
800109a: 6013 str r3, [r2, #0]
|
|
800109c: e7f7 b.n 800108e <HAL_I2C_Mem_Write+0x122>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800109e: 6822 ldr r2, [r4, #0]
|
|
80010a0: 6813 ldr r3, [r2, #0]
|
|
80010a2: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
80010a6: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80010a8: 2320 movs r3, #32
|
|
80010aa: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80010ae: 2300 movs r3, #0
|
|
80010b0: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
__HAL_UNLOCK(hi2c);
|
|
80010b4: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_OK;
|
|
80010b8: e769 b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
return HAL_BUSY;
|
|
80010ba: 2002 movs r0, #2
|
|
80010bc: e767 b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
__HAL_LOCK(hi2c);
|
|
80010be: 2002 movs r0, #2
|
|
80010c0: e765 b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
return HAL_ERROR;
|
|
80010c2: 2001 movs r0, #1
|
|
80010c4: e763 b.n 8000f8e <HAL_I2C_Mem_Write+0x22>
|
|
80010c6: bf00 nop
|
|
80010c8: 00100002 .word 0x00100002
|
|
80010cc: ffff0000 .word 0xffff0000
|
|
|
|
080010d0 <HAL_I2C_Mem_Read>:
|
|
{
|
|
80010d0: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
80010d4: b087 sub sp, #28
|
|
80010d6: 4604 mov r4, r0
|
|
80010d8: 460f mov r7, r1
|
|
80010da: 4690 mov r8, r2
|
|
80010dc: 4699 mov r9, r3
|
|
80010de: 9e10 ldr r6, [sp, #64] @ 0x40
|
|
uint32_t tickstart = HAL_GetTick();
|
|
80010e0: f7ff faae bl 8000640 <HAL_GetTick>
|
|
80010e4: 4605 mov r5, r0
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
80010e6: f894 003d ldrb.w r0, [r4, #61] @ 0x3d
|
|
80010ea: b2c0 uxtb r0, r0
|
|
80010ec: 2820 cmp r0, #32
|
|
80010ee: d004 beq.n 80010fa <HAL_I2C_Mem_Read+0x2a>
|
|
return HAL_BUSY;
|
|
80010f0: 2702 movs r7, #2
|
|
}
|
|
80010f2: 4638 mov r0, r7
|
|
80010f4: b007 add sp, #28
|
|
80010f6: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
80010fa: 9500 str r5, [sp, #0]
|
|
80010fc: 2319 movs r3, #25
|
|
80010fe: 2201 movs r2, #1
|
|
8001100: 4988 ldr r1, [pc, #544] @ (8001324 <HAL_I2C_Mem_Read+0x254>)
|
|
8001102: 4620 mov r0, r4
|
|
8001104: f7ff fc21 bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8001108: 2800 cmp r0, #0
|
|
800110a: f040 8143 bne.w 8001394 <HAL_I2C_Mem_Read+0x2c4>
|
|
__HAL_LOCK(hi2c);
|
|
800110e: f894 303c ldrb.w r3, [r4, #60] @ 0x3c
|
|
8001112: 2b01 cmp r3, #1
|
|
8001114: f000 8140 beq.w 8001398 <HAL_I2C_Mem_Read+0x2c8>
|
|
8001118: 2301 movs r3, #1
|
|
800111a: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
800111e: 6823 ldr r3, [r4, #0]
|
|
8001120: 681a ldr r2, [r3, #0]
|
|
8001122: f012 0f01 tst.w r2, #1
|
|
8001126: d103 bne.n 8001130 <HAL_I2C_Mem_Read+0x60>
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8001128: 681a ldr r2, [r3, #0]
|
|
800112a: f042 0201 orr.w r2, r2, #1
|
|
800112e: 601a str r2, [r3, #0]
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8001130: 6822 ldr r2, [r4, #0]
|
|
8001132: 6813 ldr r3, [r2, #0]
|
|
8001134: f423 6300 bic.w r3, r3, #2048 @ 0x800
|
|
8001138: 6013 str r3, [r2, #0]
|
|
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
|
800113a: 2322 movs r3, #34 @ 0x22
|
|
800113c: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MEM;
|
|
8001140: 2340 movs r3, #64 @ 0x40
|
|
8001142: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
8001146: 2300 movs r3, #0
|
|
8001148: 6423 str r3, [r4, #64] @ 0x40
|
|
hi2c->pBuffPtr = pData;
|
|
800114a: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
800114c: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferCount = Size;
|
|
800114e: f8bd 303c ldrh.w r3, [sp, #60] @ 0x3c
|
|
8001152: 8563 strh r3, [r4, #42] @ 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
8001154: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001156: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
8001158: 4b73 ldr r3, [pc, #460] @ (8001328 <HAL_I2C_Mem_Read+0x258>)
|
|
800115a: 62e3 str r3, [r4, #44] @ 0x2c
|
|
if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
|
|
800115c: 9501 str r5, [sp, #4]
|
|
800115e: 9600 str r6, [sp, #0]
|
|
8001160: 464b mov r3, r9
|
|
8001162: 4642 mov r2, r8
|
|
8001164: 4639 mov r1, r7
|
|
8001166: 4620 mov r0, r4
|
|
8001168: f7ff fd18 bl 8000b9c <I2C_RequestMemoryRead>
|
|
800116c: 4607 mov r7, r0
|
|
800116e: 2800 cmp r0, #0
|
|
8001170: f040 8114 bne.w 800139c <HAL_I2C_Mem_Read+0x2cc>
|
|
if (hi2c->XferSize == 0U)
|
|
8001174: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001176: b95b cbnz r3, 8001190 <HAL_I2C_Mem_Read+0xc0>
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8001178: 9302 str r3, [sp, #8]
|
|
800117a: 6823 ldr r3, [r4, #0]
|
|
800117c: 695a ldr r2, [r3, #20]
|
|
800117e: 9202 str r2, [sp, #8]
|
|
8001180: 699a ldr r2, [r3, #24]
|
|
8001182: 9202 str r2, [sp, #8]
|
|
8001184: 9a02 ldr r2, [sp, #8]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001186: 681a ldr r2, [r3, #0]
|
|
8001188: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
800118c: 601a str r2, [r3, #0]
|
|
800118e: e075 b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
else if (hi2c->XferSize == 1U)
|
|
8001190: 2b01 cmp r3, #1
|
|
8001192: d00a beq.n 80011aa <HAL_I2C_Mem_Read+0xda>
|
|
else if (hi2c->XferSize == 2U)
|
|
8001194: 2b02 cmp r3, #2
|
|
8001196: d01a beq.n 80011ce <HAL_I2C_Mem_Read+0xfe>
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8001198: 2300 movs r3, #0
|
|
800119a: 9305 str r3, [sp, #20]
|
|
800119c: 6823 ldr r3, [r4, #0]
|
|
800119e: 695a ldr r2, [r3, #20]
|
|
80011a0: 9205 str r2, [sp, #20]
|
|
80011a2: 699b ldr r3, [r3, #24]
|
|
80011a4: 9305 str r3, [sp, #20]
|
|
80011a6: 9b05 ldr r3, [sp, #20]
|
|
80011a8: e068 b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80011aa: 6822 ldr r2, [r4, #0]
|
|
80011ac: 6813 ldr r3, [r2, #0]
|
|
80011ae: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
80011b2: 6013 str r3, [r2, #0]
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80011b4: 2300 movs r3, #0
|
|
80011b6: 9303 str r3, [sp, #12]
|
|
80011b8: 6823 ldr r3, [r4, #0]
|
|
80011ba: 695a ldr r2, [r3, #20]
|
|
80011bc: 9203 str r2, [sp, #12]
|
|
80011be: 699a ldr r2, [r3, #24]
|
|
80011c0: 9203 str r2, [sp, #12]
|
|
80011c2: 9a03 ldr r2, [sp, #12]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80011c4: 681a ldr r2, [r3, #0]
|
|
80011c6: f442 7200 orr.w r2, r2, #512 @ 0x200
|
|
80011ca: 601a str r2, [r3, #0]
|
|
80011cc: e056 b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80011ce: 6822 ldr r2, [r4, #0]
|
|
80011d0: 6813 ldr r3, [r2, #0]
|
|
80011d2: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
80011d6: 6013 str r3, [r2, #0]
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
80011d8: 6822 ldr r2, [r4, #0]
|
|
80011da: 6813 ldr r3, [r2, #0]
|
|
80011dc: f443 6300 orr.w r3, r3, #2048 @ 0x800
|
|
80011e0: 6013 str r3, [r2, #0]
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80011e2: 2300 movs r3, #0
|
|
80011e4: 9304 str r3, [sp, #16]
|
|
80011e6: 6823 ldr r3, [r4, #0]
|
|
80011e8: 695a ldr r2, [r3, #20]
|
|
80011ea: 9204 str r2, [sp, #16]
|
|
80011ec: 699b ldr r3, [r3, #24]
|
|
80011ee: 9304 str r3, [sp, #16]
|
|
80011f0: 9b04 ldr r3, [sp, #16]
|
|
80011f2: e043 b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80011f4: 462a mov r2, r5
|
|
80011f6: 4631 mov r1, r6
|
|
80011f8: 4620 mov r0, r4
|
|
80011fa: f7ff fda3 bl 8000d44 <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
80011fe: 2800 cmp r0, #0
|
|
8001200: f040 80ce bne.w 80013a0 <HAL_I2C_Mem_Read+0x2d0>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001204: 6823 ldr r3, [r4, #0]
|
|
8001206: 691a ldr r2, [r3, #16]
|
|
8001208: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800120a: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
800120c: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800120e: 3301 adds r3, #1
|
|
8001210: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001212: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001214: 3b01 subs r3, #1
|
|
8001216: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001218: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
800121a: b29b uxth r3, r3
|
|
800121c: 3b01 subs r3, #1
|
|
800121e: b29b uxth r3, r3
|
|
8001220: 8563 strh r3, [r4, #42] @ 0x2a
|
|
8001222: e02b b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
8001224: 9500 str r5, [sp, #0]
|
|
8001226: 4633 mov r3, r6
|
|
8001228: 2200 movs r2, #0
|
|
800122a: 4940 ldr r1, [pc, #256] @ (800132c <HAL_I2C_Mem_Read+0x25c>)
|
|
800122c: 4620 mov r0, r4
|
|
800122e: f7ff fb8c bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
8001232: 2800 cmp r0, #0
|
|
8001234: f040 80b6 bne.w 80013a4 <HAL_I2C_Mem_Read+0x2d4>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8001238: 6822 ldr r2, [r4, #0]
|
|
800123a: 6813 ldr r3, [r2, #0]
|
|
800123c: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
8001240: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001242: 6823 ldr r3, [r4, #0]
|
|
8001244: 691a ldr r2, [r3, #16]
|
|
8001246: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001248: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
800124a: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
800124c: 1c53 adds r3, r2, #1
|
|
800124e: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001250: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001252: 3b01 subs r3, #1
|
|
8001254: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001256: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001258: b29b uxth r3, r3
|
|
800125a: 3b01 subs r3, #1
|
|
800125c: b29b uxth r3, r3
|
|
800125e: 8563 strh r3, [r4, #42] @ 0x2a
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001260: 6823 ldr r3, [r4, #0]
|
|
8001262: 691b ldr r3, [r3, #16]
|
|
8001264: 7053 strb r3, [r2, #1]
|
|
hi2c->pBuffPtr++;
|
|
8001266: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001268: 3301 adds r3, #1
|
|
800126a: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
800126c: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
800126e: 3b01 subs r3, #1
|
|
8001270: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001272: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001274: b29b uxth r3, r3
|
|
8001276: 3b01 subs r3, #1
|
|
8001278: b29b uxth r3, r3
|
|
800127a: 8563 strh r3, [r4, #42] @ 0x2a
|
|
while (hi2c->XferSize > 0U)
|
|
800127c: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
800127e: 2b00 cmp r3, #0
|
|
8001280: d07f beq.n 8001382 <HAL_I2C_Mem_Read+0x2b2>
|
|
if (hi2c->XferSize <= 3U)
|
|
8001282: 2b03 cmp r3, #3
|
|
8001284: d854 bhi.n 8001330 <HAL_I2C_Mem_Read+0x260>
|
|
if (hi2c->XferSize == 1U)
|
|
8001286: 2b01 cmp r3, #1
|
|
8001288: d0b4 beq.n 80011f4 <HAL_I2C_Mem_Read+0x124>
|
|
else if (hi2c->XferSize == 2U)
|
|
800128a: 2b02 cmp r3, #2
|
|
800128c: d0ca beq.n 8001224 <HAL_I2C_Mem_Read+0x154>
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
800128e: 9500 str r5, [sp, #0]
|
|
8001290: 4633 mov r3, r6
|
|
8001292: 2200 movs r2, #0
|
|
8001294: 4925 ldr r1, [pc, #148] @ (800132c <HAL_I2C_Mem_Read+0x25c>)
|
|
8001296: 4620 mov r0, r4
|
|
8001298: f7ff fb57 bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
800129c: 2800 cmp r0, #0
|
|
800129e: f040 8083 bne.w 80013a8 <HAL_I2C_Mem_Read+0x2d8>
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80012a2: 6822 ldr r2, [r4, #0]
|
|
80012a4: 6813 ldr r3, [r2, #0]
|
|
80012a6: f423 6380 bic.w r3, r3, #1024 @ 0x400
|
|
80012aa: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80012ac: 6823 ldr r3, [r4, #0]
|
|
80012ae: 691a ldr r2, [r3, #16]
|
|
80012b0: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012b2: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
80012b4: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012b6: 3301 adds r3, #1
|
|
80012b8: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80012ba: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80012bc: 3b01 subs r3, #1
|
|
80012be: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80012c0: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80012c2: b29b uxth r3, r3
|
|
80012c4: 3b01 subs r3, #1
|
|
80012c6: b29b uxth r3, r3
|
|
80012c8: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
80012ca: 9500 str r5, [sp, #0]
|
|
80012cc: 4633 mov r3, r6
|
|
80012ce: 2200 movs r2, #0
|
|
80012d0: 4916 ldr r1, [pc, #88] @ (800132c <HAL_I2C_Mem_Read+0x25c>)
|
|
80012d2: 4620 mov r0, r4
|
|
80012d4: f7ff fb39 bl 800094a <I2C_WaitOnFlagUntilTimeout>
|
|
80012d8: 2800 cmp r0, #0
|
|
80012da: d167 bne.n 80013ac <HAL_I2C_Mem_Read+0x2dc>
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80012dc: 6822 ldr r2, [r4, #0]
|
|
80012de: 6813 ldr r3, [r2, #0]
|
|
80012e0: f443 7300 orr.w r3, r3, #512 @ 0x200
|
|
80012e4: 6013 str r3, [r2, #0]
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80012e6: 6823 ldr r3, [r4, #0]
|
|
80012e8: 691a ldr r2, [r3, #16]
|
|
80012ea: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
80012ec: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
80012ee: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
80012f0: 1c53 adds r3, r2, #1
|
|
80012f2: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
80012f4: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
80012f6: 3b01 subs r3, #1
|
|
80012f8: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
80012fa: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
80012fc: b29b uxth r3, r3
|
|
80012fe: 3b01 subs r3, #1
|
|
8001300: b29b uxth r3, r3
|
|
8001302: 8563 strh r3, [r4, #42] @ 0x2a
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001304: 6823 ldr r3, [r4, #0]
|
|
8001306: 691b ldr r3, [r3, #16]
|
|
8001308: 7053 strb r3, [r2, #1]
|
|
hi2c->pBuffPtr++;
|
|
800130a: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800130c: 3301 adds r3, #1
|
|
800130e: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001310: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001312: 3b01 subs r3, #1
|
|
8001314: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001316: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001318: b29b uxth r3, r3
|
|
800131a: 3b01 subs r3, #1
|
|
800131c: b29b uxth r3, r3
|
|
800131e: 8563 strh r3, [r4, #42] @ 0x2a
|
|
8001320: e7ac b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
8001322: bf00 nop
|
|
8001324: 00100002 .word 0x00100002
|
|
8001328: ffff0000 .word 0xffff0000
|
|
800132c: 00010004 .word 0x00010004
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8001330: 462a mov r2, r5
|
|
8001332: 4631 mov r1, r6
|
|
8001334: 4620 mov r0, r4
|
|
8001336: f7ff fd05 bl 8000d44 <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
800133a: 2800 cmp r0, #0
|
|
800133c: d138 bne.n 80013b0 <HAL_I2C_Mem_Read+0x2e0>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
800133e: 6823 ldr r3, [r4, #0]
|
|
8001340: 691a ldr r2, [r3, #16]
|
|
8001342: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
8001344: 701a strb r2, [r3, #0]
|
|
hi2c->pBuffPtr++;
|
|
8001346: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
8001348: 1c53 adds r3, r2, #1
|
|
800134a: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
800134c: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
800134e: 3b01 subs r3, #1
|
|
8001350: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001352: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001354: b29b uxth r3, r3
|
|
8001356: 3b01 subs r3, #1
|
|
8001358: b29b uxth r3, r3
|
|
800135a: 8563 strh r3, [r4, #42] @ 0x2a
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
|
800135c: 6823 ldr r3, [r4, #0]
|
|
800135e: 6959 ldr r1, [r3, #20]
|
|
8001360: f011 0f04 tst.w r1, #4
|
|
8001364: d08a beq.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8001366: 691b ldr r3, [r3, #16]
|
|
8001368: 7053 strb r3, [r2, #1]
|
|
hi2c->pBuffPtr++;
|
|
800136a: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
800136c: 3301 adds r3, #1
|
|
800136e: 6263 str r3, [r4, #36] @ 0x24
|
|
hi2c->XferSize--;
|
|
8001370: 8d23 ldrh r3, [r4, #40] @ 0x28
|
|
8001372: 3b01 subs r3, #1
|
|
8001374: 8523 strh r3, [r4, #40] @ 0x28
|
|
hi2c->XferCount--;
|
|
8001376: 8d63 ldrh r3, [r4, #42] @ 0x2a
|
|
8001378: b29b uxth r3, r3
|
|
800137a: 3b01 subs r3, #1
|
|
800137c: b29b uxth r3, r3
|
|
800137e: 8563 strh r3, [r4, #42] @ 0x2a
|
|
8001380: e77c b.n 800127c <HAL_I2C_Mem_Read+0x1ac>
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8001382: 2320 movs r3, #32
|
|
8001384: f884 303d strb.w r3, [r4, #61] @ 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8001388: 2300 movs r3, #0
|
|
800138a: f884 303e strb.w r3, [r4, #62] @ 0x3e
|
|
__HAL_UNLOCK(hi2c);
|
|
800138e: f884 303c strb.w r3, [r4, #60] @ 0x3c
|
|
return HAL_OK;
|
|
8001392: e6ae b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_BUSY;
|
|
8001394: 2702 movs r7, #2
|
|
8001396: e6ac b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
__HAL_LOCK(hi2c);
|
|
8001398: 2702 movs r7, #2
|
|
800139a: e6aa b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
800139c: 2701 movs r7, #1
|
|
800139e: e6a8 b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
80013a0: 2701 movs r7, #1
|
|
80013a2: e6a6 b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
80013a4: 2701 movs r7, #1
|
|
80013a6: e6a4 b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
80013a8: 2701 movs r7, #1
|
|
80013aa: e6a2 b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
80013ac: 2701 movs r7, #1
|
|
80013ae: e6a0 b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
return HAL_ERROR;
|
|
80013b0: 2701 movs r7, #1
|
|
80013b2: e69e b.n 80010f2 <HAL_I2C_Mem_Read+0x22>
|
|
|
|
080013b4 <HAL_RCC_OscConfig>:
|
|
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
uint32_t tickstart, pll_config;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_OscInitStruct == NULL)
|
|
80013b4: 2800 cmp r0, #0
|
|
80013b6: f000 81da beq.w 800176e <HAL_RCC_OscConfig+0x3ba>
|
|
{
|
|
80013ba: b570 push {r4, r5, r6, lr}
|
|
80013bc: b082 sub sp, #8
|
|
80013be: 4604 mov r4, r0
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
80013c0: 6803 ldr r3, [r0, #0]
|
|
80013c2: f013 0f01 tst.w r3, #1
|
|
80013c6: d03b beq.n 8001440 <HAL_RCC_OscConfig+0x8c>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
|
|
80013c8: 4b9f ldr r3, [pc, #636] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80013ca: 689b ldr r3, [r3, #8]
|
|
80013cc: f003 030c and.w r3, r3, #12
|
|
80013d0: 2b04 cmp r3, #4
|
|
80013d2: d02c beq.n 800142e <HAL_RCC_OscConfig+0x7a>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
80013d4: 4b9c ldr r3, [pc, #624] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80013d6: 689b ldr r3, [r3, #8]
|
|
80013d8: f003 030c and.w r3, r3, #12
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
|
|
80013dc: 2b08 cmp r3, #8
|
|
80013de: d021 beq.n 8001424 <HAL_RCC_OscConfig+0x70>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
80013e0: 6863 ldr r3, [r4, #4]
|
|
80013e2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
|
|
80013e6: d04f beq.n 8001488 <HAL_RCC_OscConfig+0xd4>
|
|
80013e8: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
|
|
80013ec: d052 beq.n 8001494 <HAL_RCC_OscConfig+0xe0>
|
|
80013ee: 4b96 ldr r3, [pc, #600] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80013f0: 681a ldr r2, [r3, #0]
|
|
80013f2: f422 3280 bic.w r2, r2, #65536 @ 0x10000
|
|
80013f6: 601a str r2, [r3, #0]
|
|
80013f8: 681a ldr r2, [r3, #0]
|
|
80013fa: f422 2280 bic.w r2, r2, #262144 @ 0x40000
|
|
80013fe: 601a str r2, [r3, #0]
|
|
|
|
/* Check the HSE State */
|
|
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
|
|
8001400: 6863 ldr r3, [r4, #4]
|
|
8001402: 2b00 cmp r3, #0
|
|
8001404: d050 beq.n 80014a8 <HAL_RCC_OscConfig+0xf4>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001406: f7ff f91b bl 8000640 <HAL_GetTick>
|
|
800140a: 4605 mov r5, r0
|
|
|
|
/* Wait till HSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
800140c: 4b8e ldr r3, [pc, #568] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800140e: 681b ldr r3, [r3, #0]
|
|
8001410: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
8001414: d114 bne.n 8001440 <HAL_RCC_OscConfig+0x8c>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8001416: f7ff f913 bl 8000640 <HAL_GetTick>
|
|
800141a: 1b40 subs r0, r0, r5
|
|
800141c: 2864 cmp r0, #100 @ 0x64
|
|
800141e: d9f5 bls.n 800140c <HAL_RCC_OscConfig+0x58>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001420: 2003 movs r0, #3
|
|
8001422: e1ab b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
8001424: 4b88 ldr r3, [pc, #544] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001426: 685b ldr r3, [r3, #4]
|
|
8001428: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
800142c: d0d8 beq.n 80013e0 <HAL_RCC_OscConfig+0x2c>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
800142e: 4b86 ldr r3, [pc, #536] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001430: 681b ldr r3, [r3, #0]
|
|
8001432: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
8001436: d003 beq.n 8001440 <HAL_RCC_OscConfig+0x8c>
|
|
8001438: 6863 ldr r3, [r4, #4]
|
|
800143a: 2b00 cmp r3, #0
|
|
800143c: f000 8199 beq.w 8001772 <HAL_RCC_OscConfig+0x3be>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
8001440: 6823 ldr r3, [r4, #0]
|
|
8001442: f013 0f02 tst.w r3, #2
|
|
8001446: d054 beq.n 80014f2 <HAL_RCC_OscConfig+0x13e>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
|
|
8001448: 4b7f ldr r3, [pc, #508] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800144a: 689b ldr r3, [r3, #8]
|
|
800144c: f013 0f0c tst.w r3, #12
|
|
8001450: d03e beq.n 80014d0 <HAL_RCC_OscConfig+0x11c>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
8001452: 4b7d ldr r3, [pc, #500] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001454: 689b ldr r3, [r3, #8]
|
|
8001456: f003 030c and.w r3, r3, #12
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
|
|
800145a: 2b08 cmp r3, #8
|
|
800145c: d033 beq.n 80014c6 <HAL_RCC_OscConfig+0x112>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
|
|
800145e: 68e3 ldr r3, [r4, #12]
|
|
8001460: 2b00 cmp r3, #0
|
|
8001462: d068 beq.n 8001536 <HAL_RCC_OscConfig+0x182>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
8001464: 4b79 ldr r3, [pc, #484] @ (800164c <HAL_RCC_OscConfig+0x298>)
|
|
8001466: 2201 movs r2, #1
|
|
8001468: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
800146a: f7ff f8e9 bl 8000640 <HAL_GetTick>
|
|
800146e: 4605 mov r5, r0
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8001470: 4b75 ldr r3, [pc, #468] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001472: 681b ldr r3, [r3, #0]
|
|
8001474: f013 0f02 tst.w r3, #2
|
|
8001478: d154 bne.n 8001524 <HAL_RCC_OscConfig+0x170>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
800147a: f7ff f8e1 bl 8000640 <HAL_GetTick>
|
|
800147e: 1b40 subs r0, r0, r5
|
|
8001480: 2802 cmp r0, #2
|
|
8001482: d9f5 bls.n 8001470 <HAL_RCC_OscConfig+0xbc>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001484: 2003 movs r0, #3
|
|
8001486: e179 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
8001488: 4a6f ldr r2, [pc, #444] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800148a: 6813 ldr r3, [r2, #0]
|
|
800148c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
|
|
8001490: 6013 str r3, [r2, #0]
|
|
8001492: e7b5 b.n 8001400 <HAL_RCC_OscConfig+0x4c>
|
|
8001494: 4b6c ldr r3, [pc, #432] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001496: 681a ldr r2, [r3, #0]
|
|
8001498: f442 2280 orr.w r2, r2, #262144 @ 0x40000
|
|
800149c: 601a str r2, [r3, #0]
|
|
800149e: 681a ldr r2, [r3, #0]
|
|
80014a0: f442 3280 orr.w r2, r2, #65536 @ 0x10000
|
|
80014a4: 601a str r2, [r3, #0]
|
|
80014a6: e7ab b.n 8001400 <HAL_RCC_OscConfig+0x4c>
|
|
tickstart = HAL_GetTick();
|
|
80014a8: f7ff f8ca bl 8000640 <HAL_GetTick>
|
|
80014ac: 4605 mov r5, r0
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
80014ae: 4b66 ldr r3, [pc, #408] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80014b0: 681b ldr r3, [r3, #0]
|
|
80014b2: f413 3f00 tst.w r3, #131072 @ 0x20000
|
|
80014b6: d0c3 beq.n 8001440 <HAL_RCC_OscConfig+0x8c>
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
80014b8: f7ff f8c2 bl 8000640 <HAL_GetTick>
|
|
80014bc: 1b40 subs r0, r0, r5
|
|
80014be: 2864 cmp r0, #100 @ 0x64
|
|
80014c0: d9f5 bls.n 80014ae <HAL_RCC_OscConfig+0xfa>
|
|
return HAL_TIMEOUT;
|
|
80014c2: 2003 movs r0, #3
|
|
80014c4: e15a b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
80014c6: 4b60 ldr r3, [pc, #384] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80014c8: 685b ldr r3, [r3, #4]
|
|
80014ca: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
80014ce: d1c6 bne.n 800145e <HAL_RCC_OscConfig+0xaa>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
80014d0: 4b5d ldr r3, [pc, #372] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80014d2: 681b ldr r3, [r3, #0]
|
|
80014d4: f013 0f02 tst.w r3, #2
|
|
80014d8: d003 beq.n 80014e2 <HAL_RCC_OscConfig+0x12e>
|
|
80014da: 68e3 ldr r3, [r4, #12]
|
|
80014dc: 2b01 cmp r3, #1
|
|
80014de: f040 814a bne.w 8001776 <HAL_RCC_OscConfig+0x3c2>
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
80014e2: 4a59 ldr r2, [pc, #356] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80014e4: 6813 ldr r3, [r2, #0]
|
|
80014e6: f023 03f8 bic.w r3, r3, #248 @ 0xf8
|
|
80014ea: 6921 ldr r1, [r4, #16]
|
|
80014ec: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
80014f0: 6013 str r3, [r2, #0]
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
80014f2: 6823 ldr r3, [r4, #0]
|
|
80014f4: f013 0f08 tst.w r3, #8
|
|
80014f8: d042 beq.n 8001580 <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
|
|
80014fa: 6963 ldr r3, [r4, #20]
|
|
80014fc: b36b cbz r3, 800155a <HAL_RCC_OscConfig+0x1a6>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
80014fe: 4b53 ldr r3, [pc, #332] @ (800164c <HAL_RCC_OscConfig+0x298>)
|
|
8001500: 2201 movs r2, #1
|
|
8001502: f8c3 2e80 str.w r2, [r3, #3712] @ 0xe80
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8001506: f7ff f89b bl 8000640 <HAL_GetTick>
|
|
800150a: 4605 mov r5, r0
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
800150c: 4b4e ldr r3, [pc, #312] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800150e: 6f5b ldr r3, [r3, #116] @ 0x74
|
|
8001510: f013 0f02 tst.w r3, #2
|
|
8001514: d134 bne.n 8001580 <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8001516: f7ff f893 bl 8000640 <HAL_GetTick>
|
|
800151a: 1b40 subs r0, r0, r5
|
|
800151c: 2802 cmp r0, #2
|
|
800151e: d9f5 bls.n 800150c <HAL_RCC_OscConfig+0x158>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001520: 2003 movs r0, #3
|
|
8001522: e12b b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8001524: 4a48 ldr r2, [pc, #288] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001526: 6813 ldr r3, [r2, #0]
|
|
8001528: f023 03f8 bic.w r3, r3, #248 @ 0xf8
|
|
800152c: 6921 ldr r1, [r4, #16]
|
|
800152e: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
8001532: 6013 str r3, [r2, #0]
|
|
8001534: e7dd b.n 80014f2 <HAL_RCC_OscConfig+0x13e>
|
|
__HAL_RCC_HSI_DISABLE();
|
|
8001536: 4b45 ldr r3, [pc, #276] @ (800164c <HAL_RCC_OscConfig+0x298>)
|
|
8001538: 2200 movs r2, #0
|
|
800153a: 601a str r2, [r3, #0]
|
|
tickstart = HAL_GetTick();
|
|
800153c: f7ff f880 bl 8000640 <HAL_GetTick>
|
|
8001540: 4605 mov r5, r0
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8001542: 4b41 ldr r3, [pc, #260] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001544: 681b ldr r3, [r3, #0]
|
|
8001546: f013 0f02 tst.w r3, #2
|
|
800154a: d0d2 beq.n 80014f2 <HAL_RCC_OscConfig+0x13e>
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
800154c: f7ff f878 bl 8000640 <HAL_GetTick>
|
|
8001550: 1b40 subs r0, r0, r5
|
|
8001552: 2802 cmp r0, #2
|
|
8001554: d9f5 bls.n 8001542 <HAL_RCC_OscConfig+0x18e>
|
|
return HAL_TIMEOUT;
|
|
8001556: 2003 movs r0, #3
|
|
8001558: e110 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
800155a: 4b3c ldr r3, [pc, #240] @ (800164c <HAL_RCC_OscConfig+0x298>)
|
|
800155c: 2200 movs r2, #0
|
|
800155e: f8c3 2e80 str.w r2, [r3, #3712] @ 0xe80
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001562: f7ff f86d bl 8000640 <HAL_GetTick>
|
|
8001566: 4605 mov r5, r0
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8001568: 4b37 ldr r3, [pc, #220] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800156a: 6f5b ldr r3, [r3, #116] @ 0x74
|
|
800156c: f013 0f02 tst.w r3, #2
|
|
8001570: d006 beq.n 8001580 <HAL_RCC_OscConfig+0x1cc>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8001572: f7ff f865 bl 8000640 <HAL_GetTick>
|
|
8001576: 1b40 subs r0, r0, r5
|
|
8001578: 2802 cmp r0, #2
|
|
800157a: d9f5 bls.n 8001568 <HAL_RCC_OscConfig+0x1b4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800157c: 2003 movs r0, #3
|
|
800157e: e0fd b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
8001580: 6823 ldr r3, [r4, #0]
|
|
8001582: f013 0f04 tst.w r3, #4
|
|
8001586: d077 beq.n 8001678 <HAL_RCC_OscConfig+0x2c4>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8001588: 4b2f ldr r3, [pc, #188] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
800158a: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
800158c: f013 5f80 tst.w r3, #268435456 @ 0x10000000
|
|
8001590: d133 bne.n 80015fa <HAL_RCC_OscConfig+0x246>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8001592: 2300 movs r3, #0
|
|
8001594: 9301 str r3, [sp, #4]
|
|
8001596: 4b2c ldr r3, [pc, #176] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001598: 6c1a ldr r2, [r3, #64] @ 0x40
|
|
800159a: f042 5280 orr.w r2, r2, #268435456 @ 0x10000000
|
|
800159e: 641a str r2, [r3, #64] @ 0x40
|
|
80015a0: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
80015a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
80015a6: 9301 str r3, [sp, #4]
|
|
80015a8: 9b01 ldr r3, [sp, #4]
|
|
pwrclkchanged = SET;
|
|
80015aa: 2501 movs r5, #1
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
80015ac: 4b28 ldr r3, [pc, #160] @ (8001650 <HAL_RCC_OscConfig+0x29c>)
|
|
80015ae: 681b ldr r3, [r3, #0]
|
|
80015b0: f413 7f80 tst.w r3, #256 @ 0x100
|
|
80015b4: d023 beq.n 80015fe <HAL_RCC_OscConfig+0x24a>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
80015b6: 68a3 ldr r3, [r4, #8]
|
|
80015b8: 2b01 cmp r3, #1
|
|
80015ba: d034 beq.n 8001626 <HAL_RCC_OscConfig+0x272>
|
|
80015bc: 2b05 cmp r3, #5
|
|
80015be: d038 beq.n 8001632 <HAL_RCC_OscConfig+0x27e>
|
|
80015c0: 4b21 ldr r3, [pc, #132] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80015c2: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
80015c4: f022 0201 bic.w r2, r2, #1
|
|
80015c8: 671a str r2, [r3, #112] @ 0x70
|
|
80015ca: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
80015cc: f022 0204 bic.w r2, r2, #4
|
|
80015d0: 671a str r2, [r3, #112] @ 0x70
|
|
/* Check the LSE State */
|
|
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
|
|
80015d2: 68a3 ldr r3, [r4, #8]
|
|
80015d4: 2b00 cmp r3, #0
|
|
80015d6: d03d beq.n 8001654 <HAL_RCC_OscConfig+0x2a0>
|
|
{
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
80015d8: f7ff f832 bl 8000640 <HAL_GetTick>
|
|
80015dc: 4606 mov r6, r0
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
80015de: 4b1a ldr r3, [pc, #104] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
80015e0: 6f1b ldr r3, [r3, #112] @ 0x70
|
|
80015e2: f013 0f02 tst.w r3, #2
|
|
80015e6: d146 bne.n 8001676 <HAL_RCC_OscConfig+0x2c2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
80015e8: f7ff f82a bl 8000640 <HAL_GetTick>
|
|
80015ec: 1b80 subs r0, r0, r6
|
|
80015ee: f241 3388 movw r3, #5000 @ 0x1388
|
|
80015f2: 4298 cmp r0, r3
|
|
80015f4: d9f3 bls.n 80015de <HAL_RCC_OscConfig+0x22a>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80015f6: 2003 movs r0, #3
|
|
80015f8: e0c0 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
FlagStatus pwrclkchanged = RESET;
|
|
80015fa: 2500 movs r5, #0
|
|
80015fc: e7d6 b.n 80015ac <HAL_RCC_OscConfig+0x1f8>
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
80015fe: 4a14 ldr r2, [pc, #80] @ (8001650 <HAL_RCC_OscConfig+0x29c>)
|
|
8001600: 6813 ldr r3, [r2, #0]
|
|
8001602: f443 7380 orr.w r3, r3, #256 @ 0x100
|
|
8001606: 6013 str r3, [r2, #0]
|
|
tickstart = HAL_GetTick();
|
|
8001608: f7ff f81a bl 8000640 <HAL_GetTick>
|
|
800160c: 4606 mov r6, r0
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
800160e: 4b10 ldr r3, [pc, #64] @ (8001650 <HAL_RCC_OscConfig+0x29c>)
|
|
8001610: 681b ldr r3, [r3, #0]
|
|
8001612: f413 7f80 tst.w r3, #256 @ 0x100
|
|
8001616: d1ce bne.n 80015b6 <HAL_RCC_OscConfig+0x202>
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8001618: f7ff f812 bl 8000640 <HAL_GetTick>
|
|
800161c: 1b80 subs r0, r0, r6
|
|
800161e: 2802 cmp r0, #2
|
|
8001620: d9f5 bls.n 800160e <HAL_RCC_OscConfig+0x25a>
|
|
return HAL_TIMEOUT;
|
|
8001622: 2003 movs r0, #3
|
|
8001624: e0aa b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8001626: 4a08 ldr r2, [pc, #32] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001628: 6f13 ldr r3, [r2, #112] @ 0x70
|
|
800162a: f043 0301 orr.w r3, r3, #1
|
|
800162e: 6713 str r3, [r2, #112] @ 0x70
|
|
8001630: e7cf b.n 80015d2 <HAL_RCC_OscConfig+0x21e>
|
|
8001632: 4b05 ldr r3, [pc, #20] @ (8001648 <HAL_RCC_OscConfig+0x294>)
|
|
8001634: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
8001636: f042 0204 orr.w r2, r2, #4
|
|
800163a: 671a str r2, [r3, #112] @ 0x70
|
|
800163c: 6f1a ldr r2, [r3, #112] @ 0x70
|
|
800163e: f042 0201 orr.w r2, r2, #1
|
|
8001642: 671a str r2, [r3, #112] @ 0x70
|
|
8001644: e7c5 b.n 80015d2 <HAL_RCC_OscConfig+0x21e>
|
|
8001646: bf00 nop
|
|
8001648: 40023800 .word 0x40023800
|
|
800164c: 42470000 .word 0x42470000
|
|
8001650: 40007000 .word 0x40007000
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001654: f7fe fff4 bl 8000640 <HAL_GetTick>
|
|
8001658: 4606 mov r6, r0
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
800165a: 4b4f ldr r3, [pc, #316] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
800165c: 6f1b ldr r3, [r3, #112] @ 0x70
|
|
800165e: f013 0f02 tst.w r3, #2
|
|
8001662: d008 beq.n 8001676 <HAL_RCC_OscConfig+0x2c2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8001664: f7fe ffec bl 8000640 <HAL_GetTick>
|
|
8001668: 1b80 subs r0, r0, r6
|
|
800166a: f241 3388 movw r3, #5000 @ 0x1388
|
|
800166e: 4298 cmp r0, r3
|
|
8001670: d9f3 bls.n 800165a <HAL_RCC_OscConfig+0x2a6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8001672: 2003 movs r0, #3
|
|
8001674: e082 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Restore clock configuration if changed */
|
|
if(pwrclkchanged == SET)
|
|
8001676: b9e5 cbnz r5, 80016b2 <HAL_RCC_OscConfig+0x2fe>
|
|
}
|
|
}
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8001678: 69a3 ldr r3, [r4, #24]
|
|
800167a: 2b00 cmp r3, #0
|
|
800167c: d07d beq.n 800177a <HAL_RCC_OscConfig+0x3c6>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
|
|
800167e: 4a46 ldr r2, [pc, #280] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
8001680: 6892 ldr r2, [r2, #8]
|
|
8001682: f002 020c and.w r2, r2, #12
|
|
8001686: 2a08 cmp r2, #8
|
|
8001688: d051 beq.n 800172e <HAL_RCC_OscConfig+0x37a>
|
|
{
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
800168a: 2b02 cmp r3, #2
|
|
800168c: d017 beq.n 80016be <HAL_RCC_OscConfig+0x30a>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
800168e: 4b43 ldr r3, [pc, #268] @ (800179c <HAL_RCC_OscConfig+0x3e8>)
|
|
8001690: 2200 movs r2, #0
|
|
8001692: 661a str r2, [r3, #96] @ 0x60
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8001694: f7fe ffd4 bl 8000640 <HAL_GetTick>
|
|
8001698: 4604 mov r4, r0
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
800169a: 4b3f ldr r3, [pc, #252] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
800169c: 681b ldr r3, [r3, #0]
|
|
800169e: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
80016a2: d042 beq.n 800172a <HAL_RCC_OscConfig+0x376>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
80016a4: f7fe ffcc bl 8000640 <HAL_GetTick>
|
|
80016a8: 1b00 subs r0, r0, r4
|
|
80016aa: 2802 cmp r0, #2
|
|
80016ac: d9f5 bls.n 800169a <HAL_RCC_OscConfig+0x2e6>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80016ae: 2003 movs r0, #3
|
|
80016b0: e064 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
80016b2: 4a39 ldr r2, [pc, #228] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
80016b4: 6c13 ldr r3, [r2, #64] @ 0x40
|
|
80016b6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
|
|
80016ba: 6413 str r3, [r2, #64] @ 0x40
|
|
80016bc: e7dc b.n 8001678 <HAL_RCC_OscConfig+0x2c4>
|
|
__HAL_RCC_PLL_DISABLE();
|
|
80016be: 4b37 ldr r3, [pc, #220] @ (800179c <HAL_RCC_OscConfig+0x3e8>)
|
|
80016c0: 2200 movs r2, #0
|
|
80016c2: 661a str r2, [r3, #96] @ 0x60
|
|
tickstart = HAL_GetTick();
|
|
80016c4: f7fe ffbc bl 8000640 <HAL_GetTick>
|
|
80016c8: 4605 mov r5, r0
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
80016ca: 4b33 ldr r3, [pc, #204] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
80016cc: 681b ldr r3, [r3, #0]
|
|
80016ce: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
80016d2: d006 beq.n 80016e2 <HAL_RCC_OscConfig+0x32e>
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
80016d4: f7fe ffb4 bl 8000640 <HAL_GetTick>
|
|
80016d8: 1b40 subs r0, r0, r5
|
|
80016da: 2802 cmp r0, #2
|
|
80016dc: d9f5 bls.n 80016ca <HAL_RCC_OscConfig+0x316>
|
|
return HAL_TIMEOUT;
|
|
80016de: 2003 movs r0, #3
|
|
80016e0: e04c b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
|
|
80016e2: 69e3 ldr r3, [r4, #28]
|
|
80016e4: 6a22 ldr r2, [r4, #32]
|
|
80016e6: 4313 orrs r3, r2
|
|
80016e8: 6a62 ldr r2, [r4, #36] @ 0x24
|
|
80016ea: ea43 1382 orr.w r3, r3, r2, lsl #6
|
|
80016ee: 6aa2 ldr r2, [r4, #40] @ 0x28
|
|
80016f0: 0852 lsrs r2, r2, #1
|
|
80016f2: 3a01 subs r2, #1
|
|
80016f4: ea43 4302 orr.w r3, r3, r2, lsl #16
|
|
80016f8: 6ae2 ldr r2, [r4, #44] @ 0x2c
|
|
80016fa: ea43 6302 orr.w r3, r3, r2, lsl #24
|
|
80016fe: 4a26 ldr r2, [pc, #152] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
8001700: 6053 str r3, [r2, #4]
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8001702: 4b26 ldr r3, [pc, #152] @ (800179c <HAL_RCC_OscConfig+0x3e8>)
|
|
8001704: 2201 movs r2, #1
|
|
8001706: 661a str r2, [r3, #96] @ 0x60
|
|
tickstart = HAL_GetTick();
|
|
8001708: f7fe ff9a bl 8000640 <HAL_GetTick>
|
|
800170c: 4604 mov r4, r0
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
800170e: 4b22 ldr r3, [pc, #136] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
8001710: 681b ldr r3, [r3, #0]
|
|
8001712: f013 7f00 tst.w r3, #33554432 @ 0x2000000
|
|
8001716: d106 bne.n 8001726 <HAL_RCC_OscConfig+0x372>
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8001718: f7fe ff92 bl 8000640 <HAL_GetTick>
|
|
800171c: 1b00 subs r0, r0, r4
|
|
800171e: 2802 cmp r0, #2
|
|
8001720: d9f5 bls.n 800170e <HAL_RCC_OscConfig+0x35a>
|
|
return HAL_TIMEOUT;
|
|
8001722: 2003 movs r0, #3
|
|
8001724: e02a b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
return HAL_ERROR;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8001726: 2000 movs r0, #0
|
|
8001728: e028 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
800172a: 2000 movs r0, #0
|
|
800172c: e026 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
800172e: 2b01 cmp r3, #1
|
|
8001730: d026 beq.n 8001780 <HAL_RCC_OscConfig+0x3cc>
|
|
pll_config = RCC->CFGR;
|
|
8001732: 4b19 ldr r3, [pc, #100] @ (8001798 <HAL_RCC_OscConfig+0x3e4>)
|
|
8001734: 689b ldr r3, [r3, #8]
|
|
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8001736: f403 0180 and.w r1, r3, #4194304 @ 0x400000
|
|
800173a: 69e2 ldr r2, [r4, #28]
|
|
800173c: 4291 cmp r1, r2
|
|
800173e: d121 bne.n 8001784 <HAL_RCC_OscConfig+0x3d0>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
|
|
8001740: f003 023f and.w r2, r3, #63 @ 0x3f
|
|
8001744: 6a21 ldr r1, [r4, #32]
|
|
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8001746: 428a cmp r2, r1
|
|
8001748: d11e bne.n 8001788 <HAL_RCC_OscConfig+0x3d4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
|
|
800174a: 6a61 ldr r1, [r4, #36] @ 0x24
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
|
|
800174c: f647 72c0 movw r2, #32704 @ 0x7fc0
|
|
8001750: 401a ands r2, r3
|
|
8001752: 428a cmp r2, r1
|
|
8001754: d11a bne.n 800178c <HAL_RCC_OscConfig+0x3d8>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
|
|
8001756: f403 3240 and.w r2, r3, #196608 @ 0x30000
|
|
800175a: 6aa1 ldr r1, [r4, #40] @ 0x28
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
|
|
800175c: 428a cmp r2, r1
|
|
800175e: d117 bne.n 8001790 <HAL_RCC_OscConfig+0x3dc>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
|
|
8001760: f003 6370 and.w r3, r3, #251658240 @ 0xf000000
|
|
8001764: 6ae2 ldr r2, [r4, #44] @ 0x2c
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
|
|
8001766: 4293 cmp r3, r2
|
|
8001768: d114 bne.n 8001794 <HAL_RCC_OscConfig+0x3e0>
|
|
return HAL_OK;
|
|
800176a: 2000 movs r0, #0
|
|
800176c: e006 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
return HAL_ERROR;
|
|
800176e: 2001 movs r0, #1
|
|
}
|
|
8001770: 4770 bx lr
|
|
return HAL_ERROR;
|
|
8001772: 2001 movs r0, #1
|
|
8001774: e002 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
return HAL_ERROR;
|
|
8001776: 2001 movs r0, #1
|
|
8001778: e000 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
return HAL_OK;
|
|
800177a: 2000 movs r0, #0
|
|
}
|
|
800177c: b002 add sp, #8
|
|
800177e: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8001780: 2001 movs r0, #1
|
|
8001782: e7fb b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
return HAL_ERROR;
|
|
8001784: 2001 movs r0, #1
|
|
8001786: e7f9 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
8001788: 2001 movs r0, #1
|
|
800178a: e7f7 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
800178c: 2001 movs r0, #1
|
|
800178e: e7f5 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
8001790: 2001 movs r0, #1
|
|
8001792: e7f3 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
8001794: 2001 movs r0, #1
|
|
8001796: e7f1 b.n 800177c <HAL_RCC_OscConfig+0x3c8>
|
|
8001798: 40023800 .word 0x40023800
|
|
800179c: 42470000 .word 0x42470000
|
|
|
|
080017a0 <HAL_RCC_GetSysClockFreq>:
|
|
*
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
80017a0: b508 push {r3, lr}
|
|
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
|
|
uint32_t sysclockfreq = 0U;
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
|
80017a2: 4b26 ldr r3, [pc, #152] @ (800183c <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80017a4: 689b ldr r3, [r3, #8]
|
|
80017a6: f003 030c and.w r3, r3, #12
|
|
80017aa: 2b04 cmp r3, #4
|
|
80017ac: d041 beq.n 8001832 <HAL_RCC_GetSysClockFreq+0x92>
|
|
80017ae: 2b08 cmp r3, #8
|
|
80017b0: d141 bne.n 8001836 <HAL_RCC_GetSysClockFreq+0x96>
|
|
}
|
|
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
|
|
{
|
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
|
SYSCLK = PLL_VCO / PLLP */
|
|
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
|
80017b2: 4b22 ldr r3, [pc, #136] @ (800183c <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80017b4: 685a ldr r2, [r3, #4]
|
|
80017b6: f002 023f and.w r2, r2, #63 @ 0x3f
|
|
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
|
|
80017ba: 685b ldr r3, [r3, #4]
|
|
80017bc: f413 0f80 tst.w r3, #4194304 @ 0x400000
|
|
80017c0: d012 beq.n 80017e8 <HAL_RCC_GetSysClockFreq+0x48>
|
|
{
|
|
/* HSE used as PLL clock source */
|
|
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
80017c2: 4b1e ldr r3, [pc, #120] @ (800183c <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80017c4: 6859 ldr r1, [r3, #4]
|
|
80017c6: f3c1 1188 ubfx r1, r1, #6, #9
|
|
80017ca: 481d ldr r0, [pc, #116] @ (8001840 <HAL_RCC_GetSysClockFreq+0xa0>)
|
|
80017cc: 2300 movs r3, #0
|
|
80017ce: fba1 0100 umull r0, r1, r1, r0
|
|
80017d2: f7fe fd55 bl 8000280 <__aeabi_uldivmod>
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source */
|
|
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
}
|
|
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
|
|
80017d6: 4b19 ldr r3, [pc, #100] @ (800183c <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80017d8: 685b ldr r3, [r3, #4]
|
|
80017da: f3c3 4301 ubfx r3, r3, #16, #2
|
|
80017de: 3301 adds r3, #1
|
|
80017e0: 005b lsls r3, r3, #1
|
|
|
|
sysclockfreq = pllvco/pllp;
|
|
80017e2: fbb0 f0f3 udiv r0, r0, r3
|
|
sysclockfreq = HSI_VALUE;
|
|
break;
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
}
|
|
80017e6: bd08 pop {r3, pc}
|
|
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
80017e8: 4b14 ldr r3, [pc, #80] @ (800183c <HAL_RCC_GetSysClockFreq+0x9c>)
|
|
80017ea: 6858 ldr r0, [r3, #4]
|
|
80017ec: f3c0 1088 ubfx r0, r0, #6, #9
|
|
80017f0: ea4f 1c40 mov.w ip, r0, lsl #5
|
|
80017f4: ebbc 0c00 subs.w ip, ip, r0
|
|
80017f8: eb6e 0e0e sbc.w lr, lr, lr
|
|
80017fc: ea4f 138e mov.w r3, lr, lsl #6
|
|
8001800: ea43 639c orr.w r3, r3, ip, lsr #26
|
|
8001804: ea4f 118c mov.w r1, ip, lsl #6
|
|
8001808: ebb1 010c subs.w r1, r1, ip
|
|
800180c: eb63 030e sbc.w r3, r3, lr
|
|
8001810: 00db lsls r3, r3, #3
|
|
8001812: ea43 7351 orr.w r3, r3, r1, lsr #29
|
|
8001816: 00c9 lsls r1, r1, #3
|
|
8001818: eb11 0c00 adds.w ip, r1, r0
|
|
800181c: f143 0300 adc.w r3, r3, #0
|
|
8001820: 0299 lsls r1, r3, #10
|
|
8001822: 2300 movs r3, #0
|
|
8001824: ea4f 208c mov.w r0, ip, lsl #10
|
|
8001828: ea41 519c orr.w r1, r1, ip, lsr #22
|
|
800182c: f7fe fd28 bl 8000280 <__aeabi_uldivmod>
|
|
8001830: e7d1 b.n 80017d6 <HAL_RCC_GetSysClockFreq+0x36>
|
|
sysclockfreq = HSE_VALUE;
|
|
8001832: 4803 ldr r0, [pc, #12] @ (8001840 <HAL_RCC_GetSysClockFreq+0xa0>)
|
|
8001834: e7d7 b.n 80017e6 <HAL_RCC_GetSysClockFreq+0x46>
|
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
|
8001836: 4803 ldr r0, [pc, #12] @ (8001844 <HAL_RCC_GetSysClockFreq+0xa4>)
|
|
return sysclockfreq;
|
|
8001838: e7d5 b.n 80017e6 <HAL_RCC_GetSysClockFreq+0x46>
|
|
800183a: bf00 nop
|
|
800183c: 40023800 .word 0x40023800
|
|
8001840: 017d7840 .word 0x017d7840
|
|
8001844: 00f42400 .word 0x00f42400
|
|
|
|
08001848 <HAL_RCC_ClockConfig>:
|
|
if(RCC_ClkInitStruct == NULL)
|
|
8001848: 2800 cmp r0, #0
|
|
800184a: f000 809b beq.w 8001984 <HAL_RCC_ClockConfig+0x13c>
|
|
{
|
|
800184e: b570 push {r4, r5, r6, lr}
|
|
8001850: 460d mov r5, r1
|
|
8001852: 4604 mov r4, r0
|
|
if(FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8001854: 4b4f ldr r3, [pc, #316] @ (8001994 <HAL_RCC_ClockConfig+0x14c>)
|
|
8001856: 681b ldr r3, [r3, #0]
|
|
8001858: f003 030f and.w r3, r3, #15
|
|
800185c: 428b cmp r3, r1
|
|
800185e: d208 bcs.n 8001872 <HAL_RCC_ClockConfig+0x2a>
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8001860: b2cb uxtb r3, r1
|
|
8001862: 4a4c ldr r2, [pc, #304] @ (8001994 <HAL_RCC_ClockConfig+0x14c>)
|
|
8001864: 7013 strb r3, [r2, #0]
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8001866: 6813 ldr r3, [r2, #0]
|
|
8001868: f003 030f and.w r3, r3, #15
|
|
800186c: 428b cmp r3, r1
|
|
800186e: f040 808b bne.w 8001988 <HAL_RCC_ClockConfig+0x140>
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
8001872: 6823 ldr r3, [r4, #0]
|
|
8001874: f013 0f02 tst.w r3, #2
|
|
8001878: d017 beq.n 80018aa <HAL_RCC_ClockConfig+0x62>
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
800187a: f013 0f04 tst.w r3, #4
|
|
800187e: d004 beq.n 800188a <HAL_RCC_ClockConfig+0x42>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
|
8001880: 4a45 ldr r2, [pc, #276] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
8001882: 6893 ldr r3, [r2, #8]
|
|
8001884: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00
|
|
8001888: 6093 str r3, [r2, #8]
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
800188a: 6823 ldr r3, [r4, #0]
|
|
800188c: f013 0f08 tst.w r3, #8
|
|
8001890: d004 beq.n 800189c <HAL_RCC_ClockConfig+0x54>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
|
8001892: 4a41 ldr r2, [pc, #260] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
8001894: 6893 ldr r3, [r2, #8]
|
|
8001896: f443 4360 orr.w r3, r3, #57344 @ 0xe000
|
|
800189a: 6093 str r3, [r2, #8]
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
800189c: 4a3e ldr r2, [pc, #248] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
800189e: 6893 ldr r3, [r2, #8]
|
|
80018a0: f023 03f0 bic.w r3, r3, #240 @ 0xf0
|
|
80018a4: 68a1 ldr r1, [r4, #8]
|
|
80018a6: 430b orrs r3, r1
|
|
80018a8: 6093 str r3, [r2, #8]
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
80018aa: 6823 ldr r3, [r4, #0]
|
|
80018ac: f013 0f01 tst.w r3, #1
|
|
80018b0: d032 beq.n 8001918 <HAL_RCC_ClockConfig+0xd0>
|
|
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
80018b2: 6863 ldr r3, [r4, #4]
|
|
80018b4: 2b01 cmp r3, #1
|
|
80018b6: d021 beq.n 80018fc <HAL_RCC_ClockConfig+0xb4>
|
|
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
|
|
80018b8: 1e9a subs r2, r3, #2
|
|
80018ba: 2a01 cmp r2, #1
|
|
80018bc: d925 bls.n 800190a <HAL_RCC_ClockConfig+0xc2>
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80018be: 4a36 ldr r2, [pc, #216] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
80018c0: 6812 ldr r2, [r2, #0]
|
|
80018c2: f012 0f02 tst.w r2, #2
|
|
80018c6: d061 beq.n 800198c <HAL_RCC_ClockConfig+0x144>
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
80018c8: 4933 ldr r1, [pc, #204] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
80018ca: 688a ldr r2, [r1, #8]
|
|
80018cc: f022 0203 bic.w r2, r2, #3
|
|
80018d0: 4313 orrs r3, r2
|
|
80018d2: 608b str r3, [r1, #8]
|
|
tickstart = HAL_GetTick();
|
|
80018d4: f7fe feb4 bl 8000640 <HAL_GetTick>
|
|
80018d8: 4606 mov r6, r0
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
80018da: 4b2f ldr r3, [pc, #188] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
80018dc: 689b ldr r3, [r3, #8]
|
|
80018de: f003 030c and.w r3, r3, #12
|
|
80018e2: 6862 ldr r2, [r4, #4]
|
|
80018e4: ebb3 0f82 cmp.w r3, r2, lsl #2
|
|
80018e8: d016 beq.n 8001918 <HAL_RCC_ClockConfig+0xd0>
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
80018ea: f7fe fea9 bl 8000640 <HAL_GetTick>
|
|
80018ee: 1b80 subs r0, r0, r6
|
|
80018f0: f241 3388 movw r3, #5000 @ 0x1388
|
|
80018f4: 4298 cmp r0, r3
|
|
80018f6: d9f0 bls.n 80018da <HAL_RCC_ClockConfig+0x92>
|
|
return HAL_TIMEOUT;
|
|
80018f8: 2003 movs r0, #3
|
|
80018fa: e042 b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
80018fc: 4a26 ldr r2, [pc, #152] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
80018fe: 6812 ldr r2, [r2, #0]
|
|
8001900: f412 3f00 tst.w r2, #131072 @ 0x20000
|
|
8001904: d1e0 bne.n 80018c8 <HAL_RCC_ClockConfig+0x80>
|
|
return HAL_ERROR;
|
|
8001906: 2001 movs r0, #1
|
|
8001908: e03b b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
800190a: 4a23 ldr r2, [pc, #140] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
800190c: 6812 ldr r2, [r2, #0]
|
|
800190e: f012 7f00 tst.w r2, #33554432 @ 0x2000000
|
|
8001912: d1d9 bne.n 80018c8 <HAL_RCC_ClockConfig+0x80>
|
|
return HAL_ERROR;
|
|
8001914: 2001 movs r0, #1
|
|
8001916: e034 b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
if(FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8001918: 4b1e ldr r3, [pc, #120] @ (8001994 <HAL_RCC_ClockConfig+0x14c>)
|
|
800191a: 681b ldr r3, [r3, #0]
|
|
800191c: f003 030f and.w r3, r3, #15
|
|
8001920: 42ab cmp r3, r5
|
|
8001922: d907 bls.n 8001934 <HAL_RCC_ClockConfig+0xec>
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8001924: b2ea uxtb r2, r5
|
|
8001926: 4b1b ldr r3, [pc, #108] @ (8001994 <HAL_RCC_ClockConfig+0x14c>)
|
|
8001928: 701a strb r2, [r3, #0]
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
800192a: 681b ldr r3, [r3, #0]
|
|
800192c: f003 030f and.w r3, r3, #15
|
|
8001930: 42ab cmp r3, r5
|
|
8001932: d12d bne.n 8001990 <HAL_RCC_ClockConfig+0x148>
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8001934: 6823 ldr r3, [r4, #0]
|
|
8001936: f013 0f04 tst.w r3, #4
|
|
800193a: d006 beq.n 800194a <HAL_RCC_ClockConfig+0x102>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
800193c: 4a16 ldr r2, [pc, #88] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
800193e: 6893 ldr r3, [r2, #8]
|
|
8001940: f423 53e0 bic.w r3, r3, #7168 @ 0x1c00
|
|
8001944: 68e1 ldr r1, [r4, #12]
|
|
8001946: 430b orrs r3, r1
|
|
8001948: 6093 str r3, [r2, #8]
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
800194a: 6823 ldr r3, [r4, #0]
|
|
800194c: f013 0f08 tst.w r3, #8
|
|
8001950: d007 beq.n 8001962 <HAL_RCC_ClockConfig+0x11a>
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
|
|
8001952: 4a11 ldr r2, [pc, #68] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
8001954: 6893 ldr r3, [r2, #8]
|
|
8001956: f423 4360 bic.w r3, r3, #57344 @ 0xe000
|
|
800195a: 6921 ldr r1, [r4, #16]
|
|
800195c: ea43 03c1 orr.w r3, r3, r1, lsl #3
|
|
8001960: 6093 str r3, [r2, #8]
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
|
|
8001962: f7ff ff1d bl 80017a0 <HAL_RCC_GetSysClockFreq>
|
|
8001966: 4b0c ldr r3, [pc, #48] @ (8001998 <HAL_RCC_ClockConfig+0x150>)
|
|
8001968: 689b ldr r3, [r3, #8]
|
|
800196a: f3c3 1303 ubfx r3, r3, #4, #4
|
|
800196e: 4a0b ldr r2, [pc, #44] @ (800199c <HAL_RCC_ClockConfig+0x154>)
|
|
8001970: 5cd3 ldrb r3, [r2, r3]
|
|
8001972: 40d8 lsrs r0, r3
|
|
8001974: 4b0a ldr r3, [pc, #40] @ (80019a0 <HAL_RCC_ClockConfig+0x158>)
|
|
8001976: 6018 str r0, [r3, #0]
|
|
HAL_InitTick (uwTickPrio);
|
|
8001978: 4b0a ldr r3, [pc, #40] @ (80019a4 <HAL_RCC_ClockConfig+0x15c>)
|
|
800197a: 6818 ldr r0, [r3, #0]
|
|
800197c: f7fe fe16 bl 80005ac <HAL_InitTick>
|
|
return HAL_OK;
|
|
8001980: 2000 movs r0, #0
|
|
}
|
|
8001982: bd70 pop {r4, r5, r6, pc}
|
|
return HAL_ERROR;
|
|
8001984: 2001 movs r0, #1
|
|
}
|
|
8001986: 4770 bx lr
|
|
return HAL_ERROR;
|
|
8001988: 2001 movs r0, #1
|
|
800198a: e7fa b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
return HAL_ERROR;
|
|
800198c: 2001 movs r0, #1
|
|
800198e: e7f8 b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
return HAL_ERROR;
|
|
8001990: 2001 movs r0, #1
|
|
8001992: e7f6 b.n 8001982 <HAL_RCC_ClockConfig+0x13a>
|
|
8001994: 40023c00 .word 0x40023c00
|
|
8001998: 40023800 .word 0x40023800
|
|
800199c: 08005a44 .word 0x08005a44
|
|
80019a0: 20000020 .word 0x20000020
|
|
80019a4: 20000004 .word 0x20000004
|
|
|
|
080019a8 <HAL_RCC_GetHCLKFreq>:
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
return SystemCoreClock;
|
|
}
|
|
80019a8: 4b01 ldr r3, [pc, #4] @ (80019b0 <HAL_RCC_GetHCLKFreq+0x8>)
|
|
80019aa: 6818 ldr r0, [r3, #0]
|
|
80019ac: 4770 bx lr
|
|
80019ae: bf00 nop
|
|
80019b0: 20000020 .word 0x20000020
|
|
|
|
080019b4 <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
80019b4: b508 push {r3, lr}
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
|
|
80019b6: f7ff fff7 bl 80019a8 <HAL_RCC_GetHCLKFreq>
|
|
80019ba: 4b04 ldr r3, [pc, #16] @ (80019cc <HAL_RCC_GetPCLK1Freq+0x18>)
|
|
80019bc: 689b ldr r3, [r3, #8]
|
|
80019be: f3c3 2382 ubfx r3, r3, #10, #3
|
|
80019c2: 4a03 ldr r2, [pc, #12] @ (80019d0 <HAL_RCC_GetPCLK1Freq+0x1c>)
|
|
80019c4: 5cd3 ldrb r3, [r2, r3]
|
|
}
|
|
80019c6: 40d8 lsrs r0, r3
|
|
80019c8: bd08 pop {r3, pc}
|
|
80019ca: bf00 nop
|
|
80019cc: 40023800 .word 0x40023800
|
|
80019d0: 08005a54 .word 0x08005a54
|
|
|
|
080019d4 <HAL_RCC_GetPCLK2Freq>:
|
|
* @note Each time PCLK2 changes, this function must be called to update the
|
|
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK2 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK2Freq(void)
|
|
{
|
|
80019d4: b508 push {r3, lr}
|
|
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
|
|
80019d6: f7ff ffe7 bl 80019a8 <HAL_RCC_GetHCLKFreq>
|
|
80019da: 4b04 ldr r3, [pc, #16] @ (80019ec <HAL_RCC_GetPCLK2Freq+0x18>)
|
|
80019dc: 689b ldr r3, [r3, #8]
|
|
80019de: f3c3 3342 ubfx r3, r3, #13, #3
|
|
80019e2: 4a03 ldr r2, [pc, #12] @ (80019f0 <HAL_RCC_GetPCLK2Freq+0x1c>)
|
|
80019e4: 5cd3 ldrb r3, [r2, r3]
|
|
}
|
|
80019e6: 40d8 lsrs r0, r3
|
|
80019e8: bd08 pop {r3, pc}
|
|
80019ea: bf00 nop
|
|
80019ec: 40023800 .word 0x40023800
|
|
80019f0: 08005a54 .word 0x08005a54
|
|
|
|
080019f4 <UART_SetConfig>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval None
|
|
*/
|
|
static void UART_SetConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
80019f4: b510 push {r4, lr}
|
|
80019f6: 4604 mov r4, r0
|
|
assert_param(IS_UART_MODE(huart->Init.Mode));
|
|
|
|
/*-------------------------- USART CR2 Configuration -----------------------*/
|
|
/* Configure the UART Stop Bits: Set STOP[13:12] bits
|
|
according to huart->Init.StopBits value */
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
|
80019f8: 6802 ldr r2, [r0, #0]
|
|
80019fa: 6913 ldr r3, [r2, #16]
|
|
80019fc: f423 5340 bic.w r3, r3, #12288 @ 0x3000
|
|
8001a00: 68c1 ldr r1, [r0, #12]
|
|
8001a02: 430b orrs r3, r1
|
|
8001a04: 6113 str r3, [r2, #16]
|
|
Set the M bits according to huart->Init.WordLength value
|
|
Set PCE and PS bits according to huart->Init.Parity value
|
|
Set TE and RE bits according to huart->Init.Mode value
|
|
Set OVER8 bit according to huart->Init.OverSampling value */
|
|
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
|
|
8001a06: 6883 ldr r3, [r0, #8]
|
|
8001a08: 6902 ldr r2, [r0, #16]
|
|
8001a0a: 431a orrs r2, r3
|
|
8001a0c: 6943 ldr r3, [r0, #20]
|
|
8001a0e: 431a orrs r2, r3
|
|
8001a10: 69c3 ldr r3, [r0, #28]
|
|
8001a12: 431a orrs r2, r3
|
|
MODIFY_REG(huart->Instance->CR1,
|
|
8001a14: 6801 ldr r1, [r0, #0]
|
|
8001a16: 68cb ldr r3, [r1, #12]
|
|
8001a18: f423 4316 bic.w r3, r3, #38400 @ 0x9600
|
|
8001a1c: f023 030c bic.w r3, r3, #12
|
|
8001a20: 4313 orrs r3, r2
|
|
8001a22: 60cb str r3, [r1, #12]
|
|
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
|
tmpreg);
|
|
|
|
/*-------------------------- USART CR3 Configuration -----------------------*/
|
|
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
|
|
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
|
|
8001a24: 6802 ldr r2, [r0, #0]
|
|
8001a26: 6953 ldr r3, [r2, #20]
|
|
8001a28: f423 7340 bic.w r3, r3, #768 @ 0x300
|
|
8001a2c: 6981 ldr r1, [r0, #24]
|
|
8001a2e: 430b orrs r3, r1
|
|
8001a30: 6153 str r3, [r2, #20]
|
|
|
|
/* Check the Over Sampling */
|
|
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
|
|
8001a32: 69c3 ldr r3, [r0, #28]
|
|
8001a34: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
|
|
8001a38: d035 beq.n 8001aa6 <UART_SetConfig+0xb2>
|
|
{
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
}
|
|
#elif defined(USART6)
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6))
|
|
8001a3a: 6803 ldr r3, [r0, #0]
|
|
8001a3c: 4a60 ldr r2, [pc, #384] @ (8001bc0 <UART_SetConfig+0x1cc>)
|
|
8001a3e: 4293 cmp r3, r2
|
|
8001a40: f000 8091 beq.w 8001b66 <UART_SetConfig+0x172>
|
|
8001a44: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
8001a48: 4293 cmp r3, r2
|
|
8001a4a: f000 808c beq.w 8001b66 <UART_SetConfig+0x172>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
}
|
|
#endif /* USART6 */
|
|
else
|
|
{
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8001a4e: f7ff ffb1 bl 80019b4 <HAL_RCC_GetPCLK1Freq>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8001a52: 2100 movs r1, #0
|
|
8001a54: 1803 adds r3, r0, r0
|
|
8001a56: 4149 adcs r1, r1
|
|
8001a58: 181b adds r3, r3, r0
|
|
8001a5a: f141 0100 adc.w r1, r1, #0
|
|
8001a5e: 00c9 lsls r1, r1, #3
|
|
8001a60: ea41 7153 orr.w r1, r1, r3, lsr #29
|
|
8001a64: 00db lsls r3, r3, #3
|
|
8001a66: 1818 adds r0, r3, r0
|
|
8001a68: 6863 ldr r3, [r4, #4]
|
|
8001a6a: ea4f 0283 mov.w r2, r3, lsl #2
|
|
8001a6e: ea4f 7393 mov.w r3, r3, lsr #30
|
|
8001a72: f141 0100 adc.w r1, r1, #0
|
|
8001a76: f7fe fc03 bl 8000280 <__aeabi_uldivmod>
|
|
8001a7a: 4a52 ldr r2, [pc, #328] @ (8001bc4 <UART_SetConfig+0x1d0>)
|
|
8001a7c: fba2 3100 umull r3, r1, r2, r0
|
|
8001a80: 0949 lsrs r1, r1, #5
|
|
8001a82: 2364 movs r3, #100 @ 0x64
|
|
8001a84: fb03 0311 mls r3, r3, r1, r0
|
|
8001a88: 011b lsls r3, r3, #4
|
|
8001a8a: 3332 adds r3, #50 @ 0x32
|
|
8001a8c: fba2 2303 umull r2, r3, r2, r3
|
|
8001a90: 095b lsrs r3, r3, #5
|
|
8001a92: f003 02f0 and.w r2, r3, #240 @ 0xf0
|
|
8001a96: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001a9a: f003 030f and.w r3, r3, #15
|
|
8001a9e: 6821 ldr r1, [r4, #0]
|
|
8001aa0: 4413 add r3, r2
|
|
8001aa2: 608b str r3, [r1, #8]
|
|
}
|
|
}
|
|
}
|
|
8001aa4: e08a b.n 8001bbc <UART_SetConfig+0x1c8>
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6))
|
|
8001aa6: 6803 ldr r3, [r0, #0]
|
|
8001aa8: 4a45 ldr r2, [pc, #276] @ (8001bc0 <UART_SetConfig+0x1cc>)
|
|
8001aaa: 4293 cmp r3, r2
|
|
8001aac: d02f beq.n 8001b0e <UART_SetConfig+0x11a>
|
|
8001aae: f502 6280 add.w r2, r2, #1024 @ 0x400
|
|
8001ab2: 4293 cmp r3, r2
|
|
8001ab4: d02b beq.n 8001b0e <UART_SetConfig+0x11a>
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8001ab6: f7ff ff7d bl 80019b4 <HAL_RCC_GetPCLK1Freq>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
8001aba: 2300 movs r3, #0
|
|
8001abc: 1802 adds r2, r0, r0
|
|
8001abe: eb43 0103 adc.w r1, r3, r3
|
|
8001ac2: 1812 adds r2, r2, r0
|
|
8001ac4: f141 0100 adc.w r1, r1, #0
|
|
8001ac8: 00c9 lsls r1, r1, #3
|
|
8001aca: ea41 7152 orr.w r1, r1, r2, lsr #29
|
|
8001ace: 00d2 lsls r2, r2, #3
|
|
8001ad0: 1810 adds r0, r2, r0
|
|
8001ad2: f141 0100 adc.w r1, r1, #0
|
|
8001ad6: 6862 ldr r2, [r4, #4]
|
|
8001ad8: 1892 adds r2, r2, r2
|
|
8001ada: 415b adcs r3, r3
|
|
8001adc: f7fe fbd0 bl 8000280 <__aeabi_uldivmod>
|
|
8001ae0: 4a38 ldr r2, [pc, #224] @ (8001bc4 <UART_SetConfig+0x1d0>)
|
|
8001ae2: fba2 3100 umull r3, r1, r2, r0
|
|
8001ae6: 0949 lsrs r1, r1, #5
|
|
8001ae8: 2364 movs r3, #100 @ 0x64
|
|
8001aea: fb03 0311 mls r3, r3, r1, r0
|
|
8001aee: 00db lsls r3, r3, #3
|
|
8001af0: 3332 adds r3, #50 @ 0x32
|
|
8001af2: fba2 2303 umull r2, r3, r2, r3
|
|
8001af6: 095b lsrs r3, r3, #5
|
|
8001af8: 005a lsls r2, r3, #1
|
|
8001afa: f402 72f8 and.w r2, r2, #496 @ 0x1f0
|
|
8001afe: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001b02: f003 0307 and.w r3, r3, #7
|
|
8001b06: 6821 ldr r1, [r4, #0]
|
|
8001b08: 4413 add r3, r2
|
|
8001b0a: 608b str r3, [r1, #8]
|
|
8001b0c: e056 b.n 8001bbc <UART_SetConfig+0x1c8>
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8001b0e: f7ff ff61 bl 80019d4 <HAL_RCC_GetPCLK2Freq>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
8001b12: 2300 movs r3, #0
|
|
8001b14: 1802 adds r2, r0, r0
|
|
8001b16: eb43 0103 adc.w r1, r3, r3
|
|
8001b1a: 1812 adds r2, r2, r0
|
|
8001b1c: f141 0100 adc.w r1, r1, #0
|
|
8001b20: 00c9 lsls r1, r1, #3
|
|
8001b22: ea41 7152 orr.w r1, r1, r2, lsr #29
|
|
8001b26: 00d2 lsls r2, r2, #3
|
|
8001b28: 1810 adds r0, r2, r0
|
|
8001b2a: f141 0100 adc.w r1, r1, #0
|
|
8001b2e: 6862 ldr r2, [r4, #4]
|
|
8001b30: 1892 adds r2, r2, r2
|
|
8001b32: 415b adcs r3, r3
|
|
8001b34: f7fe fba4 bl 8000280 <__aeabi_uldivmod>
|
|
8001b38: 4a22 ldr r2, [pc, #136] @ (8001bc4 <UART_SetConfig+0x1d0>)
|
|
8001b3a: fba2 3100 umull r3, r1, r2, r0
|
|
8001b3e: 0949 lsrs r1, r1, #5
|
|
8001b40: 2364 movs r3, #100 @ 0x64
|
|
8001b42: fb03 0311 mls r3, r3, r1, r0
|
|
8001b46: 00db lsls r3, r3, #3
|
|
8001b48: 3332 adds r3, #50 @ 0x32
|
|
8001b4a: fba2 2303 umull r2, r3, r2, r3
|
|
8001b4e: 095b lsrs r3, r3, #5
|
|
8001b50: 005a lsls r2, r3, #1
|
|
8001b52: f402 72f8 and.w r2, r2, #496 @ 0x1f0
|
|
8001b56: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001b5a: f003 0307 and.w r3, r3, #7
|
|
8001b5e: 6821 ldr r1, [r4, #0]
|
|
8001b60: 4413 add r3, r2
|
|
8001b62: 608b str r3, [r1, #8]
|
|
8001b64: e02a b.n 8001bbc <UART_SetConfig+0x1c8>
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8001b66: f7ff ff35 bl 80019d4 <HAL_RCC_GetPCLK2Freq>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8001b6a: 2100 movs r1, #0
|
|
8001b6c: 1803 adds r3, r0, r0
|
|
8001b6e: 4149 adcs r1, r1
|
|
8001b70: 181b adds r3, r3, r0
|
|
8001b72: f141 0100 adc.w r1, r1, #0
|
|
8001b76: 00c9 lsls r1, r1, #3
|
|
8001b78: ea41 7153 orr.w r1, r1, r3, lsr #29
|
|
8001b7c: 00db lsls r3, r3, #3
|
|
8001b7e: 1818 adds r0, r3, r0
|
|
8001b80: 6863 ldr r3, [r4, #4]
|
|
8001b82: ea4f 0283 mov.w r2, r3, lsl #2
|
|
8001b86: ea4f 7393 mov.w r3, r3, lsr #30
|
|
8001b8a: f141 0100 adc.w r1, r1, #0
|
|
8001b8e: f7fe fb77 bl 8000280 <__aeabi_uldivmod>
|
|
8001b92: 4a0c ldr r2, [pc, #48] @ (8001bc4 <UART_SetConfig+0x1d0>)
|
|
8001b94: fba2 3100 umull r3, r1, r2, r0
|
|
8001b98: 0949 lsrs r1, r1, #5
|
|
8001b9a: 2364 movs r3, #100 @ 0x64
|
|
8001b9c: fb03 0311 mls r3, r3, r1, r0
|
|
8001ba0: 011b lsls r3, r3, #4
|
|
8001ba2: 3332 adds r3, #50 @ 0x32
|
|
8001ba4: fba2 2303 umull r2, r3, r2, r3
|
|
8001ba8: 095b lsrs r3, r3, #5
|
|
8001baa: f003 02f0 and.w r2, r3, #240 @ 0xf0
|
|
8001bae: eb02 1201 add.w r2, r2, r1, lsl #4
|
|
8001bb2: f003 030f and.w r3, r3, #15
|
|
8001bb6: 6821 ldr r1, [r4, #0]
|
|
8001bb8: 4413 add r3, r2
|
|
8001bba: 608b str r3, [r1, #8]
|
|
}
|
|
8001bbc: bd10 pop {r4, pc}
|
|
8001bbe: bf00 nop
|
|
8001bc0: 40011000 .word 0x40011000
|
|
8001bc4: 51eb851f .word 0x51eb851f
|
|
|
|
08001bc8 <UART_WaitOnFlagUntilTimeout>:
|
|
{
|
|
8001bc8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
8001bcc: 4605 mov r5, r0
|
|
8001bce: 460f mov r7, r1
|
|
8001bd0: 4616 mov r6, r2
|
|
8001bd2: 4699 mov r9, r3
|
|
8001bd4: f8dd 8020 ldr.w r8, [sp, #32]
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
8001bd8: 682b ldr r3, [r5, #0]
|
|
8001bda: 681c ldr r4, [r3, #0]
|
|
8001bdc: ea37 0404 bics.w r4, r7, r4
|
|
8001be0: bf0c ite eq
|
|
8001be2: 2401 moveq r4, #1
|
|
8001be4: 2400 movne r4, #0
|
|
8001be6: 42b4 cmp r4, r6
|
|
8001be8: d11f bne.n 8001c2a <UART_WaitOnFlagUntilTimeout+0x62>
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8001bea: f1b8 3fff cmp.w r8, #4294967295 @ 0xffffffff
|
|
8001bee: d0f3 beq.n 8001bd8 <UART_WaitOnFlagUntilTimeout+0x10>
|
|
if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
|
|
8001bf0: f1b8 0f00 cmp.w r8, #0
|
|
8001bf4: d005 beq.n 8001c02 <UART_WaitOnFlagUntilTimeout+0x3a>
|
|
8001bf6: f7fe fd23 bl 8000640 <HAL_GetTick>
|
|
8001bfa: eba0 0009 sub.w r0, r0, r9
|
|
8001bfe: 4540 cmp r0, r8
|
|
8001c00: d9ea bls.n 8001bd8 <UART_WaitOnFlagUntilTimeout+0x10>
|
|
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
|
|
8001c02: 682a ldr r2, [r5, #0]
|
|
8001c04: 68d3 ldr r3, [r2, #12]
|
|
8001c06: f423 73d0 bic.w r3, r3, #416 @ 0x1a0
|
|
8001c0a: 60d3 str r3, [r2, #12]
|
|
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
|
8001c0c: 682a ldr r2, [r5, #0]
|
|
8001c0e: 6953 ldr r3, [r2, #20]
|
|
8001c10: f023 0301 bic.w r3, r3, #1
|
|
8001c14: 6153 str r3, [r2, #20]
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001c16: 2320 movs r3, #32
|
|
8001c18: f885 3039 strb.w r3, [r5, #57] @ 0x39
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8001c1c: f885 303a strb.w r3, [r5, #58] @ 0x3a
|
|
__HAL_UNLOCK(huart);
|
|
8001c20: 2300 movs r3, #0
|
|
8001c22: f885 3038 strb.w r3, [r5, #56] @ 0x38
|
|
return HAL_TIMEOUT;
|
|
8001c26: 2003 movs r0, #3
|
|
8001c28: e000 b.n 8001c2c <UART_WaitOnFlagUntilTimeout+0x64>
|
|
return HAL_OK;
|
|
8001c2a: 2000 movs r0, #0
|
|
}
|
|
8001c2c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
|
|
08001c30 <HAL_UART_Init>:
|
|
if (huart == NULL)
|
|
8001c30: b358 cbz r0, 8001c8a <HAL_UART_Init+0x5a>
|
|
{
|
|
8001c32: b510 push {r4, lr}
|
|
8001c34: 4604 mov r4, r0
|
|
if (huart->gState == HAL_UART_STATE_RESET)
|
|
8001c36: f890 3039 ldrb.w r3, [r0, #57] @ 0x39
|
|
8001c3a: b30b cbz r3, 8001c80 <HAL_UART_Init+0x50>
|
|
huart->gState = HAL_UART_STATE_BUSY;
|
|
8001c3c: 2324 movs r3, #36 @ 0x24
|
|
8001c3e: f884 3039 strb.w r3, [r4, #57] @ 0x39
|
|
__HAL_UART_DISABLE(huart);
|
|
8001c42: 6822 ldr r2, [r4, #0]
|
|
8001c44: 68d3 ldr r3, [r2, #12]
|
|
8001c46: f423 5300 bic.w r3, r3, #8192 @ 0x2000
|
|
8001c4a: 60d3 str r3, [r2, #12]
|
|
UART_SetConfig(huart);
|
|
8001c4c: 4620 mov r0, r4
|
|
8001c4e: f7ff fed1 bl 80019f4 <UART_SetConfig>
|
|
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
|
8001c52: 6822 ldr r2, [r4, #0]
|
|
8001c54: 6913 ldr r3, [r2, #16]
|
|
8001c56: f423 4390 bic.w r3, r3, #18432 @ 0x4800
|
|
8001c5a: 6113 str r3, [r2, #16]
|
|
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
|
8001c5c: 6822 ldr r2, [r4, #0]
|
|
8001c5e: 6953 ldr r3, [r2, #20]
|
|
8001c60: f023 032a bic.w r3, r3, #42 @ 0x2a
|
|
8001c64: 6153 str r3, [r2, #20]
|
|
__HAL_UART_ENABLE(huart);
|
|
8001c66: 6822 ldr r2, [r4, #0]
|
|
8001c68: 68d3 ldr r3, [r2, #12]
|
|
8001c6a: f443 5300 orr.w r3, r3, #8192 @ 0x2000
|
|
8001c6e: 60d3 str r3, [r2, #12]
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8001c70: 2000 movs r0, #0
|
|
8001c72: 63e0 str r0, [r4, #60] @ 0x3c
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001c74: 2320 movs r3, #32
|
|
8001c76: f884 3039 strb.w r3, [r4, #57] @ 0x39
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
8001c7a: f884 303a strb.w r3, [r4, #58] @ 0x3a
|
|
}
|
|
8001c7e: bd10 pop {r4, pc}
|
|
huart->Lock = HAL_UNLOCKED;
|
|
8001c80: f880 3038 strb.w r3, [r0, #56] @ 0x38
|
|
HAL_UART_MspInit(huart);
|
|
8001c84: f000 fdc6 bl 8002814 <HAL_UART_MspInit>
|
|
8001c88: e7d8 b.n 8001c3c <HAL_UART_Init+0xc>
|
|
return HAL_ERROR;
|
|
8001c8a: 2001 movs r0, #1
|
|
}
|
|
8001c8c: 4770 bx lr
|
|
|
|
08001c8e <HAL_UART_Transmit>:
|
|
{
|
|
8001c8e: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
8001c92: b083 sub sp, #12
|
|
8001c94: 461e mov r6, r3
|
|
if (huart->gState == HAL_UART_STATE_READY)
|
|
8001c96: f890 3039 ldrb.w r3, [r0, #57] @ 0x39
|
|
8001c9a: b2db uxtb r3, r3
|
|
8001c9c: 2b20 cmp r3, #32
|
|
8001c9e: d156 bne.n 8001d4e <HAL_UART_Transmit+0xc0>
|
|
8001ca0: 4604 mov r4, r0
|
|
8001ca2: 460d mov r5, r1
|
|
8001ca4: 4690 mov r8, r2
|
|
if ((pData == NULL) || (Size == 0U))
|
|
8001ca6: 2900 cmp r1, #0
|
|
8001ca8: d055 beq.n 8001d56 <HAL_UART_Transmit+0xc8>
|
|
8001caa: 2a00 cmp r2, #0
|
|
8001cac: d055 beq.n 8001d5a <HAL_UART_Transmit+0xcc>
|
|
__HAL_LOCK(huart);
|
|
8001cae: f890 3038 ldrb.w r3, [r0, #56] @ 0x38
|
|
8001cb2: 2b01 cmp r3, #1
|
|
8001cb4: d053 beq.n 8001d5e <HAL_UART_Transmit+0xd0>
|
|
8001cb6: 2301 movs r3, #1
|
|
8001cb8: f880 3038 strb.w r3, [r0, #56] @ 0x38
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
8001cbc: f04f 0900 mov.w r9, #0
|
|
8001cc0: f8c0 903c str.w r9, [r0, #60] @ 0x3c
|
|
huart->gState = HAL_UART_STATE_BUSY_TX;
|
|
8001cc4: 2321 movs r3, #33 @ 0x21
|
|
8001cc6: f880 3039 strb.w r3, [r0, #57] @ 0x39
|
|
tickstart = HAL_GetTick();
|
|
8001cca: f7fe fcb9 bl 8000640 <HAL_GetTick>
|
|
8001cce: 4607 mov r7, r0
|
|
huart->TxXferSize = Size;
|
|
8001cd0: f8a4 8024 strh.w r8, [r4, #36] @ 0x24
|
|
huart->TxXferCount = Size;
|
|
8001cd4: f8a4 8026 strh.w r8, [r4, #38] @ 0x26
|
|
__HAL_UNLOCK(huart);
|
|
8001cd8: f884 9038 strb.w r9, [r4, #56] @ 0x38
|
|
while (huart->TxXferCount > 0U)
|
|
8001cdc: e010 b.n 8001d00 <HAL_UART_Transmit+0x72>
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
|
8001cde: 9600 str r6, [sp, #0]
|
|
8001ce0: 463b mov r3, r7
|
|
8001ce2: 2200 movs r2, #0
|
|
8001ce4: 2180 movs r1, #128 @ 0x80
|
|
8001ce6: 4620 mov r0, r4
|
|
8001ce8: f7ff ff6e bl 8001bc8 <UART_WaitOnFlagUntilTimeout>
|
|
8001cec: 2800 cmp r0, #0
|
|
8001cee: d138 bne.n 8001d62 <HAL_UART_Transmit+0xd4>
|
|
huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
|
|
8001cf0: 882b ldrh r3, [r5, #0]
|
|
8001cf2: 6822 ldr r2, [r4, #0]
|
|
8001cf4: f3c3 0308 ubfx r3, r3, #0, #9
|
|
8001cf8: 6053 str r3, [r2, #4]
|
|
if (huart->Init.Parity == UART_PARITY_NONE)
|
|
8001cfa: 6923 ldr r3, [r4, #16]
|
|
8001cfc: b9cb cbnz r3, 8001d32 <HAL_UART_Transmit+0xa4>
|
|
pData += 2U;
|
|
8001cfe: 3502 adds r5, #2
|
|
while (huart->TxXferCount > 0U)
|
|
8001d00: 8ce3 ldrh r3, [r4, #38] @ 0x26
|
|
8001d02: b29b uxth r3, r3
|
|
8001d04: b1bb cbz r3, 8001d36 <HAL_UART_Transmit+0xa8>
|
|
huart->TxXferCount--;
|
|
8001d06: 8ce2 ldrh r2, [r4, #38] @ 0x26
|
|
8001d08: b292 uxth r2, r2
|
|
8001d0a: 3a01 subs r2, #1
|
|
8001d0c: b292 uxth r2, r2
|
|
8001d0e: 84e2 strh r2, [r4, #38] @ 0x26
|
|
if (huart->Init.WordLength == UART_WORDLENGTH_9B)
|
|
8001d10: 68a3 ldr r3, [r4, #8]
|
|
8001d12: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
|
|
8001d16: d0e2 beq.n 8001cde <HAL_UART_Transmit+0x50>
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
|
8001d18: 9600 str r6, [sp, #0]
|
|
8001d1a: 463b mov r3, r7
|
|
8001d1c: 2200 movs r2, #0
|
|
8001d1e: 2180 movs r1, #128 @ 0x80
|
|
8001d20: 4620 mov r0, r4
|
|
8001d22: f7ff ff51 bl 8001bc8 <UART_WaitOnFlagUntilTimeout>
|
|
8001d26: b9f0 cbnz r0, 8001d66 <HAL_UART_Transmit+0xd8>
|
|
huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
|
|
8001d28: f815 2b01 ldrb.w r2, [r5], #1
|
|
8001d2c: 6823 ldr r3, [r4, #0]
|
|
8001d2e: 605a str r2, [r3, #4]
|
|
8001d30: e7e6 b.n 8001d00 <HAL_UART_Transmit+0x72>
|
|
pData += 1U;
|
|
8001d32: 3501 adds r5, #1
|
|
8001d34: e7e4 b.n 8001d00 <HAL_UART_Transmit+0x72>
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
|
|
8001d36: 9600 str r6, [sp, #0]
|
|
8001d38: 463b mov r3, r7
|
|
8001d3a: 2200 movs r2, #0
|
|
8001d3c: 2140 movs r1, #64 @ 0x40
|
|
8001d3e: 4620 mov r0, r4
|
|
8001d40: f7ff ff42 bl 8001bc8 <UART_WaitOnFlagUntilTimeout>
|
|
8001d44: b988 cbnz r0, 8001d6a <HAL_UART_Transmit+0xdc>
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8001d46: 2320 movs r3, #32
|
|
8001d48: f884 3039 strb.w r3, [r4, #57] @ 0x39
|
|
return HAL_OK;
|
|
8001d4c: e000 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
return HAL_BUSY;
|
|
8001d4e: 2002 movs r0, #2
|
|
}
|
|
8001d50: b003 add sp, #12
|
|
8001d52: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
return HAL_ERROR;
|
|
8001d56: 2001 movs r0, #1
|
|
8001d58: e7fa b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
8001d5a: 2001 movs r0, #1
|
|
8001d5c: e7f8 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
__HAL_LOCK(huart);
|
|
8001d5e: 2002 movs r0, #2
|
|
8001d60: e7f6 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
return HAL_TIMEOUT;
|
|
8001d62: 2003 movs r0, #3
|
|
8001d64: e7f4 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
return HAL_TIMEOUT;
|
|
8001d66: 2003 movs r0, #3
|
|
8001d68: e7f2 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
return HAL_TIMEOUT;
|
|
8001d6a: 2003 movs r0, #3
|
|
8001d6c: e7f0 b.n 8001d50 <HAL_UART_Transmit+0xc2>
|
|
...
|
|
|
|
08001d70 <MX_GPIO_Init>:
|
|
* Output
|
|
* EVENT_OUT
|
|
* EXTI
|
|
*/
|
|
void MX_GPIO_Init(void)
|
|
{
|
|
8001d70: b084 sub sp, #16
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
8001d72: 2200 movs r2, #0
|
|
8001d74: 9200 str r2, [sp, #0]
|
|
8001d76: 4b15 ldr r3, [pc, #84] @ (8001dcc <MX_GPIO_Init+0x5c>)
|
|
8001d78: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001d7a: f041 0180 orr.w r1, r1, #128 @ 0x80
|
|
8001d7e: 6319 str r1, [r3, #48] @ 0x30
|
|
8001d80: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001d82: f001 0180 and.w r1, r1, #128 @ 0x80
|
|
8001d86: 9100 str r1, [sp, #0]
|
|
8001d88: 9900 ldr r1, [sp, #0]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8001d8a: 9201 str r2, [sp, #4]
|
|
8001d8c: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001d8e: f041 0104 orr.w r1, r1, #4
|
|
8001d92: 6319 str r1, [r3, #48] @ 0x30
|
|
8001d94: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001d96: f001 0104 and.w r1, r1, #4
|
|
8001d9a: 9101 str r1, [sp, #4]
|
|
8001d9c: 9901 ldr r1, [sp, #4]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8001d9e: 9202 str r2, [sp, #8]
|
|
8001da0: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001da2: f041 0101 orr.w r1, r1, #1
|
|
8001da6: 6319 str r1, [r3, #48] @ 0x30
|
|
8001da8: 6b19 ldr r1, [r3, #48] @ 0x30
|
|
8001daa: f001 0101 and.w r1, r1, #1
|
|
8001dae: 9102 str r1, [sp, #8]
|
|
8001db0: 9902 ldr r1, [sp, #8]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8001db2: 9203 str r2, [sp, #12]
|
|
8001db4: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
8001db6: f042 0202 orr.w r2, r2, #2
|
|
8001dba: 631a str r2, [r3, #48] @ 0x30
|
|
8001dbc: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8001dbe: f003 0302 and.w r3, r3, #2
|
|
8001dc2: 9303 str r3, [sp, #12]
|
|
8001dc4: 9b03 ldr r3, [sp, #12]
|
|
|
|
}
|
|
8001dc6: b004 add sp, #16
|
|
8001dc8: 4770 bx lr
|
|
8001dca: bf00 nop
|
|
8001dcc: 40023800 .word 0x40023800
|
|
|
|
08001dd0 <MX_I2C1_Init>:
|
|
|
|
I2C_HandleTypeDef hi2c1;
|
|
|
|
/* I2C1 init function */
|
|
void MX_I2C1_Init(void)
|
|
{
|
|
8001dd0: b508 push {r3, lr}
|
|
|
|
hi2c1.Instance = I2C1;
|
|
8001dd2: 480b ldr r0, [pc, #44] @ (8001e00 <MX_I2C1_Init+0x30>)
|
|
8001dd4: 4b0b ldr r3, [pc, #44] @ (8001e04 <MX_I2C1_Init+0x34>)
|
|
8001dd6: 6003 str r3, [r0, #0]
|
|
hi2c1.Init.ClockSpeed = 100000;
|
|
8001dd8: 4b0b ldr r3, [pc, #44] @ (8001e08 <MX_I2C1_Init+0x38>)
|
|
8001dda: 6043 str r3, [r0, #4]
|
|
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
|
8001ddc: 2300 movs r3, #0
|
|
8001dde: 6083 str r3, [r0, #8]
|
|
hi2c1.Init.OwnAddress1 = 0;
|
|
8001de0: 60c3 str r3, [r0, #12]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
8001de2: f44f 4280 mov.w r2, #16384 @ 0x4000
|
|
8001de6: 6102 str r2, [r0, #16]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
8001de8: 6143 str r3, [r0, #20]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
8001dea: 6183 str r3, [r0, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
8001dec: 61c3 str r3, [r0, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
8001dee: 6203 str r3, [r0, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
8001df0: f7fe ffde bl 8000db0 <HAL_I2C_Init>
|
|
8001df4: b900 cbnz r0, 8001df8 <MX_I2C1_Init+0x28>
|
|
{
|
|
Error_Handler();
|
|
}
|
|
|
|
}
|
|
8001df6: bd08 pop {r3, pc}
|
|
Error_Handler();
|
|
8001df8: f000 fa64 bl 80022c4 <Error_Handler>
|
|
}
|
|
8001dfc: e7fb b.n 8001df6 <MX_I2C1_Init+0x26>
|
|
8001dfe: bf00 nop
|
|
8001e00: 20000094 .word 0x20000094
|
|
8001e04: 40005400 .word 0x40005400
|
|
8001e08: 000186a0 .word 0x000186a0
|
|
|
|
08001e0c <HAL_I2C_MspInit>:
|
|
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
|
|
{
|
|
8001e0c: b530 push {r4, r5, lr}
|
|
8001e0e: b089 sub sp, #36 @ 0x24
|
|
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8001e10: 2300 movs r3, #0
|
|
8001e12: 9303 str r3, [sp, #12]
|
|
8001e14: 9304 str r3, [sp, #16]
|
|
8001e16: 9305 str r3, [sp, #20]
|
|
8001e18: 9306 str r3, [sp, #24]
|
|
8001e1a: 9307 str r3, [sp, #28]
|
|
if(i2cHandle->Instance==I2C1)
|
|
8001e1c: 6802 ldr r2, [r0, #0]
|
|
8001e1e: 4b15 ldr r3, [pc, #84] @ (8001e74 <HAL_I2C_MspInit+0x68>)
|
|
8001e20: 429a cmp r2, r3
|
|
8001e22: d001 beq.n 8001e28 <HAL_I2C_MspInit+0x1c>
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
/* USER CODE BEGIN I2C1_MspInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
}
|
|
}
|
|
8001e24: b009 add sp, #36 @ 0x24
|
|
8001e26: bd30 pop {r4, r5, pc}
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8001e28: 2500 movs r5, #0
|
|
8001e2a: 9501 str r5, [sp, #4]
|
|
8001e2c: 4c12 ldr r4, [pc, #72] @ (8001e78 <HAL_I2C_MspInit+0x6c>)
|
|
8001e2e: 6b23 ldr r3, [r4, #48] @ 0x30
|
|
8001e30: f043 0302 orr.w r3, r3, #2
|
|
8001e34: 6323 str r3, [r4, #48] @ 0x30
|
|
8001e36: 6b23 ldr r3, [r4, #48] @ 0x30
|
|
8001e38: f003 0302 and.w r3, r3, #2
|
|
8001e3c: 9301 str r3, [sp, #4]
|
|
8001e3e: 9b01 ldr r3, [sp, #4]
|
|
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
|
8001e40: f44f 7340 mov.w r3, #768 @ 0x300
|
|
8001e44: 9303 str r3, [sp, #12]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
8001e46: 2312 movs r3, #18
|
|
8001e48: 9304 str r3, [sp, #16]
|
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
8001e4a: 2301 movs r3, #1
|
|
8001e4c: 9305 str r3, [sp, #20]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
8001e4e: 2303 movs r3, #3
|
|
8001e50: 9306 str r3, [sp, #24]
|
|
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
|
|
8001e52: 2304 movs r3, #4
|
|
8001e54: 9307 str r3, [sp, #28]
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
8001e56: a903 add r1, sp, #12
|
|
8001e58: 4808 ldr r0, [pc, #32] @ (8001e7c <HAL_I2C_MspInit+0x70>)
|
|
8001e5a: f7fe fc75 bl 8000748 <HAL_GPIO_Init>
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
8001e5e: 9502 str r5, [sp, #8]
|
|
8001e60: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8001e62: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
|
|
8001e66: 6423 str r3, [r4, #64] @ 0x40
|
|
8001e68: 6c23 ldr r3, [r4, #64] @ 0x40
|
|
8001e6a: f403 1300 and.w r3, r3, #2097152 @ 0x200000
|
|
8001e6e: 9302 str r3, [sp, #8]
|
|
8001e70: 9b02 ldr r3, [sp, #8]
|
|
}
|
|
8001e72: e7d7 b.n 8001e24 <HAL_I2C_MspInit+0x18>
|
|
8001e74: 40005400 .word 0x40005400
|
|
8001e78: 40023800 .word 0x40023800
|
|
8001e7c: 40020400 .word 0x40020400
|
|
|
|
08001e80 <Set_Keyboard>:
|
|
#include "sdk_uart.h"
|
|
#include "usart.h"
|
|
|
|
#define KBRD_ADDR 0xE2
|
|
|
|
HAL_StatusTypeDef Set_Keyboard( void ) {
|
|
8001e80: b510 push {r4, lr}
|
|
8001e82: b082 sub sp, #8
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
uint8_t buf;
|
|
|
|
buf = 0;
|
|
8001e84: 2300 movs r3, #0
|
|
8001e86: f88d 3007 strb.w r3, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, POLARITY_INVERSION, &buf);
|
|
8001e8a: f10d 0207 add.w r2, sp, #7
|
|
8001e8e: 2102 movs r1, #2
|
|
8001e90: 20e2 movs r0, #226 @ 0xe2
|
|
8001e92: f000 fc11 bl 80026b8 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8001e96: b968 cbnz r0, 8001eb4 <Set_Keyboard+0x34>
|
|
UART_Transmit((uint8_t*)"Error write polarity\n");
|
|
goto exit;
|
|
}
|
|
|
|
buf = 0;
|
|
8001e98: 2300 movs r3, #0
|
|
8001e9a: f88d 3007 strb.w r3, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, OUTPUT_PORT, &buf);
|
|
8001e9e: f10d 0207 add.w r2, sp, #7
|
|
8001ea2: 2101 movs r1, #1
|
|
8001ea4: 20e2 movs r0, #226 @ 0xe2
|
|
8001ea6: f000 fc07 bl 80026b8 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8001eaa: 4604 mov r4, r0
|
|
8001eac: b938 cbnz r0, 8001ebe <Set_Keyboard+0x3e>
|
|
UART_Transmit((uint8_t*)"Error write output\n");
|
|
}
|
|
|
|
exit:
|
|
return ret;
|
|
}
|
|
8001eae: 4620 mov r0, r4
|
|
8001eb0: b002 add sp, #8
|
|
8001eb2: bd10 pop {r4, pc}
|
|
8001eb4: 4604 mov r4, r0
|
|
UART_Transmit((uint8_t*)"Error write polarity\n");
|
|
8001eb6: 4804 ldr r0, [pc, #16] @ (8001ec8 <Set_Keyboard+0x48>)
|
|
8001eb8: f000 fc18 bl 80026ec <UART_Transmit>
|
|
goto exit;
|
|
8001ebc: e7f7 b.n 8001eae <Set_Keyboard+0x2e>
|
|
UART_Transmit((uint8_t*)"Error write output\n");
|
|
8001ebe: 4803 ldr r0, [pc, #12] @ (8001ecc <Set_Keyboard+0x4c>)
|
|
8001ec0: f000 fc14 bl 80026ec <UART_Transmit>
|
|
8001ec4: e7f3 b.n 8001eae <Set_Keyboard+0x2e>
|
|
8001ec6: bf00 nop
|
|
8001ec8: 08005a5c .word 0x08005a5c
|
|
8001ecc: 08005a74 .word 0x08005a74
|
|
|
|
08001ed0 <Check_Row>:
|
|
|
|
uint8_t Check_Row( uint8_t Nrow ) {
|
|
8001ed0: b510 push {r4, lr}
|
|
8001ed2: b082 sub sp, #8
|
|
8001ed4: 4604 mov r4, r0
|
|
uint8_t Nkey = 0x00;
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
uint8_t buf;
|
|
uint8_t kbd_in;
|
|
|
|
ret = Set_Keyboard();
|
|
8001ed6: f7ff ffd3 bl 8001e80 <Set_Keyboard>
|
|
if( ret != HAL_OK ) {
|
|
8001eda: bb08 cbnz r0, 8001f20 <Check_Row+0x50>
|
|
UART_Transmit((uint8_t*)"Error write init\n");
|
|
}
|
|
|
|
buf = Nrow;
|
|
8001edc: f88d 4007 strb.w r4, [sp, #7]
|
|
ret = PCA9538_Write_Register(KBRD_ADDR, CONFIG, &buf);
|
|
8001ee0: f10d 0207 add.w r2, sp, #7
|
|
8001ee4: 2103 movs r1, #3
|
|
8001ee6: 20e2 movs r0, #226 @ 0xe2
|
|
8001ee8: f000 fbe6 bl 80026b8 <PCA9538_Write_Register>
|
|
if( ret != HAL_OK ) {
|
|
8001eec: b9e0 cbnz r0, 8001f28 <Check_Row+0x58>
|
|
UART_Transmit((uint8_t*)"Error write config\n");
|
|
}
|
|
|
|
ret = PCA9538_Read_Inputs(KBRD_ADDR, &buf);
|
|
8001eee: f10d 0107 add.w r1, sp, #7
|
|
8001ef2: 20e2 movs r0, #226 @ 0xe2
|
|
8001ef4: f000 fbf4 bl 80026e0 <PCA9538_Read_Inputs>
|
|
if( ret != HAL_OK ) {
|
|
8001ef8: b9d0 cbnz r0, 8001f30 <Check_Row+0x60>
|
|
UART_Transmit((uint8_t*)"Read error\n");
|
|
}
|
|
|
|
kbd_in = buf & 0x70;
|
|
8001efa: f89d 3007 ldrb.w r3, [sp, #7]
|
|
8001efe: f003 0070 and.w r0, r3, #112 @ 0x70
|
|
Nkey = kbd_in;
|
|
if( kbd_in != 0x70) {
|
|
8001f02: 2870 cmp r0, #112 @ 0x70
|
|
8001f04: d033 beq.n 8001f6e <Check_Row+0x9e>
|
|
if( !(kbd_in & 0x10) ) {
|
|
8001f06: f013 0f10 tst.w r3, #16
|
|
8001f0a: d116 bne.n 8001f3a <Check_Row+0x6a>
|
|
switch (Nrow) {
|
|
8001f0c: f1a4 02f7 sub.w r2, r4, #247 @ 0xf7
|
|
8001f10: 2a07 cmp r2, #7
|
|
8001f12: d812 bhi.n 8001f3a <Check_Row+0x6a>
|
|
8001f14: e8df f002 tbb [pc, r2]
|
|
8001f18: 11111110 .word 0x11111110
|
|
8001f1c: 10101110 .word 0x10101110
|
|
UART_Transmit((uint8_t*)"Error write init\n");
|
|
8001f20: 4815 ldr r0, [pc, #84] @ (8001f78 <Check_Row+0xa8>)
|
|
8001f22: f000 fbe3 bl 80026ec <UART_Transmit>
|
|
8001f26: e7d9 b.n 8001edc <Check_Row+0xc>
|
|
UART_Transmit((uint8_t*)"Error write config\n");
|
|
8001f28: 4814 ldr r0, [pc, #80] @ (8001f7c <Check_Row+0xac>)
|
|
8001f2a: f000 fbdf bl 80026ec <UART_Transmit>
|
|
8001f2e: e7de b.n 8001eee <Check_Row+0x1e>
|
|
UART_Transmit((uint8_t*)"Read error\n");
|
|
8001f30: 4813 ldr r0, [pc, #76] @ (8001f80 <Check_Row+0xb0>)
|
|
8001f32: f000 fbdb bl 80026ec <UART_Transmit>
|
|
8001f36: e7e0 b.n 8001efa <Check_Row+0x2a>
|
|
case ROW1:
|
|
Nkey = 0x04;
|
|
8001f38: 2004 movs r0, #4
|
|
case ROW4:
|
|
Nkey = 0x04;
|
|
break;
|
|
}
|
|
}
|
|
if( !(kbd_in & 0x20) ) {
|
|
8001f3a: f013 0f20 tst.w r3, #32
|
|
8001f3e: d10a bne.n 8001f56 <Check_Row+0x86>
|
|
switch (Nrow) {
|
|
8001f40: f1a4 02f7 sub.w r2, r4, #247 @ 0xf7
|
|
8001f44: 2a07 cmp r2, #7
|
|
8001f46: d806 bhi.n 8001f56 <Check_Row+0x86>
|
|
8001f48: e8df f002 tbb [pc, r2]
|
|
8001f4c: 05050504 .word 0x05050504
|
|
8001f50: 04040504 .word 0x04040504
|
|
case ROW1:
|
|
Nkey = 0x02;
|
|
8001f54: 2002 movs r0, #2
|
|
case ROW4:
|
|
Nkey = 0x02;
|
|
break;
|
|
}
|
|
}
|
|
if( !(kbd_in & 0x40) ) {
|
|
8001f56: f013 0f40 tst.w r3, #64 @ 0x40
|
|
8001f5a: d109 bne.n 8001f70 <Check_Row+0xa0>
|
|
switch (Nrow) {
|
|
8001f5c: 3cf7 subs r4, #247 @ 0xf7
|
|
8001f5e: 2c07 cmp r4, #7
|
|
8001f60: d806 bhi.n 8001f70 <Check_Row+0xa0>
|
|
8001f62: e8df f004 tbb [pc, r4]
|
|
8001f66: 0507 .short 0x0507
|
|
8001f68: 05070505 .word 0x05070505
|
|
8001f6c: 0707 .short 0x0707
|
|
Nkey = 0x01;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
else Nkey = 0x00;
|
|
8001f6e: 2000 movs r0, #0
|
|
|
|
return Nkey;
|
|
}
|
|
8001f70: b002 add sp, #8
|
|
8001f72: bd10 pop {r4, pc}
|
|
Nkey = 0x01;
|
|
8001f74: 2001 movs r0, #1
|
|
8001f76: e7fb b.n 8001f70 <Check_Row+0xa0>
|
|
8001f78: 08005a88 .word 0x08005a88
|
|
8001f7c: 08005a9c .word 0x08005a9c
|
|
8001f80: 08005ab0 .word 0x08005ab0
|
|
|
|
08001f84 <op_str>:
|
|
static CalcState state = STATE_INPUT_A;
|
|
static uint8_t has_input = 0;
|
|
static char buf[32];
|
|
|
|
static const char* op_str(Operation op) {
|
|
switch(op) {
|
|
8001f84: 2802 cmp r0, #2
|
|
8001f86: d005 beq.n 8001f94 <op_str+0x10>
|
|
8001f88: 2803 cmp r0, #3
|
|
8001f8a: d005 beq.n 8001f98 <op_str+0x14>
|
|
8001f8c: 2801 cmp r0, #1
|
|
8001f8e: d105 bne.n 8001f9c <op_str+0x18>
|
|
8001f90: 4803 ldr r0, [pc, #12] @ (8001fa0 <op_str+0x1c>)
|
|
8001f92: 4770 bx lr
|
|
case OP_ADD: return "+";
|
|
case OP_SUB: return "-";
|
|
8001f94: 4803 ldr r0, [pc, #12] @ (8001fa4 <op_str+0x20>)
|
|
8001f96: 4770 bx lr
|
|
case OP_MUL: return "*";
|
|
8001f98: 4803 ldr r0, [pc, #12] @ (8001fa8 <op_str+0x24>)
|
|
8001f9a: 4770 bx lr
|
|
default: return "";
|
|
8001f9c: 4803 ldr r0, [pc, #12] @ (8001fac <op_str+0x28>)
|
|
}
|
|
}
|
|
8001f9e: 4770 bx lr
|
|
8001fa0: 08005abc .word 0x08005abc
|
|
8001fa4: 08005ac0 .word 0x08005ac0
|
|
8001fa8: 08005ac4 .word 0x08005ac4
|
|
8001fac: 08005b10 .word 0x08005b10
|
|
|
|
08001fb0 <calc>:
|
|
|
|
static int32_t calc(int32_t a, int32_t b, Operation op) {
|
|
switch(op) {
|
|
8001fb0: 2a02 cmp r2, #2
|
|
8001fb2: d005 beq.n 8001fc0 <calc+0x10>
|
|
8001fb4: 2a03 cmp r2, #3
|
|
8001fb6: d005 beq.n 8001fc4 <calc+0x14>
|
|
8001fb8: 2a01 cmp r2, #1
|
|
8001fba: d105 bne.n 8001fc8 <calc+0x18>
|
|
case OP_ADD: return a + b;
|
|
8001fbc: 4408 add r0, r1
|
|
8001fbe: 4770 bx lr
|
|
case OP_SUB: return a - b;
|
|
8001fc0: 1a40 subs r0, r0, r1
|
|
8001fc2: 4770 bx lr
|
|
case OP_MUL: return a * b;
|
|
8001fc4: fb01 f000 mul.w r0, r1, r0
|
|
default: return a;
|
|
}
|
|
}
|
|
8001fc8: 4770 bx lr
|
|
...
|
|
|
|
08001fcc <reset_all>:
|
|
if (k == 0x01) return -2;
|
|
return -100;
|
|
}
|
|
|
|
static void reset_all(void) {
|
|
num_a = num_b = result = 0;
|
|
8001fcc: 4b04 ldr r3, [pc, #16] @ (8001fe0 <reset_all+0x14>)
|
|
8001fce: 2200 movs r2, #0
|
|
8001fd0: 601a str r2, [r3, #0]
|
|
8001fd2: 605a str r2, [r3, #4]
|
|
8001fd4: 609a str r2, [r3, #8]
|
|
current_op = OP_NONE;
|
|
8001fd6: 731a strb r2, [r3, #12]
|
|
state = STATE_INPUT_A;
|
|
8001fd8: 735a strb r2, [r3, #13]
|
|
has_input = 0;
|
|
8001fda: 739a strb r2, [r3, #14]
|
|
}
|
|
8001fdc: 4770 bx lr
|
|
8001fde: bf00 nop
|
|
8001fe0: 200000e8 .word 0x200000e8
|
|
|
|
08001fe4 <on_star>:
|
|
|
|
static void on_star(void) {
|
|
if (state == STATE_INPUT_A && has_input) {
|
|
8001fe4: 4b15 ldr r3, [pc, #84] @ (800203c <on_star+0x58>)
|
|
8001fe6: 7b5b ldrb r3, [r3, #13]
|
|
8001fe8: b93b cbnz r3, 8001ffa <on_star+0x16>
|
|
8001fea: 4a14 ldr r2, [pc, #80] @ (800203c <on_star+0x58>)
|
|
8001fec: 7b92 ldrb r2, [r2, #14]
|
|
8001fee: b122 cbz r2, 8001ffa <on_star+0x16>
|
|
current_op = OP_ADD;
|
|
8001ff0: 4b12 ldr r3, [pc, #72] @ (800203c <on_star+0x58>)
|
|
8001ff2: 2201 movs r2, #1
|
|
8001ff4: 731a strb r2, [r3, #12]
|
|
state = STATE_INPUT_B;
|
|
8001ff6: 735a strb r2, [r3, #13]
|
|
8001ff8: 4770 bx lr
|
|
}
|
|
else if (state == STATE_INPUT_B) {
|
|
8001ffa: 2b01 cmp r3, #1
|
|
8001ffc: d002 beq.n 8002004 <on_star+0x20>
|
|
if (current_op == OP_ADD) current_op = OP_SUB;
|
|
else if (current_op == OP_SUB) current_op = OP_MUL;
|
|
else current_op = OP_ADD;
|
|
}
|
|
else if (state == STATE_RESULT) {
|
|
8001ffe: 2b02 cmp r3, #2
|
|
8002000: d012 beq.n 8002028 <on_star+0x44>
|
|
num_a = result;
|
|
num_b = 0;
|
|
current_op = OP_ADD;
|
|
state = STATE_INPUT_B;
|
|
}
|
|
}
|
|
8002002: 4770 bx lr
|
|
if (current_op == OP_ADD) current_op = OP_SUB;
|
|
8002004: 4b0d ldr r3, [pc, #52] @ (800203c <on_star+0x58>)
|
|
8002006: 7b1b ldrb r3, [r3, #12]
|
|
8002008: 2b01 cmp r3, #1
|
|
800200a: d005 beq.n 8002018 <on_star+0x34>
|
|
else if (current_op == OP_SUB) current_op = OP_MUL;
|
|
800200c: 2b02 cmp r3, #2
|
|
800200e: d007 beq.n 8002020 <on_star+0x3c>
|
|
else current_op = OP_ADD;
|
|
8002010: 4b0a ldr r3, [pc, #40] @ (800203c <on_star+0x58>)
|
|
8002012: 2201 movs r2, #1
|
|
8002014: 731a strb r2, [r3, #12]
|
|
8002016: 4770 bx lr
|
|
if (current_op == OP_ADD) current_op = OP_SUB;
|
|
8002018: 4b08 ldr r3, [pc, #32] @ (800203c <on_star+0x58>)
|
|
800201a: 2202 movs r2, #2
|
|
800201c: 731a strb r2, [r3, #12]
|
|
800201e: 4770 bx lr
|
|
else if (current_op == OP_SUB) current_op = OP_MUL;
|
|
8002020: 4b06 ldr r3, [pc, #24] @ (800203c <on_star+0x58>)
|
|
8002022: 2203 movs r2, #3
|
|
8002024: 731a strb r2, [r3, #12]
|
|
8002026: 4770 bx lr
|
|
num_a = result;
|
|
8002028: 4b04 ldr r3, [pc, #16] @ (800203c <on_star+0x58>)
|
|
800202a: 681a ldr r2, [r3, #0]
|
|
800202c: 609a str r2, [r3, #8]
|
|
num_b = 0;
|
|
800202e: 2200 movs r2, #0
|
|
8002030: 605a str r2, [r3, #4]
|
|
current_op = OP_ADD;
|
|
8002032: 2201 movs r2, #1
|
|
8002034: 731a strb r2, [r3, #12]
|
|
state = STATE_INPUT_B;
|
|
8002036: 735a strb r2, [r3, #13]
|
|
}
|
|
8002038: e7e3 b.n 8002002 <on_star+0x1e>
|
|
800203a: bf00 nop
|
|
800203c: 200000e8 .word 0x200000e8
|
|
|
|
08002040 <on_hash>:
|
|
|
|
static void on_hash(void) {
|
|
8002040: b510 push {r4, lr}
|
|
if (state == STATE_INPUT_A) {
|
|
8002042: 4b0f ldr r3, [pc, #60] @ (8002080 <on_hash+0x40>)
|
|
8002044: 7b5b ldrb r3, [r3, #13]
|
|
8002046: b15b cbz r3, 8002060 <on_hash+0x20>
|
|
reset_all();
|
|
}
|
|
else if (state == STATE_INPUT_B) {
|
|
8002048: 2b01 cmp r3, #1
|
|
800204a: d00c beq.n 8002066 <on_hash+0x26>
|
|
repeat_val = num_b;
|
|
repeat_op = current_op;
|
|
result = calc(num_a, num_b, current_op);
|
|
state = STATE_RESULT;
|
|
}
|
|
else if (state == STATE_RESULT) {
|
|
800204c: 2b02 cmp r3, #2
|
|
800204e: d109 bne.n 8002064 <on_hash+0x24>
|
|
result = calc(result, repeat_val, repeat_op);
|
|
8002050: 4c0b ldr r4, [pc, #44] @ (8002080 <on_hash+0x40>)
|
|
8002052: 7d22 ldrb r2, [r4, #20]
|
|
8002054: 6921 ldr r1, [r4, #16]
|
|
8002056: 6820 ldr r0, [r4, #0]
|
|
8002058: f7ff ffaa bl 8001fb0 <calc>
|
|
800205c: 6020 str r0, [r4, #0]
|
|
}
|
|
}
|
|
800205e: e001 b.n 8002064 <on_hash+0x24>
|
|
reset_all();
|
|
8002060: f7ff ffb4 bl 8001fcc <reset_all>
|
|
}
|
|
8002064: bd10 pop {r4, pc}
|
|
repeat_val = num_b;
|
|
8002066: 4c06 ldr r4, [pc, #24] @ (8002080 <on_hash+0x40>)
|
|
8002068: 6861 ldr r1, [r4, #4]
|
|
800206a: 6121 str r1, [r4, #16]
|
|
repeat_op = current_op;
|
|
800206c: 7b22 ldrb r2, [r4, #12]
|
|
800206e: 7522 strb r2, [r4, #20]
|
|
result = calc(num_a, num_b, current_op);
|
|
8002070: 68a0 ldr r0, [r4, #8]
|
|
8002072: f7ff ff9d bl 8001fb0 <calc>
|
|
8002076: 6020 str r0, [r4, #0]
|
|
state = STATE_RESULT;
|
|
8002078: 2302 movs r3, #2
|
|
800207a: 7363 strb r3, [r4, #13]
|
|
800207c: e7f2 b.n 8002064 <on_hash+0x24>
|
|
800207e: bf00 nop
|
|
8002080: 200000e8 .word 0x200000e8
|
|
|
|
08002084 <on_digit>:
|
|
|
|
static void on_digit(int8_t d) {
|
|
8002084: b510 push {r4, lr}
|
|
8002086: 4604 mov r4, r0
|
|
if (state == STATE_INPUT_A) {
|
|
8002088: 4b12 ldr r3, [pc, #72] @ (80020d4 <on_digit+0x50>)
|
|
800208a: 7b5b ldrb r3, [r3, #13]
|
|
800208c: b96b cbnz r3, 80020aa <on_digit+0x26>
|
|
if (num_a < 100000000) {
|
|
800208e: 4b11 ldr r3, [pc, #68] @ (80020d4 <on_digit+0x50>)
|
|
8002090: 689b ldr r3, [r3, #8]
|
|
8002092: 4a11 ldr r2, [pc, #68] @ (80020d8 <on_digit+0x54>)
|
|
8002094: 4293 cmp r3, r2
|
|
8002096: dc07 bgt.n 80020a8 <on_digit+0x24>
|
|
num_a = num_a * 10 + d;
|
|
8002098: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
800209c: eb00 0443 add.w r4, r0, r3, lsl #1
|
|
80020a0: 4b0c ldr r3, [pc, #48] @ (80020d4 <on_digit+0x50>)
|
|
80020a2: 609c str r4, [r3, #8]
|
|
has_input = 1;
|
|
80020a4: 2201 movs r2, #1
|
|
80020a6: 739a strb r2, [r3, #14]
|
|
else {
|
|
reset_all();
|
|
num_a = d;
|
|
has_input = 1;
|
|
}
|
|
}
|
|
80020a8: bd10 pop {r4, pc}
|
|
else if (state == STATE_INPUT_B) {
|
|
80020aa: 2b01 cmp r3, #1
|
|
80020ac: d10b bne.n 80020c6 <on_digit+0x42>
|
|
if (num_b < 100000000)
|
|
80020ae: 4b09 ldr r3, [pc, #36] @ (80020d4 <on_digit+0x50>)
|
|
80020b0: 685b ldr r3, [r3, #4]
|
|
80020b2: 4a09 ldr r2, [pc, #36] @ (80020d8 <on_digit+0x54>)
|
|
80020b4: 4293 cmp r3, r2
|
|
80020b6: dcf7 bgt.n 80020a8 <on_digit+0x24>
|
|
num_b = num_b * 10 + d;
|
|
80020b8: eb03 0383 add.w r3, r3, r3, lsl #2
|
|
80020bc: eb00 0343 add.w r3, r0, r3, lsl #1
|
|
80020c0: 4a04 ldr r2, [pc, #16] @ (80020d4 <on_digit+0x50>)
|
|
80020c2: 6053 str r3, [r2, #4]
|
|
80020c4: e7f0 b.n 80020a8 <on_digit+0x24>
|
|
reset_all();
|
|
80020c6: f7ff ff81 bl 8001fcc <reset_all>
|
|
num_a = d;
|
|
80020ca: 4b02 ldr r3, [pc, #8] @ (80020d4 <on_digit+0x50>)
|
|
80020cc: 609c str r4, [r3, #8]
|
|
has_input = 1;
|
|
80020ce: 2201 movs r2, #1
|
|
80020d0: 739a strb r2, [r3, #14]
|
|
}
|
|
80020d2: e7e9 b.n 80020a8 <on_digit+0x24>
|
|
80020d4: 200000e8 .word 0x200000e8
|
|
80020d8: 05f5e0ff .word 0x05f5e0ff
|
|
|
|
080020dc <get_key>:
|
|
static int8_t get_key(void) {
|
|
80020dc: b508 push {r3, lr}
|
|
k = Check_Row(ROW1);
|
|
80020de: 20fe movs r0, #254 @ 0xfe
|
|
80020e0: f7ff fef6 bl 8001ed0 <Check_Row>
|
|
if (k == 0x04) return 1;
|
|
80020e4: 2804 cmp r0, #4
|
|
80020e6: d021 beq.n 800212c <get_key+0x50>
|
|
if (k == 0x02) return 2;
|
|
80020e8: 2802 cmp r0, #2
|
|
80020ea: d021 beq.n 8002130 <get_key+0x54>
|
|
if (k == 0x01) return 3;
|
|
80020ec: 2801 cmp r0, #1
|
|
80020ee: d021 beq.n 8002134 <get_key+0x58>
|
|
k = Check_Row(ROW2);
|
|
80020f0: 20fd movs r0, #253 @ 0xfd
|
|
80020f2: f7ff feed bl 8001ed0 <Check_Row>
|
|
if (k == 0x04) return 4;
|
|
80020f6: 2804 cmp r0, #4
|
|
80020f8: d01e beq.n 8002138 <get_key+0x5c>
|
|
if (k == 0x02) return 5;
|
|
80020fa: 2802 cmp r0, #2
|
|
80020fc: d01e beq.n 800213c <get_key+0x60>
|
|
if (k == 0x01) return 6;
|
|
80020fe: 2801 cmp r0, #1
|
|
8002100: d01e beq.n 8002140 <get_key+0x64>
|
|
k = Check_Row(ROW3);
|
|
8002102: 20fb movs r0, #251 @ 0xfb
|
|
8002104: f7ff fee4 bl 8001ed0 <Check_Row>
|
|
if (k == 0x04) return 7;
|
|
8002108: 2804 cmp r0, #4
|
|
800210a: d01b beq.n 8002144 <get_key+0x68>
|
|
if (k == 0x02) return 8;
|
|
800210c: 2802 cmp r0, #2
|
|
800210e: d01b beq.n 8002148 <get_key+0x6c>
|
|
if (k == 0x01) return 9;
|
|
8002110: 2801 cmp r0, #1
|
|
8002112: d01b beq.n 800214c <get_key+0x70>
|
|
k = Check_Row(ROW4);
|
|
8002114: 20f7 movs r0, #247 @ 0xf7
|
|
8002116: f7ff fedb bl 8001ed0 <Check_Row>
|
|
if (k == 0x04) return -1;
|
|
800211a: 2804 cmp r0, #4
|
|
800211c: d018 beq.n 8002150 <get_key+0x74>
|
|
if (k == 0x02) return 0;
|
|
800211e: 2802 cmp r0, #2
|
|
8002120: d019 beq.n 8002156 <get_key+0x7a>
|
|
if (k == 0x01) return -2;
|
|
8002122: 2801 cmp r0, #1
|
|
8002124: d019 beq.n 800215a <get_key+0x7e>
|
|
return -100;
|
|
8002126: f06f 0063 mvn.w r0, #99 @ 0x63
|
|
800212a: e000 b.n 800212e <get_key+0x52>
|
|
if (k == 0x04) return 1;
|
|
800212c: 2001 movs r0, #1
|
|
}
|
|
800212e: bd08 pop {r3, pc}
|
|
if (k == 0x02) return 2;
|
|
8002130: 2002 movs r0, #2
|
|
8002132: e7fc b.n 800212e <get_key+0x52>
|
|
if (k == 0x01) return 3;
|
|
8002134: 2003 movs r0, #3
|
|
8002136: e7fa b.n 800212e <get_key+0x52>
|
|
if (k == 0x04) return 4;
|
|
8002138: 2004 movs r0, #4
|
|
800213a: e7f8 b.n 800212e <get_key+0x52>
|
|
if (k == 0x02) return 5;
|
|
800213c: 2005 movs r0, #5
|
|
800213e: e7f6 b.n 800212e <get_key+0x52>
|
|
if (k == 0x01) return 6;
|
|
8002140: 2006 movs r0, #6
|
|
8002142: e7f4 b.n 800212e <get_key+0x52>
|
|
if (k == 0x04) return 7;
|
|
8002144: 2007 movs r0, #7
|
|
8002146: e7f2 b.n 800212e <get_key+0x52>
|
|
if (k == 0x02) return 8;
|
|
8002148: 2008 movs r0, #8
|
|
800214a: e7f0 b.n 800212e <get_key+0x52>
|
|
if (k == 0x01) return 9;
|
|
800214c: 2009 movs r0, #9
|
|
800214e: e7ee b.n 800212e <get_key+0x52>
|
|
if (k == 0x04) return -1;
|
|
8002150: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002154: e7eb b.n 800212e <get_key+0x52>
|
|
if (k == 0x02) return 0;
|
|
8002156: 2000 movs r0, #0
|
|
8002158: e7e9 b.n 800212e <get_key+0x52>
|
|
if (k == 0x01) return -2;
|
|
800215a: f06f 0001 mvn.w r0, #1
|
|
800215e: e7e6 b.n 800212e <get_key+0x52>
|
|
|
|
08002160 <update_display>:
|
|
static void update_display(void) {
|
|
8002160: b570 push {r4, r5, r6, lr}
|
|
oled_Fill(Black);
|
|
8002162: 2000 movs r0, #0
|
|
8002164: f000 f94c bl 8002400 <oled_Fill>
|
|
oled_SetCursor(80, 0);
|
|
8002168: 2100 movs r1, #0
|
|
800216a: 2050 movs r0, #80 @ 0x50
|
|
800216c: f000 fa8a bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("1 2 3", Font_7x10, White);
|
|
8002170: 4c46 ldr r4, [pc, #280] @ (800228c <update_display+0x12c>)
|
|
8002172: 2301 movs r3, #1
|
|
8002174: e894 0006 ldmia.w r4, {r1, r2}
|
|
8002178: 4845 ldr r0, [pc, #276] @ (8002290 <update_display+0x130>)
|
|
800217a: f000 fa6b bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(80, 12);
|
|
800217e: 210c movs r1, #12
|
|
8002180: 2050 movs r0, #80 @ 0x50
|
|
8002182: f000 fa7f bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("4 5 6", Font_7x10, White);
|
|
8002186: 2301 movs r3, #1
|
|
8002188: e894 0006 ldmia.w r4, {r1, r2}
|
|
800218c: 4841 ldr r0, [pc, #260] @ (8002294 <update_display+0x134>)
|
|
800218e: f000 fa61 bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(80, 24);
|
|
8002192: 2118 movs r1, #24
|
|
8002194: 2050 movs r0, #80 @ 0x50
|
|
8002196: f000 fa75 bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("7 8 9", Font_7x10, White);
|
|
800219a: 2301 movs r3, #1
|
|
800219c: e894 0006 ldmia.w r4, {r1, r2}
|
|
80021a0: 483d ldr r0, [pc, #244] @ (8002298 <update_display+0x138>)
|
|
80021a2: f000 fa57 bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(80, 36);
|
|
80021a6: 2124 movs r1, #36 @ 0x24
|
|
80021a8: 2050 movs r0, #80 @ 0x50
|
|
80021aa: f000 fa6b bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("* 0 #", Font_7x10, White);
|
|
80021ae: 2301 movs r3, #1
|
|
80021b0: e894 0006 ldmia.w r4, {r1, r2}
|
|
80021b4: 4839 ldr r0, [pc, #228] @ (800229c <update_display+0x13c>)
|
|
80021b6: f000 fa4d bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(0, 0);
|
|
80021ba: 2100 movs r1, #0
|
|
80021bc: 4608 mov r0, r1
|
|
80021be: f000 fa61 bl 8002684 <oled_SetCursor>
|
|
if (state == STATE_INPUT_A) {
|
|
80021c2: 4b37 ldr r3, [pc, #220] @ (80022a0 <update_display+0x140>)
|
|
80021c4: 7b5b ldrb r3, [r3, #13]
|
|
80021c6: b1db cbz r3, 8002200 <update_display+0xa0>
|
|
else if (state == STATE_INPUT_B) {
|
|
80021c8: 2b01 cmp r3, #1
|
|
80021ca: d032 beq.n 8002232 <update_display+0xd2>
|
|
sprintf(buf, "=%ld", (long)result);
|
|
80021cc: 4c34 ldr r4, [pc, #208] @ (80022a0 <update_display+0x140>)
|
|
80021ce: f854 2b18 ldr.w r2, [r4], #24
|
|
80021d2: 4934 ldr r1, [pc, #208] @ (80022a4 <update_display+0x144>)
|
|
80021d4: 4620 mov r0, r4
|
|
80021d6: f000 fb7f bl 80028d8 <siprintf>
|
|
oled_WriteString(buf, Font_16x26, White);
|
|
80021da: 4a33 ldr r2, [pc, #204] @ (80022a8 <update_display+0x148>)
|
|
80021dc: 2301 movs r3, #1
|
|
80021de: ca06 ldmia r2, {r1, r2}
|
|
80021e0: 4620 mov r0, r4
|
|
80021e2: f000 fa37 bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(0, 28);
|
|
80021e6: 211c movs r1, #28
|
|
80021e8: 2000 movs r0, #0
|
|
80021ea: f000 fa4b bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("*:use #:rpt", Font_7x10, White);
|
|
80021ee: 4a27 ldr r2, [pc, #156] @ (800228c <update_display+0x12c>)
|
|
80021f0: 2301 movs r3, #1
|
|
80021f2: ca06 ldmia r2, {r1, r2}
|
|
80021f4: 482d ldr r0, [pc, #180] @ (80022ac <update_display+0x14c>)
|
|
80021f6: f000 fa2d bl 8002654 <oled_WriteString>
|
|
oled_UpdateScreen();
|
|
80021fa: f000 f911 bl 8002420 <oled_UpdateScreen>
|
|
}
|
|
80021fe: bd70 pop {r4, r5, r6, pc}
|
|
sprintf(buf, "%ld", (long)num_a);
|
|
8002200: 4b27 ldr r3, [pc, #156] @ (80022a0 <update_display+0x140>)
|
|
8002202: f103 0418 add.w r4, r3, #24
|
|
8002206: 689a ldr r2, [r3, #8]
|
|
8002208: 4929 ldr r1, [pc, #164] @ (80022b0 <update_display+0x150>)
|
|
800220a: 4620 mov r0, r4
|
|
800220c: f000 fb64 bl 80028d8 <siprintf>
|
|
oled_WriteString(buf, Font_16x26, White);
|
|
8002210: 4a25 ldr r2, [pc, #148] @ (80022a8 <update_display+0x148>)
|
|
8002212: 2301 movs r3, #1
|
|
8002214: ca06 ldmia r2, {r1, r2}
|
|
8002216: 4620 mov r0, r4
|
|
8002218: f000 fa1c bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(0, 28);
|
|
800221c: 211c movs r1, #28
|
|
800221e: 2000 movs r0, #0
|
|
8002220: f000 fa30 bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("*:op #:clr", Font_7x10, White);
|
|
8002224: 4a19 ldr r2, [pc, #100] @ (800228c <update_display+0x12c>)
|
|
8002226: 2301 movs r3, #1
|
|
8002228: ca06 ldmia r2, {r1, r2}
|
|
800222a: 4822 ldr r0, [pc, #136] @ (80022b4 <update_display+0x154>)
|
|
800222c: f000 fa12 bl 8002654 <oled_WriteString>
|
|
8002230: e7e3 b.n 80021fa <update_display+0x9a>
|
|
sprintf(buf, "%ld %s", (long)num_a, op_str(current_op));
|
|
8002232: 4d1b ldr r5, [pc, #108] @ (80022a0 <update_display+0x140>)
|
|
8002234: 68ae ldr r6, [r5, #8]
|
|
8002236: 7b28 ldrb r0, [r5, #12]
|
|
8002238: f7ff fea4 bl 8001f84 <op_str>
|
|
800223c: 4603 mov r3, r0
|
|
800223e: f105 0418 add.w r4, r5, #24
|
|
8002242: 4632 mov r2, r6
|
|
8002244: 491c ldr r1, [pc, #112] @ (80022b8 <update_display+0x158>)
|
|
8002246: 4620 mov r0, r4
|
|
8002248: f000 fb46 bl 80028d8 <siprintf>
|
|
oled_WriteString(buf, Font_11x18, White);
|
|
800224c: 4a1b ldr r2, [pc, #108] @ (80022bc <update_display+0x15c>)
|
|
800224e: 2301 movs r3, #1
|
|
8002250: ca06 ldmia r2, {r1, r2}
|
|
8002252: 4620 mov r0, r4
|
|
8002254: f000 f9fe bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(0, 20);
|
|
8002258: 2114 movs r1, #20
|
|
800225a: 2000 movs r0, #0
|
|
800225c: f000 fa12 bl 8002684 <oled_SetCursor>
|
|
sprintf(buf, "%ld", (long)num_b);
|
|
8002260: 686a ldr r2, [r5, #4]
|
|
8002262: 4913 ldr r1, [pc, #76] @ (80022b0 <update_display+0x150>)
|
|
8002264: 4620 mov r0, r4
|
|
8002266: f000 fb37 bl 80028d8 <siprintf>
|
|
oled_WriteString(buf, Font_16x26, White);
|
|
800226a: 4a0f ldr r2, [pc, #60] @ (80022a8 <update_display+0x148>)
|
|
800226c: 2301 movs r3, #1
|
|
800226e: ca06 ldmia r2, {r1, r2}
|
|
8002270: 4620 mov r0, r4
|
|
8002272: f000 f9ef bl 8002654 <oled_WriteString>
|
|
oled_SetCursor(0, 48);
|
|
8002276: 2130 movs r1, #48 @ 0x30
|
|
8002278: 2000 movs r0, #0
|
|
800227a: f000 fa03 bl 8002684 <oled_SetCursor>
|
|
oled_WriteString("*:chg #:=", Font_7x10, White);
|
|
800227e: 4a03 ldr r2, [pc, #12] @ (800228c <update_display+0x12c>)
|
|
8002280: 2301 movs r3, #1
|
|
8002282: ca06 ldmia r2, {r1, r2}
|
|
8002284: 480e ldr r0, [pc, #56] @ (80022c0 <update_display+0x160>)
|
|
8002286: f000 f9e5 bl 8002654 <oled_WriteString>
|
|
800228a: e7b6 b.n 80021fa <update_display+0x9a>
|
|
800228c: 20000018 .word 0x20000018
|
|
8002290: 08005ac8 .word 0x08005ac8
|
|
8002294: 08005ad0 .word 0x08005ad0
|
|
8002298: 08005ad8 .word 0x08005ad8
|
|
800229c: 08005ae0 .word 0x08005ae0
|
|
80022a0: 200000e8 .word 0x200000e8
|
|
80022a4: 08005b0c .word 0x08005b0c
|
|
80022a8: 20000008 .word 0x20000008
|
|
80022ac: 08005b14 .word 0x08005b14
|
|
80022b0: 08005ae8 .word 0x08005ae8
|
|
80022b4: 08005aec .word 0x08005aec
|
|
80022b8: 08005af8 .word 0x08005af8
|
|
80022bc: 20000010 .word 0x20000010
|
|
80022c0: 08005b00 .word 0x08005b00
|
|
|
|
080022c4 <Error_Handler>:
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) Error_Handler();
|
|
}
|
|
|
|
void Error_Handler(void) { while(1) {} }
|
|
80022c4: e7fe b.n 80022c4 <Error_Handler>
|
|
...
|
|
|
|
080022c8 <SystemClock_Config>:
|
|
void SystemClock_Config(void) {
|
|
80022c8: b500 push {lr}
|
|
80022ca: b095 sub sp, #84 @ 0x54
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
80022cc: 2230 movs r2, #48 @ 0x30
|
|
80022ce: 2100 movs r1, #0
|
|
80022d0: a808 add r0, sp, #32
|
|
80022d2: f000 fb23 bl 800291c <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
80022d6: 2300 movs r3, #0
|
|
80022d8: 9303 str r3, [sp, #12]
|
|
80022da: 9304 str r3, [sp, #16]
|
|
80022dc: 9305 str r3, [sp, #20]
|
|
80022de: 9306 str r3, [sp, #24]
|
|
80022e0: 9307 str r3, [sp, #28]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80022e2: 9301 str r3, [sp, #4]
|
|
80022e4: 4a21 ldr r2, [pc, #132] @ (800236c <SystemClock_Config+0xa4>)
|
|
80022e6: 6c11 ldr r1, [r2, #64] @ 0x40
|
|
80022e8: f041 5180 orr.w r1, r1, #268435456 @ 0x10000000
|
|
80022ec: 6411 str r1, [r2, #64] @ 0x40
|
|
80022ee: 6c12 ldr r2, [r2, #64] @ 0x40
|
|
80022f0: f002 5280 and.w r2, r2, #268435456 @ 0x10000000
|
|
80022f4: 9201 str r2, [sp, #4]
|
|
80022f6: 9a01 ldr r2, [sp, #4]
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
|
80022f8: 9302 str r3, [sp, #8]
|
|
80022fa: 4b1d ldr r3, [pc, #116] @ (8002370 <SystemClock_Config+0xa8>)
|
|
80022fc: 681a ldr r2, [r3, #0]
|
|
80022fe: f442 4280 orr.w r2, r2, #16384 @ 0x4000
|
|
8002302: 601a str r2, [r3, #0]
|
|
8002304: 681b ldr r3, [r3, #0]
|
|
8002306: f403 4380 and.w r3, r3, #16384 @ 0x4000
|
|
800230a: 9302 str r3, [sp, #8]
|
|
800230c: 9b02 ldr r3, [sp, #8]
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
800230e: 2301 movs r3, #1
|
|
8002310: 9308 str r3, [sp, #32]
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
8002312: f44f 3380 mov.w r3, #65536 @ 0x10000
|
|
8002316: 9309 str r3, [sp, #36] @ 0x24
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
8002318: 2302 movs r3, #2
|
|
800231a: 930e str r3, [sp, #56] @ 0x38
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
800231c: f44f 0280 mov.w r2, #4194304 @ 0x400000
|
|
8002320: 920f str r2, [sp, #60] @ 0x3c
|
|
RCC_OscInitStruct.PLL.PLLM = 25;
|
|
8002322: 2219 movs r2, #25
|
|
8002324: 9210 str r2, [sp, #64] @ 0x40
|
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
|
8002326: f44f 72a8 mov.w r2, #336 @ 0x150
|
|
800232a: 9211 str r2, [sp, #68] @ 0x44
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
|
800232c: 9312 str r3, [sp, #72] @ 0x48
|
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
|
800232e: 2304 movs r3, #4
|
|
8002330: 9313 str r3, [sp, #76] @ 0x4c
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) Error_Handler();
|
|
8002332: a808 add r0, sp, #32
|
|
8002334: f7ff f83e bl 80013b4 <HAL_RCC_OscConfig>
|
|
8002338: b998 cbnz r0, 8002362 <SystemClock_Config+0x9a>
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|
800233a: 230f movs r3, #15
|
|
800233c: 9303 str r3, [sp, #12]
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
800233e: 2302 movs r3, #2
|
|
8002340: 9304 str r3, [sp, #16]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
8002342: 2300 movs r3, #0
|
|
8002344: 9305 str r3, [sp, #20]
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
|
8002346: f44f 53a0 mov.w r3, #5120 @ 0x1400
|
|
800234a: 9306 str r3, [sp, #24]
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
|
800234c: f44f 5380 mov.w r3, #4096 @ 0x1000
|
|
8002350: 9307 str r3, [sp, #28]
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) Error_Handler();
|
|
8002352: 2105 movs r1, #5
|
|
8002354: a803 add r0, sp, #12
|
|
8002356: f7ff fa77 bl 8001848 <HAL_RCC_ClockConfig>
|
|
800235a: b920 cbnz r0, 8002366 <SystemClock_Config+0x9e>
|
|
}
|
|
800235c: b015 add sp, #84 @ 0x54
|
|
800235e: f85d fb04 ldr.w pc, [sp], #4
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) Error_Handler();
|
|
8002362: f7ff ffaf bl 80022c4 <Error_Handler>
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) Error_Handler();
|
|
8002366: f7ff ffad bl 80022c4 <Error_Handler>
|
|
800236a: bf00 nop
|
|
800236c: 40023800 .word 0x40023800
|
|
8002370: 40007000 .word 0x40007000
|
|
|
|
08002374 <main>:
|
|
int main(void) {
|
|
8002374: b538 push {r3, r4, r5, lr}
|
|
HAL_Init();
|
|
8002376: f7fe f93d bl 80005f4 <HAL_Init>
|
|
SystemClock_Config();
|
|
800237a: f7ff ffa5 bl 80022c8 <SystemClock_Config>
|
|
MX_GPIO_Init();
|
|
800237e: f7ff fcf7 bl 8001d70 <MX_GPIO_Init>
|
|
MX_I2C1_Init();
|
|
8002382: f7ff fd25 bl 8001dd0 <MX_I2C1_Init>
|
|
MX_USART6_UART_Init();
|
|
8002386: f000 fa2b bl 80027e0 <MX_USART6_UART_Init>
|
|
oled_Init();
|
|
800238a: f000 f871 bl 8002470 <oled_Init>
|
|
update_display();
|
|
800238e: f7ff fee7 bl 8002160 <update_display>
|
|
int8_t last = -100;
|
|
8002392: f06f 0563 mvn.w r5, #99 @ 0x63
|
|
8002396: e007 b.n 80023a8 <main+0x34>
|
|
if (key >= 0) on_digit(key);
|
|
8002398: f7ff fe74 bl 8002084 <on_digit>
|
|
update_display();
|
|
800239c: f7ff fee0 bl 8002160 <update_display>
|
|
HAL_Delay(100);
|
|
80023a0: 2064 movs r0, #100 @ 0x64
|
|
80023a2: f7fe f953 bl 800064c <HAL_Delay>
|
|
last = key;
|
|
80023a6: 4625 mov r5, r4
|
|
int8_t key = get_key();
|
|
80023a8: f7ff fe98 bl 80020dc <get_key>
|
|
80023ac: 4604 mov r4, r0
|
|
if (key != last && key != -100) {
|
|
80023ae: 4285 cmp r5, r0
|
|
80023b0: d0f6 beq.n 80023a0 <main+0x2c>
|
|
80023b2: f110 0f64 cmn.w r0, #100 @ 0x64
|
|
80023b6: d0f3 beq.n 80023a0 <main+0x2c>
|
|
if (key >= 0) on_digit(key);
|
|
80023b8: 2800 cmp r0, #0
|
|
80023ba: daed bge.n 8002398 <main+0x24>
|
|
else if (key == -1) on_star();
|
|
80023bc: f1b0 3fff cmp.w r0, #4294967295 @ 0xffffffff
|
|
80023c0: d005 beq.n 80023ce <main+0x5a>
|
|
else if (key == -2) on_hash();
|
|
80023c2: f110 0f02 cmn.w r0, #2
|
|
80023c6: d1e9 bne.n 800239c <main+0x28>
|
|
80023c8: f7ff fe3a bl 8002040 <on_hash>
|
|
80023cc: e7e6 b.n 800239c <main+0x28>
|
|
else if (key == -1) on_star();
|
|
80023ce: f7ff fe09 bl 8001fe4 <on_star>
|
|
80023d2: e7e3 b.n 800239c <main+0x28>
|
|
|
|
080023d4 <oled_WriteCommand>:
|
|
static uint8_t OLED_Buffer[1024];
|
|
|
|
static OLED_t OLED;
|
|
|
|
|
|
static void oled_WriteCommand(uint8_t command) {
|
|
80023d4: b500 push {lr}
|
|
80023d6: b087 sub sp, #28
|
|
80023d8: f88d 0017 strb.w r0, [sp, #23]
|
|
HAL_I2C_Mem_Write(&hi2c1,OLED_I2C_ADDR,0x00,1,&command,1,10);
|
|
80023dc: 230a movs r3, #10
|
|
80023de: 9302 str r3, [sp, #8]
|
|
80023e0: 2301 movs r3, #1
|
|
80023e2: 9301 str r3, [sp, #4]
|
|
80023e4: f10d 0217 add.w r2, sp, #23
|
|
80023e8: 9200 str r2, [sp, #0]
|
|
80023ea: 2200 movs r2, #0
|
|
80023ec: 2178 movs r1, #120 @ 0x78
|
|
80023ee: 4803 ldr r0, [pc, #12] @ (80023fc <oled_WriteCommand+0x28>)
|
|
80023f0: f7fe fdbc bl 8000f6c <HAL_I2C_Mem_Write>
|
|
}
|
|
80023f4: b007 add sp, #28
|
|
80023f6: f85d fb04 ldr.w pc, [sp], #4
|
|
80023fa: bf00 nop
|
|
80023fc: 20000094 .word 0x20000094
|
|
|
|
08002400 <oled_Fill>:
|
|
}
|
|
|
|
void oled_Fill(OLED_COLOR color) {
|
|
uint32_t i;
|
|
|
|
for(i = 0; i < sizeof(OLED_Buffer); i++) {
|
|
8002400: 2300 movs r3, #0
|
|
8002402: e003 b.n 800240c <oled_Fill+0xc>
|
|
OLED_Buffer[i] = (color == Black) ? 0x00 : 0xFF;
|
|
8002404: 21ff movs r1, #255 @ 0xff
|
|
8002406: 4a05 ldr r2, [pc, #20] @ (800241c <oled_Fill+0x1c>)
|
|
8002408: 54d1 strb r1, [r2, r3]
|
|
for(i = 0; i < sizeof(OLED_Buffer); i++) {
|
|
800240a: 3301 adds r3, #1
|
|
800240c: f5b3 6f80 cmp.w r3, #1024 @ 0x400
|
|
8002410: d203 bcs.n 800241a <oled_Fill+0x1a>
|
|
OLED_Buffer[i] = (color == Black) ? 0x00 : 0xFF;
|
|
8002412: 2800 cmp r0, #0
|
|
8002414: d1f6 bne.n 8002404 <oled_Fill+0x4>
|
|
8002416: 4601 mov r1, r0
|
|
8002418: e7f5 b.n 8002406 <oled_Fill+0x6>
|
|
}
|
|
}
|
|
800241a: 4770 bx lr
|
|
800241c: 20000120 .word 0x20000120
|
|
|
|
08002420 <oled_UpdateScreen>:
|
|
|
|
|
|
void oled_UpdateScreen(void) {
|
|
8002420: b510 push {r4, lr}
|
|
8002422: b084 sub sp, #16
|
|
uint8_t i;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
8002424: 2400 movs r4, #0
|
|
8002426: e01a b.n 800245e <oled_UpdateScreen+0x3e>
|
|
oled_WriteCommand(0xB0 + i);
|
|
8002428: f1a4 0050 sub.w r0, r4, #80 @ 0x50
|
|
800242c: b2c0 uxtb r0, r0
|
|
800242e: f7ff ffd1 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
8002432: 2000 movs r0, #0
|
|
8002434: f7ff ffce bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
8002438: 2010 movs r0, #16
|
|
800243a: f7ff ffcb bl 80023d4 <oled_WriteCommand>
|
|
|
|
HAL_I2C_Mem_Write(&hi2c1,OLED_I2C_ADDR,0x40,1,&OLED_Buffer[OLED_WIDTH * i],OLED_WIDTH,100);
|
|
800243e: 2364 movs r3, #100 @ 0x64
|
|
8002440: 9302 str r3, [sp, #8]
|
|
8002442: 2380 movs r3, #128 @ 0x80
|
|
8002444: 9301 str r3, [sp, #4]
|
|
8002446: 4b08 ldr r3, [pc, #32] @ (8002468 <oled_UpdateScreen+0x48>)
|
|
8002448: eb03 13c4 add.w r3, r3, r4, lsl #7
|
|
800244c: 9300 str r3, [sp, #0]
|
|
800244e: 2301 movs r3, #1
|
|
8002450: 2240 movs r2, #64 @ 0x40
|
|
8002452: 2178 movs r1, #120 @ 0x78
|
|
8002454: 4805 ldr r0, [pc, #20] @ (800246c <oled_UpdateScreen+0x4c>)
|
|
8002456: f7fe fd89 bl 8000f6c <HAL_I2C_Mem_Write>
|
|
for (i = 0; i < 8; i++) {
|
|
800245a: 3401 adds r4, #1
|
|
800245c: b2e4 uxtb r4, r4
|
|
800245e: 2c07 cmp r4, #7
|
|
8002460: d9e2 bls.n 8002428 <oled_UpdateScreen+0x8>
|
|
}
|
|
}
|
|
8002462: b004 add sp, #16
|
|
8002464: bd10 pop {r4, pc}
|
|
8002466: bf00 nop
|
|
8002468: 20000120 .word 0x20000120
|
|
800246c: 20000094 .word 0x20000094
|
|
|
|
08002470 <oled_Init>:
|
|
uint8_t oled_Init(void) {
|
|
8002470: b508 push {r3, lr}
|
|
HAL_Delay(100);
|
|
8002472: 2064 movs r0, #100 @ 0x64
|
|
8002474: f7fe f8ea bl 800064c <HAL_Delay>
|
|
oled_WriteCommand(0xAE);
|
|
8002478: 20ae movs r0, #174 @ 0xae
|
|
800247a: f7ff ffab bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x20);
|
|
800247e: 2020 movs r0, #32
|
|
8002480: f7ff ffa8 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
8002484: 2010 movs r0, #16
|
|
8002486: f7ff ffa5 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xB0);
|
|
800248a: 20b0 movs r0, #176 @ 0xb0
|
|
800248c: f7ff ffa2 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xC8);
|
|
8002490: 20c8 movs r0, #200 @ 0xc8
|
|
8002492: f7ff ff9f bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
8002496: 2000 movs r0, #0
|
|
8002498: f7ff ff9c bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x10);
|
|
800249c: 2010 movs r0, #16
|
|
800249e: f7ff ff99 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x40);
|
|
80024a2: 2040 movs r0, #64 @ 0x40
|
|
80024a4: f7ff ff96 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x81);
|
|
80024a8: 2081 movs r0, #129 @ 0x81
|
|
80024aa: f7ff ff93 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xFF);
|
|
80024ae: 20ff movs r0, #255 @ 0xff
|
|
80024b0: f7ff ff90 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xA1);
|
|
80024b4: 20a1 movs r0, #161 @ 0xa1
|
|
80024b6: f7ff ff8d bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xA6);
|
|
80024ba: 20a6 movs r0, #166 @ 0xa6
|
|
80024bc: f7ff ff8a bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xA8);
|
|
80024c0: 20a8 movs r0, #168 @ 0xa8
|
|
80024c2: f7ff ff87 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x3F);
|
|
80024c6: 203f movs r0, #63 @ 0x3f
|
|
80024c8: f7ff ff84 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xA4);
|
|
80024cc: 20a4 movs r0, #164 @ 0xa4
|
|
80024ce: f7ff ff81 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xD3);
|
|
80024d2: 20d3 movs r0, #211 @ 0xd3
|
|
80024d4: f7ff ff7e bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x00);
|
|
80024d8: 2000 movs r0, #0
|
|
80024da: f7ff ff7b bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xD5);
|
|
80024de: 20d5 movs r0, #213 @ 0xd5
|
|
80024e0: f7ff ff78 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xF0);
|
|
80024e4: 20f0 movs r0, #240 @ 0xf0
|
|
80024e6: f7ff ff75 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xD9);
|
|
80024ea: 20d9 movs r0, #217 @ 0xd9
|
|
80024ec: f7ff ff72 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x22);
|
|
80024f0: 2022 movs r0, #34 @ 0x22
|
|
80024f2: f7ff ff6f bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xDA);
|
|
80024f6: 20da movs r0, #218 @ 0xda
|
|
80024f8: f7ff ff6c bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x12);
|
|
80024fc: 2012 movs r0, #18
|
|
80024fe: f7ff ff69 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xDB);
|
|
8002502: 20db movs r0, #219 @ 0xdb
|
|
8002504: f7ff ff66 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x20);
|
|
8002508: 2020 movs r0, #32
|
|
800250a: f7ff ff63 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x8D);
|
|
800250e: 208d movs r0, #141 @ 0x8d
|
|
8002510: f7ff ff60 bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0x14);
|
|
8002514: 2014 movs r0, #20
|
|
8002516: f7ff ff5d bl 80023d4 <oled_WriteCommand>
|
|
oled_WriteCommand(0xAF);
|
|
800251a: 20af movs r0, #175 @ 0xaf
|
|
800251c: f7ff ff5a bl 80023d4 <oled_WriteCommand>
|
|
oled_Fill(Black);
|
|
8002520: 2000 movs r0, #0
|
|
8002522: f7ff ff6d bl 8002400 <oled_Fill>
|
|
oled_UpdateScreen();
|
|
8002526: f7ff ff7b bl 8002420 <oled_UpdateScreen>
|
|
OLED.CurrentX = 0;
|
|
800252a: 4b05 ldr r3, [pc, #20] @ (8002540 <oled_Init+0xd0>)
|
|
800252c: 2200 movs r2, #0
|
|
800252e: f8a3 2400 strh.w r2, [r3, #1024] @ 0x400
|
|
OLED.CurrentY = 0;
|
|
8002532: f8a3 2402 strh.w r2, [r3, #1026] @ 0x402
|
|
OLED.Initialized = 1;
|
|
8002536: 2001 movs r0, #1
|
|
8002538: f883 0405 strb.w r0, [r3, #1029] @ 0x405
|
|
}
|
|
800253c: bd08 pop {r3, pc}
|
|
800253e: bf00 nop
|
|
8002540: 20000120 .word 0x20000120
|
|
|
|
08002544 <oled_DrawPixel>:
|
|
|
|
void oled_DrawPixel(uint8_t x, uint8_t y, OLED_COLOR color) {
|
|
if (x >= OLED_WIDTH || y >= OLED_HEIGHT) {
|
|
8002544: f010 0f80 tst.w r0, #128 @ 0x80
|
|
8002548: d126 bne.n 8002598 <oled_DrawPixel+0x54>
|
|
800254a: 293f cmp r1, #63 @ 0x3f
|
|
800254c: d824 bhi.n 8002598 <oled_DrawPixel+0x54>
|
|
void oled_DrawPixel(uint8_t x, uint8_t y, OLED_COLOR color) {
|
|
800254e: b410 push {r4}
|
|
return;
|
|
}
|
|
|
|
if (OLED.Inverted) {
|
|
8002550: 4b12 ldr r3, [pc, #72] @ (800259c <oled_DrawPixel+0x58>)
|
|
8002552: f893 3404 ldrb.w r3, [r3, #1028] @ 0x404
|
|
8002556: b113 cbz r3, 800255e <oled_DrawPixel+0x1a>
|
|
color = (OLED_COLOR)!color;
|
|
8002558: fab2 f282 clz r2, r2
|
|
800255c: 0952 lsrs r2, r2, #5
|
|
}
|
|
|
|
if (color == White) {
|
|
800255e: 2a01 cmp r2, #1
|
|
8002560: d00f beq.n 8002582 <oled_DrawPixel+0x3e>
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] |= 1 << (y % 8);
|
|
} else {
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] &= ~(1 << (y % 8));
|
|
8002562: 08cb lsrs r3, r1, #3
|
|
8002564: eb00 10c3 add.w r0, r0, r3, lsl #7
|
|
8002568: 4c0c ldr r4, [pc, #48] @ (800259c <oled_DrawPixel+0x58>)
|
|
800256a: 5c22 ldrb r2, [r4, r0]
|
|
800256c: f001 0107 and.w r1, r1, #7
|
|
8002570: 2301 movs r3, #1
|
|
8002572: 408b lsls r3, r1
|
|
8002574: 43db mvns r3, r3
|
|
8002576: b25b sxtb r3, r3
|
|
8002578: 4013 ands r3, r2
|
|
800257a: 5423 strb r3, [r4, r0]
|
|
}
|
|
}
|
|
800257c: f85d 4b04 ldr.w r4, [sp], #4
|
|
8002580: 4770 bx lr
|
|
OLED_Buffer[x + (y / 8) * OLED_WIDTH] |= 1 << (y % 8);
|
|
8002582: 08cb lsrs r3, r1, #3
|
|
8002584: eb00 10c3 add.w r0, r0, r3, lsl #7
|
|
8002588: 4c04 ldr r4, [pc, #16] @ (800259c <oled_DrawPixel+0x58>)
|
|
800258a: 5c23 ldrb r3, [r4, r0]
|
|
800258c: f001 0107 and.w r1, r1, #7
|
|
8002590: 408a lsls r2, r1
|
|
8002592: 4313 orrs r3, r2
|
|
8002594: 5423 strb r3, [r4, r0]
|
|
8002596: e7f1 b.n 800257c <oled_DrawPixel+0x38>
|
|
8002598: 4770 bx lr
|
|
800259a: bf00 nop
|
|
800259c: 20000120 .word 0x20000120
|
|
|
|
080025a0 <oled_WriteChar>:
|
|
oled_DrawHLine(x1, x2, y1, color);
|
|
oled_DrawHLine(x1, x2, y2, color);
|
|
oled_DrawVLine(y1, y2, x1, color);
|
|
oled_DrawVLine(y1, y2, x2, color);
|
|
}
|
|
char oled_WriteChar(char ch, FontDef Font, OLED_COLOR color) {
|
|
80025a0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
80025a4: b082 sub sp, #8
|
|
80025a6: 4681 mov r9, r0
|
|
80025a8: a802 add r0, sp, #8
|
|
80025aa: e900 0006 stmdb r0, {r1, r2}
|
|
80025ae: 4698 mov r8, r3
|
|
uint32_t i, b, j;
|
|
|
|
if (OLED_WIDTH <= (OLED.CurrentX + Font.FontWidth) ||
|
|
80025b0: 4b27 ldr r3, [pc, #156] @ (8002650 <oled_WriteChar+0xb0>)
|
|
80025b2: f8b3 3400 ldrh.w r3, [r3, #1024] @ 0x400
|
|
80025b6: f89d 6000 ldrb.w r6, [sp]
|
|
80025ba: 4433 add r3, r6
|
|
80025bc: 2b7f cmp r3, #127 @ 0x7f
|
|
80025be: dc42 bgt.n 8002646 <oled_WriteChar+0xa6>
|
|
OLED_HEIGHT <= (OLED.CurrentY + Font.FontHeight)) {
|
|
80025c0: 4b23 ldr r3, [pc, #140] @ (8002650 <oled_WriteChar+0xb0>)
|
|
80025c2: f8b3 3402 ldrh.w r3, [r3, #1026] @ 0x402
|
|
80025c6: f89d a001 ldrb.w sl, [sp, #1]
|
|
80025ca: 4453 add r3, sl
|
|
if (OLED_WIDTH <= (OLED.CurrentX + Font.FontWidth) ||
|
|
80025cc: 2b3f cmp r3, #63 @ 0x3f
|
|
80025ce: dc3c bgt.n 800264a <oled_WriteChar+0xaa>
|
|
return 0;
|
|
}
|
|
|
|
for (i = 0; i < Font.FontHeight; i++) {
|
|
80025d0: 2500 movs r5, #0
|
|
80025d2: e023 b.n 800261c <oled_WriteChar+0x7c>
|
|
b = Font.data[(ch - 32) * Font.FontHeight + i];
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
if ((b << j) & 0x8000) {
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR) color);
|
|
} else {
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR)!color);
|
|
80025d4: 4b1e ldr r3, [pc, #120] @ (8002650 <oled_WriteChar+0xb0>)
|
|
80025d6: f8b3 0400 ldrh.w r0, [r3, #1024] @ 0x400
|
|
80025da: f8b3 1402 ldrh.w r1, [r3, #1026] @ 0x402
|
|
80025de: 4429 add r1, r5
|
|
80025e0: 4420 add r0, r4
|
|
80025e2: fab8 f288 clz r2, r8
|
|
80025e6: 0952 lsrs r2, r2, #5
|
|
80025e8: b2c9 uxtb r1, r1
|
|
80025ea: b2c0 uxtb r0, r0
|
|
80025ec: f7ff ffaa bl 8002544 <oled_DrawPixel>
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
80025f0: 3401 adds r4, #1
|
|
80025f2: 42a6 cmp r6, r4
|
|
80025f4: d911 bls.n 800261a <oled_WriteChar+0x7a>
|
|
if ((b << j) & 0x8000) {
|
|
80025f6: fa07 f304 lsl.w r3, r7, r4
|
|
80025fa: f413 4f00 tst.w r3, #32768 @ 0x8000
|
|
80025fe: d0e9 beq.n 80025d4 <oled_WriteChar+0x34>
|
|
oled_DrawPixel(OLED.CurrentX + j, (OLED.CurrentY + i), (OLED_COLOR) color);
|
|
8002600: 4b13 ldr r3, [pc, #76] @ (8002650 <oled_WriteChar+0xb0>)
|
|
8002602: f8b3 0400 ldrh.w r0, [r3, #1024] @ 0x400
|
|
8002606: f8b3 1402 ldrh.w r1, [r3, #1026] @ 0x402
|
|
800260a: 4429 add r1, r5
|
|
800260c: 4420 add r0, r4
|
|
800260e: 4642 mov r2, r8
|
|
8002610: b2c9 uxtb r1, r1
|
|
8002612: b2c0 uxtb r0, r0
|
|
8002614: f7ff ff96 bl 8002544 <oled_DrawPixel>
|
|
8002618: e7ea b.n 80025f0 <oled_WriteChar+0x50>
|
|
for (i = 0; i < Font.FontHeight; i++) {
|
|
800261a: 3501 adds r5, #1
|
|
800261c: 45aa cmp sl, r5
|
|
800261e: d908 bls.n 8002632 <oled_WriteChar+0x92>
|
|
b = Font.data[(ch - 32) * Font.FontHeight + i];
|
|
8002620: f1a9 0320 sub.w r3, r9, #32
|
|
8002624: fb03 530a mla r3, r3, sl, r5
|
|
8002628: 9a01 ldr r2, [sp, #4]
|
|
800262a: f832 7013 ldrh.w r7, [r2, r3, lsl #1]
|
|
for (j = 0; j < Font.FontWidth; j++) {
|
|
800262e: 2400 movs r4, #0
|
|
8002630: e7df b.n 80025f2 <oled_WriteChar+0x52>
|
|
}
|
|
}
|
|
}
|
|
|
|
OLED.CurrentX += Font.FontWidth;
|
|
8002632: 4a07 ldr r2, [pc, #28] @ (8002650 <oled_WriteChar+0xb0>)
|
|
8002634: f8b2 3400 ldrh.w r3, [r2, #1024] @ 0x400
|
|
8002638: 4433 add r3, r6
|
|
800263a: f8a2 3400 strh.w r3, [r2, #1024] @ 0x400
|
|
|
|
return ch;
|
|
800263e: 4648 mov r0, r9
|
|
}
|
|
8002640: b002 add sp, #8
|
|
8002642: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
return 0;
|
|
8002646: 2000 movs r0, #0
|
|
8002648: e7fa b.n 8002640 <oled_WriteChar+0xa0>
|
|
800264a: 2000 movs r0, #0
|
|
800264c: e7f8 b.n 8002640 <oled_WriteChar+0xa0>
|
|
800264e: bf00 nop
|
|
8002650: 20000120 .word 0x20000120
|
|
|
|
08002654 <oled_WriteString>:
|
|
|
|
|
|
char oled_WriteString(char* str, FontDef Font, OLED_COLOR color) {
|
|
8002654: b530 push {r4, r5, lr}
|
|
8002656: b083 sub sp, #12
|
|
8002658: 4604 mov r4, r0
|
|
800265a: a802 add r0, sp, #8
|
|
800265c: e900 0006 stmdb r0, {r1, r2}
|
|
8002660: 461d mov r5, r3
|
|
while (*str) {
|
|
8002662: e000 b.n 8002666 <oled_WriteString+0x12>
|
|
if (oled_WriteChar(*str, Font, color) != *str) {
|
|
return *str;
|
|
}
|
|
str++;
|
|
8002664: 3401 adds r4, #1
|
|
while (*str) {
|
|
8002666: 7820 ldrb r0, [r4, #0]
|
|
8002668: b148 cbz r0, 800267e <oled_WriteString+0x2a>
|
|
if (oled_WriteChar(*str, Font, color) != *str) {
|
|
800266a: 462b mov r3, r5
|
|
800266c: aa02 add r2, sp, #8
|
|
800266e: e912 0006 ldmdb r2, {r1, r2}
|
|
8002672: f7ff ff95 bl 80025a0 <oled_WriteChar>
|
|
8002676: 4602 mov r2, r0
|
|
8002678: 7820 ldrb r0, [r4, #0]
|
|
800267a: 4282 cmp r2, r0
|
|
800267c: d0f2 beq.n 8002664 <oled_WriteString+0x10>
|
|
}
|
|
return *str;
|
|
}
|
|
800267e: b003 add sp, #12
|
|
8002680: bd30 pop {r4, r5, pc}
|
|
...
|
|
|
|
08002684 <oled_SetCursor>:
|
|
|
|
void oled_SetCursor(uint8_t x, uint8_t y) {
|
|
OLED.CurrentX = x;
|
|
8002684: 4b02 ldr r3, [pc, #8] @ (8002690 <oled_SetCursor+0xc>)
|
|
8002686: f8a3 0400 strh.w r0, [r3, #1024] @ 0x400
|
|
OLED.CurrentY = y;
|
|
800268a: f8a3 1402 strh.w r1, [r3, #1026] @ 0x402
|
|
}
|
|
800268e: 4770 bx lr
|
|
8002690: 20000120 .word 0x20000120
|
|
|
|
08002694 <PCA9538_Read_Register>:
|
|
#include "main.h"
|
|
#include "i2c.h"
|
|
#include "sdk_uart.h"
|
|
#include "pca9538.h"
|
|
|
|
HAL_StatusTypeDef PCA9538_Read_Register(uint16_t addr, pca9538_regs_t reg, uint8_t* buf) {
|
|
8002694: b500 push {lr}
|
|
8002696: b085 sub sp, #20
|
|
return HAL_I2C_Mem_Read(&hi2c1, addr | 1, reg, 1, buf, 1, 100);
|
|
8002698: 2364 movs r3, #100 @ 0x64
|
|
800269a: 9302 str r3, [sp, #8]
|
|
800269c: 2301 movs r3, #1
|
|
800269e: 9301 str r3, [sp, #4]
|
|
80026a0: 9200 str r2, [sp, #0]
|
|
80026a2: 460a mov r2, r1
|
|
80026a4: ea40 0103 orr.w r1, r0, r3
|
|
80026a8: 4802 ldr r0, [pc, #8] @ (80026b4 <PCA9538_Read_Register+0x20>)
|
|
80026aa: f7fe fd11 bl 80010d0 <HAL_I2C_Mem_Read>
|
|
}
|
|
80026ae: b005 add sp, #20
|
|
80026b0: f85d fb04 ldr.w pc, [sp], #4
|
|
80026b4: 20000094 .word 0x20000094
|
|
|
|
080026b8 <PCA9538_Write_Register>:
|
|
|
|
|
|
HAL_StatusTypeDef PCA9538_Write_Register(uint16_t addr, pca9538_regs_t reg, uint8_t* buf) {
|
|
80026b8: b500 push {lr}
|
|
80026ba: b085 sub sp, #20
|
|
return HAL_I2C_Mem_Write(&hi2c1, addr & 0xFFFE, reg, 1, buf, 1, 100);
|
|
80026bc: f020 0001 bic.w r0, r0, #1
|
|
80026c0: 2364 movs r3, #100 @ 0x64
|
|
80026c2: 9302 str r3, [sp, #8]
|
|
80026c4: 2301 movs r3, #1
|
|
80026c6: 9301 str r3, [sp, #4]
|
|
80026c8: 9200 str r2, [sp, #0]
|
|
80026ca: 460a mov r2, r1
|
|
80026cc: 4601 mov r1, r0
|
|
80026ce: 4803 ldr r0, [pc, #12] @ (80026dc <PCA9538_Write_Register+0x24>)
|
|
80026d0: f7fe fc4c bl 8000f6c <HAL_I2C_Mem_Write>
|
|
}
|
|
80026d4: b005 add sp, #20
|
|
80026d6: f85d fb04 ldr.w pc, [sp], #4
|
|
80026da: bf00 nop
|
|
80026dc: 20000094 .word 0x20000094
|
|
|
|
080026e0 <PCA9538_Read_Inputs>:
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
HAL_StatusTypeDef PCA9538_Read_Inputs(uint16_t addr, uint8_t* buf) {
|
|
80026e0: b508 push {r3, lr}
|
|
80026e2: 460a mov r2, r1
|
|
return PCA9538_Read_Register(addr, INPUT_PORT, buf);
|
|
80026e4: 2100 movs r1, #0
|
|
80026e6: f7ff ffd5 bl 8002694 <PCA9538_Read_Register>
|
|
}
|
|
80026ea: bd08 pop {r3, pc}
|
|
|
|
080026ec <UART_Transmit>:
|
|
#include "sdk_uart.h"
|
|
#include "usart.h"
|
|
#include <string.h>
|
|
|
|
|
|
void UART_Transmit(uint8_t data[]){
|
|
80026ec: b510 push {r4, lr}
|
|
80026ee: 4604 mov r4, r0
|
|
HAL_UART_Transmit(&huart6, data, strlen((const char*)data), 1000);
|
|
80026f0: f7fd fd6e bl 80001d0 <strlen>
|
|
80026f4: f44f 737a mov.w r3, #1000 @ 0x3e8
|
|
80026f8: b282 uxth r2, r0
|
|
80026fa: 4621 mov r1, r4
|
|
80026fc: 4801 ldr r0, [pc, #4] @ (8002704 <UART_Transmit+0x18>)
|
|
80026fe: f7ff fac6 bl 8001c8e <HAL_UART_Transmit>
|
|
}
|
|
8002702: bd10 pop {r4, pc}
|
|
8002704: 20000530 .word 0x20000530
|
|
|
|
08002708 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
8002708: b082 sub sp, #8
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
800270a: 2100 movs r1, #0
|
|
800270c: 9100 str r1, [sp, #0]
|
|
800270e: 4b0b ldr r3, [pc, #44] @ (800273c <HAL_MspInit+0x34>)
|
|
8002710: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
8002712: f442 4280 orr.w r2, r2, #16384 @ 0x4000
|
|
8002716: 645a str r2, [r3, #68] @ 0x44
|
|
8002718: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
800271a: f402 4280 and.w r2, r2, #16384 @ 0x4000
|
|
800271e: 9200 str r2, [sp, #0]
|
|
8002720: 9a00 ldr r2, [sp, #0]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8002722: 9101 str r1, [sp, #4]
|
|
8002724: 6c1a ldr r2, [r3, #64] @ 0x40
|
|
8002726: f042 5280 orr.w r2, r2, #268435456 @ 0x10000000
|
|
800272a: 641a str r2, [r3, #64] @ 0x40
|
|
800272c: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
800272e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
|
|
8002732: 9301 str r3, [sp, #4]
|
|
8002734: 9b01 ldr r3, [sp, #4]
|
|
/* System interrupt init*/
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
8002736: b002 add sp, #8
|
|
8002738: 4770 bx lr
|
|
800273a: bf00 nop
|
|
800273c: 40023800 .word 0x40023800
|
|
|
|
08002740 <NMI_Handler>:
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
|
}
|
|
8002740: 4770 bx lr
|
|
|
|
08002742 <HardFault_Handler>:
|
|
void HardFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
8002742: e7fe b.n 8002742 <HardFault_Handler>
|
|
|
|
08002744 <MemManage_Handler>:
|
|
void MemManage_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
8002744: e7fe b.n 8002744 <MemManage_Handler>
|
|
|
|
08002746 <BusFault_Handler>:
|
|
void BusFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
8002746: e7fe b.n 8002746 <BusFault_Handler>
|
|
|
|
08002748 <UsageFault_Handler>:
|
|
void UsageFault_Handler(void)
|
|
{
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
8002748: e7fe b.n 8002748 <UsageFault_Handler>
|
|
|
|
0800274a <SVC_Handler>:
|
|
|
|
/* USER CODE END SVCall_IRQn 0 */
|
|
/* USER CODE BEGIN SVCall_IRQn 1 */
|
|
|
|
/* USER CODE END SVCall_IRQn 1 */
|
|
}
|
|
800274a: 4770 bx lr
|
|
|
|
0800274c <DebugMon_Handler>:
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
800274c: 4770 bx lr
|
|
|
|
0800274e <PendSV_Handler>:
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
800274e: 4770 bx lr
|
|
|
|
08002750 <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
8002750: b508 push {r3, lr}
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
8002752: f7fd ff69 bl 8000628 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
8002756: bd08 pop {r3, pc}
|
|
|
|
08002758 <_sbrk>:
|
|
}
|
|
return len;
|
|
}
|
|
|
|
caddr_t _sbrk(int incr)
|
|
{
|
|
8002758: b508 push {r3, lr}
|
|
800275a: 4603 mov r3, r0
|
|
extern char end asm("end");
|
|
static char *heap_end;
|
|
char *prev_heap_end;
|
|
|
|
if (heap_end == 0)
|
|
800275c: 4a0b ldr r2, [pc, #44] @ (800278c <_sbrk+0x34>)
|
|
800275e: 6812 ldr r2, [r2, #0]
|
|
8002760: b142 cbz r2, 8002774 <_sbrk+0x1c>
|
|
heap_end = &end;
|
|
|
|
prev_heap_end = heap_end;
|
|
8002762: 4a0a ldr r2, [pc, #40] @ (800278c <_sbrk+0x34>)
|
|
8002764: 6810 ldr r0, [r2, #0]
|
|
if (heap_end + incr > stack_ptr)
|
|
8002766: 4403 add r3, r0
|
|
8002768: 466a mov r2, sp
|
|
800276a: 4293 cmp r3, r2
|
|
800276c: d806 bhi.n 800277c <_sbrk+0x24>
|
|
// abort();
|
|
errno = ENOMEM;
|
|
return (caddr_t) -1;
|
|
}
|
|
|
|
heap_end += incr;
|
|
800276e: 4a07 ldr r2, [pc, #28] @ (800278c <_sbrk+0x34>)
|
|
8002770: 6013 str r3, [r2, #0]
|
|
|
|
return (caddr_t) prev_heap_end;
|
|
}
|
|
8002772: bd08 pop {r3, pc}
|
|
heap_end = &end;
|
|
8002774: 4a05 ldr r2, [pc, #20] @ (800278c <_sbrk+0x34>)
|
|
8002776: 4906 ldr r1, [pc, #24] @ (8002790 <_sbrk+0x38>)
|
|
8002778: 6011 str r1, [r2, #0]
|
|
800277a: e7f2 b.n 8002762 <_sbrk+0xa>
|
|
errno = ENOMEM;
|
|
800277c: f000 f8d6 bl 800292c <__errno>
|
|
8002780: 230c movs r3, #12
|
|
8002782: 6003 str r3, [r0, #0]
|
|
return (caddr_t) -1;
|
|
8002784: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002788: e7f3 b.n 8002772 <_sbrk+0x1a>
|
|
800278a: bf00 nop
|
|
800278c: 20000528 .word 0x20000528
|
|
8002790: 200006b8 .word 0x200006b8
|
|
|
|
08002794 <SystemInit>:
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
/* FPU settings ------------------------------------------------------------*/
|
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
|
8002794: 490f ldr r1, [pc, #60] @ (80027d4 <SystemInit+0x40>)
|
|
8002796: f8d1 3088 ldr.w r3, [r1, #136] @ 0x88
|
|
800279a: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
|
|
800279e: f8c1 3088 str.w r3, [r1, #136] @ 0x88
|
|
#endif
|
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
|
/* Set HSION bit */
|
|
RCC->CR |= (uint32_t)0x00000001;
|
|
80027a2: 4b0d ldr r3, [pc, #52] @ (80027d8 <SystemInit+0x44>)
|
|
80027a4: 681a ldr r2, [r3, #0]
|
|
80027a6: f042 0201 orr.w r2, r2, #1
|
|
80027aa: 601a str r2, [r3, #0]
|
|
|
|
/* Reset CFGR register */
|
|
RCC->CFGR = 0x00000000;
|
|
80027ac: 2000 movs r0, #0
|
|
80027ae: 6098 str r0, [r3, #8]
|
|
|
|
/* Reset HSEON, CSSON and PLLON bits */
|
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
|
80027b0: 681a ldr r2, [r3, #0]
|
|
80027b2: f022 7284 bic.w r2, r2, #17301504 @ 0x1080000
|
|
80027b6: f422 3280 bic.w r2, r2, #65536 @ 0x10000
|
|
80027ba: 601a str r2, [r3, #0]
|
|
|
|
/* Reset PLLCFGR register */
|
|
RCC->PLLCFGR = 0x24003010;
|
|
80027bc: 4a07 ldr r2, [pc, #28] @ (80027dc <SystemInit+0x48>)
|
|
80027be: 605a str r2, [r3, #4]
|
|
|
|
/* Reset HSEBYP bit */
|
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
|
80027c0: 681a ldr r2, [r3, #0]
|
|
80027c2: f422 2280 bic.w r2, r2, #262144 @ 0x40000
|
|
80027c6: 601a str r2, [r3, #0]
|
|
|
|
/* Disable all interrupts */
|
|
RCC->CIR = 0x00000000;
|
|
80027c8: 60d8 str r0, [r3, #12]
|
|
|
|
/* Configure the Vector Table location add offset address ------------------*/
|
|
#ifdef VECT_TAB_SRAM
|
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
|
#else
|
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
|
80027ca: f04f 6300 mov.w r3, #134217728 @ 0x8000000
|
|
80027ce: 608b str r3, [r1, #8]
|
|
#endif
|
|
}
|
|
80027d0: 4770 bx lr
|
|
80027d2: bf00 nop
|
|
80027d4: e000ed00 .word 0xe000ed00
|
|
80027d8: 40023800 .word 0x40023800
|
|
80027dc: 24003010 .word 0x24003010
|
|
|
|
080027e0 <MX_USART6_UART_Init>:
|
|
UART_HandleTypeDef huart6;
|
|
|
|
/* USART6 init function */
|
|
|
|
void MX_USART6_UART_Init(void)
|
|
{
|
|
80027e0: b508 push {r3, lr}
|
|
|
|
huart6.Instance = USART6;
|
|
80027e2: 480a ldr r0, [pc, #40] @ (800280c <MX_USART6_UART_Init+0x2c>)
|
|
80027e4: 4b0a ldr r3, [pc, #40] @ (8002810 <MX_USART6_UART_Init+0x30>)
|
|
80027e6: 6003 str r3, [r0, #0]
|
|
huart6.Init.BaudRate = 115200;
|
|
80027e8: f44f 33e1 mov.w r3, #115200 @ 0x1c200
|
|
80027ec: 6043 str r3, [r0, #4]
|
|
huart6.Init.WordLength = UART_WORDLENGTH_8B;
|
|
80027ee: 2300 movs r3, #0
|
|
80027f0: 6083 str r3, [r0, #8]
|
|
huart6.Init.StopBits = UART_STOPBITS_1;
|
|
80027f2: 60c3 str r3, [r0, #12]
|
|
huart6.Init.Parity = UART_PARITY_NONE;
|
|
80027f4: 6103 str r3, [r0, #16]
|
|
huart6.Init.Mode = UART_MODE_TX_RX;
|
|
80027f6: 220c movs r2, #12
|
|
80027f8: 6142 str r2, [r0, #20]
|
|
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
80027fa: 6183 str r3, [r0, #24]
|
|
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
|
|
80027fc: 61c3 str r3, [r0, #28]
|
|
if (HAL_UART_Init(&huart6) != HAL_OK)
|
|
80027fe: f7ff fa17 bl 8001c30 <HAL_UART_Init>
|
|
8002802: b900 cbnz r0, 8002806 <MX_USART6_UART_Init+0x26>
|
|
{
|
|
Error_Handler();
|
|
}
|
|
|
|
}
|
|
8002804: bd08 pop {r3, pc}
|
|
Error_Handler();
|
|
8002806: f7ff fd5d bl 80022c4 <Error_Handler>
|
|
}
|
|
800280a: e7fb b.n 8002804 <MX_USART6_UART_Init+0x24>
|
|
800280c: 20000530 .word 0x20000530
|
|
8002810: 40011400 .word 0x40011400
|
|
|
|
08002814 <HAL_UART_MspInit>:
|
|
|
|
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
|
{
|
|
8002814: b500 push {lr}
|
|
8002816: b089 sub sp, #36 @ 0x24
|
|
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8002818: 2300 movs r3, #0
|
|
800281a: 9303 str r3, [sp, #12]
|
|
800281c: 9304 str r3, [sp, #16]
|
|
800281e: 9305 str r3, [sp, #20]
|
|
8002820: 9306 str r3, [sp, #24]
|
|
8002822: 9307 str r3, [sp, #28]
|
|
if(uartHandle->Instance==USART6)
|
|
8002824: 6802 ldr r2, [r0, #0]
|
|
8002826: 4b15 ldr r3, [pc, #84] @ (800287c <HAL_UART_MspInit+0x68>)
|
|
8002828: 429a cmp r2, r3
|
|
800282a: d002 beq.n 8002832 <HAL_UART_MspInit+0x1e>
|
|
|
|
/* USER CODE BEGIN USART6_MspInit 1 */
|
|
|
|
/* USER CODE END USART6_MspInit 1 */
|
|
}
|
|
}
|
|
800282c: b009 add sp, #36 @ 0x24
|
|
800282e: f85d fb04 ldr.w pc, [sp], #4
|
|
__HAL_RCC_USART6_CLK_ENABLE();
|
|
8002832: 2100 movs r1, #0
|
|
8002834: 9101 str r1, [sp, #4]
|
|
8002836: f503 3392 add.w r3, r3, #74752 @ 0x12400
|
|
800283a: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
800283c: f042 0220 orr.w r2, r2, #32
|
|
8002840: 645a str r2, [r3, #68] @ 0x44
|
|
8002842: 6c5a ldr r2, [r3, #68] @ 0x44
|
|
8002844: f002 0220 and.w r2, r2, #32
|
|
8002848: 9201 str r2, [sp, #4]
|
|
800284a: 9a01 ldr r2, [sp, #4]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
800284c: 9102 str r1, [sp, #8]
|
|
800284e: 6b1a ldr r2, [r3, #48] @ 0x30
|
|
8002850: f042 0204 orr.w r2, r2, #4
|
|
8002854: 631a str r2, [r3, #48] @ 0x30
|
|
8002856: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
8002858: f003 0304 and.w r3, r3, #4
|
|
800285c: 9302 str r3, [sp, #8]
|
|
800285e: 9b02 ldr r3, [sp, #8]
|
|
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
|
8002860: 23c0 movs r3, #192 @ 0xc0
|
|
8002862: 9303 str r3, [sp, #12]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
8002864: 2302 movs r3, #2
|
|
8002866: 9304 str r3, [sp, #16]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
8002868: 2303 movs r3, #3
|
|
800286a: 9306 str r3, [sp, #24]
|
|
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
|
|
800286c: 2308 movs r3, #8
|
|
800286e: 9307 str r3, [sp, #28]
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
8002870: a903 add r1, sp, #12
|
|
8002872: 4803 ldr r0, [pc, #12] @ (8002880 <HAL_UART_MspInit+0x6c>)
|
|
8002874: f7fd ff68 bl 8000748 <HAL_GPIO_Init>
|
|
}
|
|
8002878: e7d8 b.n 800282c <HAL_UART_MspInit+0x18>
|
|
800287a: bf00 nop
|
|
800287c: 40011400 .word 0x40011400
|
|
8002880: 40020800 .word 0x40020800
|
|
|
|
08002884 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr sp, =_estack /* set stack pointer */
|
|
8002884: f8df d034 ldr.w sp, [pc, #52] @ 80028bc <LoopFillZerobss+0x14>
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
movs r1, #0
|
|
8002888: 2100 movs r1, #0
|
|
b LoopCopyDataInit
|
|
800288a: e003 b.n 8002894 <LoopCopyDataInit>
|
|
|
|
0800288c <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r3, =_sidata
|
|
800288c: 4b0c ldr r3, [pc, #48] @ (80028c0 <LoopFillZerobss+0x18>)
|
|
ldr r3, [r3, r1]
|
|
800288e: 585b ldr r3, [r3, r1]
|
|
str r3, [r0, r1]
|
|
8002890: 5043 str r3, [r0, r1]
|
|
adds r1, r1, #4
|
|
8002892: 3104 adds r1, #4
|
|
|
|
08002894 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
ldr r0, =_sdata
|
|
8002894: 480b ldr r0, [pc, #44] @ (80028c4 <LoopFillZerobss+0x1c>)
|
|
ldr r3, =_edata
|
|
8002896: 4b0c ldr r3, [pc, #48] @ (80028c8 <LoopFillZerobss+0x20>)
|
|
adds r2, r0, r1
|
|
8002898: 1842 adds r2, r0, r1
|
|
cmp r2, r3
|
|
800289a: 429a cmp r2, r3
|
|
bcc CopyDataInit
|
|
800289c: d3f6 bcc.n 800288c <CopyDataInit>
|
|
ldr r2, =_sbss
|
|
800289e: 4a0b ldr r2, [pc, #44] @ (80028cc <LoopFillZerobss+0x24>)
|
|
b LoopFillZerobss
|
|
80028a0: e002 b.n 80028a8 <LoopFillZerobss>
|
|
|
|
080028a2 <FillZerobss>:
|
|
/* Zero fill the bss segment. */
|
|
FillZerobss:
|
|
movs r3, #0
|
|
80028a2: 2300 movs r3, #0
|
|
str r3, [r2], #4
|
|
80028a4: f842 3b04 str.w r3, [r2], #4
|
|
|
|
080028a8 <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
ldr r3, = _ebss
|
|
80028a8: 4b09 ldr r3, [pc, #36] @ (80028d0 <LoopFillZerobss+0x28>)
|
|
cmp r2, r3
|
|
80028aa: 429a cmp r2, r3
|
|
bcc FillZerobss
|
|
80028ac: d3f9 bcc.n 80028a2 <FillZerobss>
|
|
|
|
/* Call the clock system intitialization function.*/
|
|
bl SystemInit
|
|
80028ae: f7ff ff71 bl 8002794 <SystemInit>
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
80028b2: f000 f841 bl 8002938 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
80028b6: f7ff fd5d bl 8002374 <main>
|
|
bx lr
|
|
80028ba: 4770 bx lr
|
|
ldr sp, =_estack /* set stack pointer */
|
|
80028bc: 20020000 .word 0x20020000
|
|
ldr r3, =_sidata
|
|
80028c0: 08005b64 .word 0x08005b64
|
|
ldr r0, =_sdata
|
|
80028c4: 20000000 .word 0x20000000
|
|
ldr r3, =_edata
|
|
80028c8: 20000074 .word 0x20000074
|
|
ldr r2, =_sbss
|
|
80028cc: 20000074 .word 0x20000074
|
|
ldr r3, = _ebss
|
|
80028d0: 200006b8 .word 0x200006b8
|
|
|
|
080028d4 <ADC_IRQHandler>:
|
|
* @retval None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
80028d4: e7fe b.n 80028d4 <ADC_IRQHandler>
|
|
...
|
|
|
|
080028d8 <siprintf>:
|
|
80028d8: b40e push {r1, r2, r3}
|
|
80028da: b510 push {r4, lr}
|
|
80028dc: b09d sub sp, #116 @ 0x74
|
|
80028de: ab1f add r3, sp, #124 @ 0x7c
|
|
80028e0: 9002 str r0, [sp, #8]
|
|
80028e2: 9006 str r0, [sp, #24]
|
|
80028e4: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
|
|
80028e8: 480a ldr r0, [pc, #40] @ (8002914 <siprintf+0x3c>)
|
|
80028ea: 9107 str r1, [sp, #28]
|
|
80028ec: 9104 str r1, [sp, #16]
|
|
80028ee: 490a ldr r1, [pc, #40] @ (8002918 <siprintf+0x40>)
|
|
80028f0: f853 2b04 ldr.w r2, [r3], #4
|
|
80028f4: 9105 str r1, [sp, #20]
|
|
80028f6: 2400 movs r4, #0
|
|
80028f8: a902 add r1, sp, #8
|
|
80028fa: 6800 ldr r0, [r0, #0]
|
|
80028fc: 9301 str r3, [sp, #4]
|
|
80028fe: 941b str r4, [sp, #108] @ 0x6c
|
|
8002900: f000 f994 bl 8002c2c <_svfiprintf_r>
|
|
8002904: 9b02 ldr r3, [sp, #8]
|
|
8002906: 701c strb r4, [r3, #0]
|
|
8002908: b01d add sp, #116 @ 0x74
|
|
800290a: e8bd 4010 ldmia.w sp!, {r4, lr}
|
|
800290e: b003 add sp, #12
|
|
8002910: 4770 bx lr
|
|
8002912: bf00 nop
|
|
8002914: 20000024 .word 0x20000024
|
|
8002918: ffff0208 .word 0xffff0208
|
|
|
|
0800291c <memset>:
|
|
800291c: 4402 add r2, r0
|
|
800291e: 4603 mov r3, r0
|
|
8002920: 4293 cmp r3, r2
|
|
8002922: d100 bne.n 8002926 <memset+0xa>
|
|
8002924: 4770 bx lr
|
|
8002926: f803 1b01 strb.w r1, [r3], #1
|
|
800292a: e7f9 b.n 8002920 <memset+0x4>
|
|
|
|
0800292c <__errno>:
|
|
800292c: 4b01 ldr r3, [pc, #4] @ (8002934 <__errno+0x8>)
|
|
800292e: 6818 ldr r0, [r3, #0]
|
|
8002930: 4770 bx lr
|
|
8002932: bf00 nop
|
|
8002934: 20000024 .word 0x20000024
|
|
|
|
08002938 <__libc_init_array>:
|
|
8002938: b570 push {r4, r5, r6, lr}
|
|
800293a: 4d0d ldr r5, [pc, #52] @ (8002970 <__libc_init_array+0x38>)
|
|
800293c: 4c0d ldr r4, [pc, #52] @ (8002974 <__libc_init_array+0x3c>)
|
|
800293e: 1b64 subs r4, r4, r5
|
|
8002940: 10a4 asrs r4, r4, #2
|
|
8002942: 2600 movs r6, #0
|
|
8002944: 42a6 cmp r6, r4
|
|
8002946: d109 bne.n 800295c <__libc_init_array+0x24>
|
|
8002948: 4d0b ldr r5, [pc, #44] @ (8002978 <__libc_init_array+0x40>)
|
|
800294a: 4c0c ldr r4, [pc, #48] @ (800297c <__libc_init_array+0x44>)
|
|
800294c: f000 fc64 bl 8003218 <_init>
|
|
8002950: 1b64 subs r4, r4, r5
|
|
8002952: 10a4 asrs r4, r4, #2
|
|
8002954: 2600 movs r6, #0
|
|
8002956: 42a6 cmp r6, r4
|
|
8002958: d105 bne.n 8002966 <__libc_init_array+0x2e>
|
|
800295a: bd70 pop {r4, r5, r6, pc}
|
|
800295c: f855 3b04 ldr.w r3, [r5], #4
|
|
8002960: 4798 blx r3
|
|
8002962: 3601 adds r6, #1
|
|
8002964: e7ee b.n 8002944 <__libc_init_array+0xc>
|
|
8002966: f855 3b04 ldr.w r3, [r5], #4
|
|
800296a: 4798 blx r3
|
|
800296c: 3601 adds r6, #1
|
|
800296e: e7f2 b.n 8002956 <__libc_init_array+0x1e>
|
|
8002970: 08005b5c .word 0x08005b5c
|
|
8002974: 08005b5c .word 0x08005b5c
|
|
8002978: 08005b5c .word 0x08005b5c
|
|
800297c: 08005b60 .word 0x08005b60
|
|
|
|
08002980 <__retarget_lock_acquire_recursive>:
|
|
8002980: 4770 bx lr
|
|
|
|
08002982 <__retarget_lock_release_recursive>:
|
|
8002982: 4770 bx lr
|
|
|
|
08002984 <_free_r>:
|
|
8002984: b538 push {r3, r4, r5, lr}
|
|
8002986: 4605 mov r5, r0
|
|
8002988: 2900 cmp r1, #0
|
|
800298a: d041 beq.n 8002a10 <_free_r+0x8c>
|
|
800298c: f851 3c04 ldr.w r3, [r1, #-4]
|
|
8002990: 1f0c subs r4, r1, #4
|
|
8002992: 2b00 cmp r3, #0
|
|
8002994: bfb8 it lt
|
|
8002996: 18e4 addlt r4, r4, r3
|
|
8002998: f000 f8e0 bl 8002b5c <__malloc_lock>
|
|
800299c: 4a1d ldr r2, [pc, #116] @ (8002a14 <_free_r+0x90>)
|
|
800299e: 6813 ldr r3, [r2, #0]
|
|
80029a0: b933 cbnz r3, 80029b0 <_free_r+0x2c>
|
|
80029a2: 6063 str r3, [r4, #4]
|
|
80029a4: 6014 str r4, [r2, #0]
|
|
80029a6: 4628 mov r0, r5
|
|
80029a8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
80029ac: f000 b8dc b.w 8002b68 <__malloc_unlock>
|
|
80029b0: 42a3 cmp r3, r4
|
|
80029b2: d908 bls.n 80029c6 <_free_r+0x42>
|
|
80029b4: 6820 ldr r0, [r4, #0]
|
|
80029b6: 1821 adds r1, r4, r0
|
|
80029b8: 428b cmp r3, r1
|
|
80029ba: bf01 itttt eq
|
|
80029bc: 6819 ldreq r1, [r3, #0]
|
|
80029be: 685b ldreq r3, [r3, #4]
|
|
80029c0: 1809 addeq r1, r1, r0
|
|
80029c2: 6021 streq r1, [r4, #0]
|
|
80029c4: e7ed b.n 80029a2 <_free_r+0x1e>
|
|
80029c6: 461a mov r2, r3
|
|
80029c8: 685b ldr r3, [r3, #4]
|
|
80029ca: b10b cbz r3, 80029d0 <_free_r+0x4c>
|
|
80029cc: 42a3 cmp r3, r4
|
|
80029ce: d9fa bls.n 80029c6 <_free_r+0x42>
|
|
80029d0: 6811 ldr r1, [r2, #0]
|
|
80029d2: 1850 adds r0, r2, r1
|
|
80029d4: 42a0 cmp r0, r4
|
|
80029d6: d10b bne.n 80029f0 <_free_r+0x6c>
|
|
80029d8: 6820 ldr r0, [r4, #0]
|
|
80029da: 4401 add r1, r0
|
|
80029dc: 1850 adds r0, r2, r1
|
|
80029de: 4283 cmp r3, r0
|
|
80029e0: 6011 str r1, [r2, #0]
|
|
80029e2: d1e0 bne.n 80029a6 <_free_r+0x22>
|
|
80029e4: 6818 ldr r0, [r3, #0]
|
|
80029e6: 685b ldr r3, [r3, #4]
|
|
80029e8: 6053 str r3, [r2, #4]
|
|
80029ea: 4408 add r0, r1
|
|
80029ec: 6010 str r0, [r2, #0]
|
|
80029ee: e7da b.n 80029a6 <_free_r+0x22>
|
|
80029f0: d902 bls.n 80029f8 <_free_r+0x74>
|
|
80029f2: 230c movs r3, #12
|
|
80029f4: 602b str r3, [r5, #0]
|
|
80029f6: e7d6 b.n 80029a6 <_free_r+0x22>
|
|
80029f8: 6820 ldr r0, [r4, #0]
|
|
80029fa: 1821 adds r1, r4, r0
|
|
80029fc: 428b cmp r3, r1
|
|
80029fe: bf04 itt eq
|
|
8002a00: 6819 ldreq r1, [r3, #0]
|
|
8002a02: 685b ldreq r3, [r3, #4]
|
|
8002a04: 6063 str r3, [r4, #4]
|
|
8002a06: bf04 itt eq
|
|
8002a08: 1809 addeq r1, r1, r0
|
|
8002a0a: 6021 streq r1, [r4, #0]
|
|
8002a0c: 6054 str r4, [r2, #4]
|
|
8002a0e: e7ca b.n 80029a6 <_free_r+0x22>
|
|
8002a10: bd38 pop {r3, r4, r5, pc}
|
|
8002a12: bf00 nop
|
|
8002a14: 200006b4 .word 0x200006b4
|
|
|
|
08002a18 <sbrk_aligned>:
|
|
8002a18: b570 push {r4, r5, r6, lr}
|
|
8002a1a: 4e0f ldr r6, [pc, #60] @ (8002a58 <sbrk_aligned+0x40>)
|
|
8002a1c: 460c mov r4, r1
|
|
8002a1e: 6831 ldr r1, [r6, #0]
|
|
8002a20: 4605 mov r5, r0
|
|
8002a22: b911 cbnz r1, 8002a2a <sbrk_aligned+0x12>
|
|
8002a24: f000 fba4 bl 8003170 <_sbrk_r>
|
|
8002a28: 6030 str r0, [r6, #0]
|
|
8002a2a: 4621 mov r1, r4
|
|
8002a2c: 4628 mov r0, r5
|
|
8002a2e: f000 fb9f bl 8003170 <_sbrk_r>
|
|
8002a32: 1c43 adds r3, r0, #1
|
|
8002a34: d103 bne.n 8002a3e <sbrk_aligned+0x26>
|
|
8002a36: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff
|
|
8002a3a: 4620 mov r0, r4
|
|
8002a3c: bd70 pop {r4, r5, r6, pc}
|
|
8002a3e: 1cc4 adds r4, r0, #3
|
|
8002a40: f024 0403 bic.w r4, r4, #3
|
|
8002a44: 42a0 cmp r0, r4
|
|
8002a46: d0f8 beq.n 8002a3a <sbrk_aligned+0x22>
|
|
8002a48: 1a21 subs r1, r4, r0
|
|
8002a4a: 4628 mov r0, r5
|
|
8002a4c: f000 fb90 bl 8003170 <_sbrk_r>
|
|
8002a50: 3001 adds r0, #1
|
|
8002a52: d1f2 bne.n 8002a3a <sbrk_aligned+0x22>
|
|
8002a54: e7ef b.n 8002a36 <sbrk_aligned+0x1e>
|
|
8002a56: bf00 nop
|
|
8002a58: 200006b0 .word 0x200006b0
|
|
|
|
08002a5c <_malloc_r>:
|
|
8002a5c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
8002a60: 1ccd adds r5, r1, #3
|
|
8002a62: f025 0503 bic.w r5, r5, #3
|
|
8002a66: 3508 adds r5, #8
|
|
8002a68: 2d0c cmp r5, #12
|
|
8002a6a: bf38 it cc
|
|
8002a6c: 250c movcc r5, #12
|
|
8002a6e: 2d00 cmp r5, #0
|
|
8002a70: 4606 mov r6, r0
|
|
8002a72: db01 blt.n 8002a78 <_malloc_r+0x1c>
|
|
8002a74: 42a9 cmp r1, r5
|
|
8002a76: d904 bls.n 8002a82 <_malloc_r+0x26>
|
|
8002a78: 230c movs r3, #12
|
|
8002a7a: 6033 str r3, [r6, #0]
|
|
8002a7c: 2000 movs r0, #0
|
|
8002a7e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
8002a82: f8df 80d4 ldr.w r8, [pc, #212] @ 8002b58 <_malloc_r+0xfc>
|
|
8002a86: f000 f869 bl 8002b5c <__malloc_lock>
|
|
8002a8a: f8d8 3000 ldr.w r3, [r8]
|
|
8002a8e: 461c mov r4, r3
|
|
8002a90: bb44 cbnz r4, 8002ae4 <_malloc_r+0x88>
|
|
8002a92: 4629 mov r1, r5
|
|
8002a94: 4630 mov r0, r6
|
|
8002a96: f7ff ffbf bl 8002a18 <sbrk_aligned>
|
|
8002a9a: 1c43 adds r3, r0, #1
|
|
8002a9c: 4604 mov r4, r0
|
|
8002a9e: d158 bne.n 8002b52 <_malloc_r+0xf6>
|
|
8002aa0: f8d8 4000 ldr.w r4, [r8]
|
|
8002aa4: 4627 mov r7, r4
|
|
8002aa6: 2f00 cmp r7, #0
|
|
8002aa8: d143 bne.n 8002b32 <_malloc_r+0xd6>
|
|
8002aaa: 2c00 cmp r4, #0
|
|
8002aac: d04b beq.n 8002b46 <_malloc_r+0xea>
|
|
8002aae: 6823 ldr r3, [r4, #0]
|
|
8002ab0: 4639 mov r1, r7
|
|
8002ab2: 4630 mov r0, r6
|
|
8002ab4: eb04 0903 add.w r9, r4, r3
|
|
8002ab8: f000 fb5a bl 8003170 <_sbrk_r>
|
|
8002abc: 4581 cmp r9, r0
|
|
8002abe: d142 bne.n 8002b46 <_malloc_r+0xea>
|
|
8002ac0: 6821 ldr r1, [r4, #0]
|
|
8002ac2: 1a6d subs r5, r5, r1
|
|
8002ac4: 4629 mov r1, r5
|
|
8002ac6: 4630 mov r0, r6
|
|
8002ac8: f7ff ffa6 bl 8002a18 <sbrk_aligned>
|
|
8002acc: 3001 adds r0, #1
|
|
8002ace: d03a beq.n 8002b46 <_malloc_r+0xea>
|
|
8002ad0: 6823 ldr r3, [r4, #0]
|
|
8002ad2: 442b add r3, r5
|
|
8002ad4: 6023 str r3, [r4, #0]
|
|
8002ad6: f8d8 3000 ldr.w r3, [r8]
|
|
8002ada: 685a ldr r2, [r3, #4]
|
|
8002adc: bb62 cbnz r2, 8002b38 <_malloc_r+0xdc>
|
|
8002ade: f8c8 7000 str.w r7, [r8]
|
|
8002ae2: e00f b.n 8002b04 <_malloc_r+0xa8>
|
|
8002ae4: 6822 ldr r2, [r4, #0]
|
|
8002ae6: 1b52 subs r2, r2, r5
|
|
8002ae8: d420 bmi.n 8002b2c <_malloc_r+0xd0>
|
|
8002aea: 2a0b cmp r2, #11
|
|
8002aec: d917 bls.n 8002b1e <_malloc_r+0xc2>
|
|
8002aee: 1961 adds r1, r4, r5
|
|
8002af0: 42a3 cmp r3, r4
|
|
8002af2: 6025 str r5, [r4, #0]
|
|
8002af4: bf18 it ne
|
|
8002af6: 6059 strne r1, [r3, #4]
|
|
8002af8: 6863 ldr r3, [r4, #4]
|
|
8002afa: bf08 it eq
|
|
8002afc: f8c8 1000 streq.w r1, [r8]
|
|
8002b00: 5162 str r2, [r4, r5]
|
|
8002b02: 604b str r3, [r1, #4]
|
|
8002b04: 4630 mov r0, r6
|
|
8002b06: f000 f82f bl 8002b68 <__malloc_unlock>
|
|
8002b0a: f104 000b add.w r0, r4, #11
|
|
8002b0e: 1d23 adds r3, r4, #4
|
|
8002b10: f020 0007 bic.w r0, r0, #7
|
|
8002b14: 1ac2 subs r2, r0, r3
|
|
8002b16: bf1c itt ne
|
|
8002b18: 1a1b subne r3, r3, r0
|
|
8002b1a: 50a3 strne r3, [r4, r2]
|
|
8002b1c: e7af b.n 8002a7e <_malloc_r+0x22>
|
|
8002b1e: 6862 ldr r2, [r4, #4]
|
|
8002b20: 42a3 cmp r3, r4
|
|
8002b22: bf0c ite eq
|
|
8002b24: f8c8 2000 streq.w r2, [r8]
|
|
8002b28: 605a strne r2, [r3, #4]
|
|
8002b2a: e7eb b.n 8002b04 <_malloc_r+0xa8>
|
|
8002b2c: 4623 mov r3, r4
|
|
8002b2e: 6864 ldr r4, [r4, #4]
|
|
8002b30: e7ae b.n 8002a90 <_malloc_r+0x34>
|
|
8002b32: 463c mov r4, r7
|
|
8002b34: 687f ldr r7, [r7, #4]
|
|
8002b36: e7b6 b.n 8002aa6 <_malloc_r+0x4a>
|
|
8002b38: 461a mov r2, r3
|
|
8002b3a: 685b ldr r3, [r3, #4]
|
|
8002b3c: 42a3 cmp r3, r4
|
|
8002b3e: d1fb bne.n 8002b38 <_malloc_r+0xdc>
|
|
8002b40: 2300 movs r3, #0
|
|
8002b42: 6053 str r3, [r2, #4]
|
|
8002b44: e7de b.n 8002b04 <_malloc_r+0xa8>
|
|
8002b46: 230c movs r3, #12
|
|
8002b48: 6033 str r3, [r6, #0]
|
|
8002b4a: 4630 mov r0, r6
|
|
8002b4c: f000 f80c bl 8002b68 <__malloc_unlock>
|
|
8002b50: e794 b.n 8002a7c <_malloc_r+0x20>
|
|
8002b52: 6005 str r5, [r0, #0]
|
|
8002b54: e7d6 b.n 8002b04 <_malloc_r+0xa8>
|
|
8002b56: bf00 nop
|
|
8002b58: 200006b4 .word 0x200006b4
|
|
|
|
08002b5c <__malloc_lock>:
|
|
8002b5c: 4801 ldr r0, [pc, #4] @ (8002b64 <__malloc_lock+0x8>)
|
|
8002b5e: f7ff bf0f b.w 8002980 <__retarget_lock_acquire_recursive>
|
|
8002b62: bf00 nop
|
|
8002b64: 200006ac .word 0x200006ac
|
|
|
|
08002b68 <__malloc_unlock>:
|
|
8002b68: 4801 ldr r0, [pc, #4] @ (8002b70 <__malloc_unlock+0x8>)
|
|
8002b6a: f7ff bf0a b.w 8002982 <__retarget_lock_release_recursive>
|
|
8002b6e: bf00 nop
|
|
8002b70: 200006ac .word 0x200006ac
|
|
|
|
08002b74 <__ssputs_r>:
|
|
8002b74: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8002b78: 688e ldr r6, [r1, #8]
|
|
8002b7a: 461f mov r7, r3
|
|
8002b7c: 42be cmp r6, r7
|
|
8002b7e: 680b ldr r3, [r1, #0]
|
|
8002b80: 4682 mov sl, r0
|
|
8002b82: 460c mov r4, r1
|
|
8002b84: 4690 mov r8, r2
|
|
8002b86: d82d bhi.n 8002be4 <__ssputs_r+0x70>
|
|
8002b88: f9b1 200c ldrsh.w r2, [r1, #12]
|
|
8002b8c: f412 6f90 tst.w r2, #1152 @ 0x480
|
|
8002b90: d026 beq.n 8002be0 <__ssputs_r+0x6c>
|
|
8002b92: 6965 ldr r5, [r4, #20]
|
|
8002b94: 6909 ldr r1, [r1, #16]
|
|
8002b96: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
8002b9a: eba3 0901 sub.w r9, r3, r1
|
|
8002b9e: eb05 75d5 add.w r5, r5, r5, lsr #31
|
|
8002ba2: 1c7b adds r3, r7, #1
|
|
8002ba4: 444b add r3, r9
|
|
8002ba6: 106d asrs r5, r5, #1
|
|
8002ba8: 429d cmp r5, r3
|
|
8002baa: bf38 it cc
|
|
8002bac: 461d movcc r5, r3
|
|
8002bae: 0553 lsls r3, r2, #21
|
|
8002bb0: d527 bpl.n 8002c02 <__ssputs_r+0x8e>
|
|
8002bb2: 4629 mov r1, r5
|
|
8002bb4: f7ff ff52 bl 8002a5c <_malloc_r>
|
|
8002bb8: 4606 mov r6, r0
|
|
8002bba: b360 cbz r0, 8002c16 <__ssputs_r+0xa2>
|
|
8002bbc: 6921 ldr r1, [r4, #16]
|
|
8002bbe: 464a mov r2, r9
|
|
8002bc0: f000 fae6 bl 8003190 <memcpy>
|
|
8002bc4: 89a3 ldrh r3, [r4, #12]
|
|
8002bc6: f423 6390 bic.w r3, r3, #1152 @ 0x480
|
|
8002bca: f043 0380 orr.w r3, r3, #128 @ 0x80
|
|
8002bce: 81a3 strh r3, [r4, #12]
|
|
8002bd0: 6126 str r6, [r4, #16]
|
|
8002bd2: 6165 str r5, [r4, #20]
|
|
8002bd4: 444e add r6, r9
|
|
8002bd6: eba5 0509 sub.w r5, r5, r9
|
|
8002bda: 6026 str r6, [r4, #0]
|
|
8002bdc: 60a5 str r5, [r4, #8]
|
|
8002bde: 463e mov r6, r7
|
|
8002be0: 42be cmp r6, r7
|
|
8002be2: d900 bls.n 8002be6 <__ssputs_r+0x72>
|
|
8002be4: 463e mov r6, r7
|
|
8002be6: 6820 ldr r0, [r4, #0]
|
|
8002be8: 4632 mov r2, r6
|
|
8002bea: 4641 mov r1, r8
|
|
8002bec: f000 faa6 bl 800313c <memmove>
|
|
8002bf0: 68a3 ldr r3, [r4, #8]
|
|
8002bf2: 1b9b subs r3, r3, r6
|
|
8002bf4: 60a3 str r3, [r4, #8]
|
|
8002bf6: 6823 ldr r3, [r4, #0]
|
|
8002bf8: 4433 add r3, r6
|
|
8002bfa: 6023 str r3, [r4, #0]
|
|
8002bfc: 2000 movs r0, #0
|
|
8002bfe: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8002c02: 462a mov r2, r5
|
|
8002c04: f000 fad2 bl 80031ac <_realloc_r>
|
|
8002c08: 4606 mov r6, r0
|
|
8002c0a: 2800 cmp r0, #0
|
|
8002c0c: d1e0 bne.n 8002bd0 <__ssputs_r+0x5c>
|
|
8002c0e: 6921 ldr r1, [r4, #16]
|
|
8002c10: 4650 mov r0, sl
|
|
8002c12: f7ff feb7 bl 8002984 <_free_r>
|
|
8002c16: 230c movs r3, #12
|
|
8002c18: f8ca 3000 str.w r3, [sl]
|
|
8002c1c: 89a3 ldrh r3, [r4, #12]
|
|
8002c1e: f043 0340 orr.w r3, r3, #64 @ 0x40
|
|
8002c22: 81a3 strh r3, [r4, #12]
|
|
8002c24: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002c28: e7e9 b.n 8002bfe <__ssputs_r+0x8a>
|
|
...
|
|
|
|
08002c2c <_svfiprintf_r>:
|
|
8002c2c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
8002c30: 4698 mov r8, r3
|
|
8002c32: 898b ldrh r3, [r1, #12]
|
|
8002c34: 061b lsls r3, r3, #24
|
|
8002c36: b09d sub sp, #116 @ 0x74
|
|
8002c38: 4607 mov r7, r0
|
|
8002c3a: 460d mov r5, r1
|
|
8002c3c: 4614 mov r4, r2
|
|
8002c3e: d510 bpl.n 8002c62 <_svfiprintf_r+0x36>
|
|
8002c40: 690b ldr r3, [r1, #16]
|
|
8002c42: b973 cbnz r3, 8002c62 <_svfiprintf_r+0x36>
|
|
8002c44: 2140 movs r1, #64 @ 0x40
|
|
8002c46: f7ff ff09 bl 8002a5c <_malloc_r>
|
|
8002c4a: 6028 str r0, [r5, #0]
|
|
8002c4c: 6128 str r0, [r5, #16]
|
|
8002c4e: b930 cbnz r0, 8002c5e <_svfiprintf_r+0x32>
|
|
8002c50: 230c movs r3, #12
|
|
8002c52: 603b str r3, [r7, #0]
|
|
8002c54: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002c58: b01d add sp, #116 @ 0x74
|
|
8002c5a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
8002c5e: 2340 movs r3, #64 @ 0x40
|
|
8002c60: 616b str r3, [r5, #20]
|
|
8002c62: 2300 movs r3, #0
|
|
8002c64: 9309 str r3, [sp, #36] @ 0x24
|
|
8002c66: 2320 movs r3, #32
|
|
8002c68: f88d 3029 strb.w r3, [sp, #41] @ 0x29
|
|
8002c6c: f8cd 800c str.w r8, [sp, #12]
|
|
8002c70: 2330 movs r3, #48 @ 0x30
|
|
8002c72: f8df 819c ldr.w r8, [pc, #412] @ 8002e10 <_svfiprintf_r+0x1e4>
|
|
8002c76: f88d 302a strb.w r3, [sp, #42] @ 0x2a
|
|
8002c7a: f04f 0901 mov.w r9, #1
|
|
8002c7e: 4623 mov r3, r4
|
|
8002c80: 469a mov sl, r3
|
|
8002c82: f813 2b01 ldrb.w r2, [r3], #1
|
|
8002c86: b10a cbz r2, 8002c8c <_svfiprintf_r+0x60>
|
|
8002c88: 2a25 cmp r2, #37 @ 0x25
|
|
8002c8a: d1f9 bne.n 8002c80 <_svfiprintf_r+0x54>
|
|
8002c8c: ebba 0b04 subs.w fp, sl, r4
|
|
8002c90: d00b beq.n 8002caa <_svfiprintf_r+0x7e>
|
|
8002c92: 465b mov r3, fp
|
|
8002c94: 4622 mov r2, r4
|
|
8002c96: 4629 mov r1, r5
|
|
8002c98: 4638 mov r0, r7
|
|
8002c9a: f7ff ff6b bl 8002b74 <__ssputs_r>
|
|
8002c9e: 3001 adds r0, #1
|
|
8002ca0: f000 80a7 beq.w 8002df2 <_svfiprintf_r+0x1c6>
|
|
8002ca4: 9a09 ldr r2, [sp, #36] @ 0x24
|
|
8002ca6: 445a add r2, fp
|
|
8002ca8: 9209 str r2, [sp, #36] @ 0x24
|
|
8002caa: f89a 3000 ldrb.w r3, [sl]
|
|
8002cae: 2b00 cmp r3, #0
|
|
8002cb0: f000 809f beq.w 8002df2 <_svfiprintf_r+0x1c6>
|
|
8002cb4: 2300 movs r3, #0
|
|
8002cb6: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
|
|
8002cba: e9cd 2305 strd r2, r3, [sp, #20]
|
|
8002cbe: f10a 0a01 add.w sl, sl, #1
|
|
8002cc2: 9304 str r3, [sp, #16]
|
|
8002cc4: 9307 str r3, [sp, #28]
|
|
8002cc6: f88d 3053 strb.w r3, [sp, #83] @ 0x53
|
|
8002cca: 931a str r3, [sp, #104] @ 0x68
|
|
8002ccc: 4654 mov r4, sl
|
|
8002cce: 2205 movs r2, #5
|
|
8002cd0: f814 1b01 ldrb.w r1, [r4], #1
|
|
8002cd4: 484e ldr r0, [pc, #312] @ (8002e10 <_svfiprintf_r+0x1e4>)
|
|
8002cd6: f7fd fa83 bl 80001e0 <memchr>
|
|
8002cda: 9a04 ldr r2, [sp, #16]
|
|
8002cdc: b9d8 cbnz r0, 8002d16 <_svfiprintf_r+0xea>
|
|
8002cde: 06d0 lsls r0, r2, #27
|
|
8002ce0: bf44 itt mi
|
|
8002ce2: 2320 movmi r3, #32
|
|
8002ce4: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
|
|
8002ce8: 0711 lsls r1, r2, #28
|
|
8002cea: bf44 itt mi
|
|
8002cec: 232b movmi r3, #43 @ 0x2b
|
|
8002cee: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
|
|
8002cf2: f89a 3000 ldrb.w r3, [sl]
|
|
8002cf6: 2b2a cmp r3, #42 @ 0x2a
|
|
8002cf8: d015 beq.n 8002d26 <_svfiprintf_r+0xfa>
|
|
8002cfa: 9a07 ldr r2, [sp, #28]
|
|
8002cfc: 4654 mov r4, sl
|
|
8002cfe: 2000 movs r0, #0
|
|
8002d00: f04f 0c0a mov.w ip, #10
|
|
8002d04: 4621 mov r1, r4
|
|
8002d06: f811 3b01 ldrb.w r3, [r1], #1
|
|
8002d0a: 3b30 subs r3, #48 @ 0x30
|
|
8002d0c: 2b09 cmp r3, #9
|
|
8002d0e: d94b bls.n 8002da8 <_svfiprintf_r+0x17c>
|
|
8002d10: b1b0 cbz r0, 8002d40 <_svfiprintf_r+0x114>
|
|
8002d12: 9207 str r2, [sp, #28]
|
|
8002d14: e014 b.n 8002d40 <_svfiprintf_r+0x114>
|
|
8002d16: eba0 0308 sub.w r3, r0, r8
|
|
8002d1a: fa09 f303 lsl.w r3, r9, r3
|
|
8002d1e: 4313 orrs r3, r2
|
|
8002d20: 9304 str r3, [sp, #16]
|
|
8002d22: 46a2 mov sl, r4
|
|
8002d24: e7d2 b.n 8002ccc <_svfiprintf_r+0xa0>
|
|
8002d26: 9b03 ldr r3, [sp, #12]
|
|
8002d28: 1d19 adds r1, r3, #4
|
|
8002d2a: 681b ldr r3, [r3, #0]
|
|
8002d2c: 9103 str r1, [sp, #12]
|
|
8002d2e: 2b00 cmp r3, #0
|
|
8002d30: bfbb ittet lt
|
|
8002d32: 425b neglt r3, r3
|
|
8002d34: f042 0202 orrlt.w r2, r2, #2
|
|
8002d38: 9307 strge r3, [sp, #28]
|
|
8002d3a: 9307 strlt r3, [sp, #28]
|
|
8002d3c: bfb8 it lt
|
|
8002d3e: 9204 strlt r2, [sp, #16]
|
|
8002d40: 7823 ldrb r3, [r4, #0]
|
|
8002d42: 2b2e cmp r3, #46 @ 0x2e
|
|
8002d44: d10a bne.n 8002d5c <_svfiprintf_r+0x130>
|
|
8002d46: 7863 ldrb r3, [r4, #1]
|
|
8002d48: 2b2a cmp r3, #42 @ 0x2a
|
|
8002d4a: d132 bne.n 8002db2 <_svfiprintf_r+0x186>
|
|
8002d4c: 9b03 ldr r3, [sp, #12]
|
|
8002d4e: 1d1a adds r2, r3, #4
|
|
8002d50: 681b ldr r3, [r3, #0]
|
|
8002d52: 9203 str r2, [sp, #12]
|
|
8002d54: ea43 73e3 orr.w r3, r3, r3, asr #31
|
|
8002d58: 3402 adds r4, #2
|
|
8002d5a: 9305 str r3, [sp, #20]
|
|
8002d5c: f8df a0c0 ldr.w sl, [pc, #192] @ 8002e20 <_svfiprintf_r+0x1f4>
|
|
8002d60: 7821 ldrb r1, [r4, #0]
|
|
8002d62: 2203 movs r2, #3
|
|
8002d64: 4650 mov r0, sl
|
|
8002d66: f7fd fa3b bl 80001e0 <memchr>
|
|
8002d6a: b138 cbz r0, 8002d7c <_svfiprintf_r+0x150>
|
|
8002d6c: 9b04 ldr r3, [sp, #16]
|
|
8002d6e: eba0 000a sub.w r0, r0, sl
|
|
8002d72: 2240 movs r2, #64 @ 0x40
|
|
8002d74: 4082 lsls r2, r0
|
|
8002d76: 4313 orrs r3, r2
|
|
8002d78: 3401 adds r4, #1
|
|
8002d7a: 9304 str r3, [sp, #16]
|
|
8002d7c: f814 1b01 ldrb.w r1, [r4], #1
|
|
8002d80: 4824 ldr r0, [pc, #144] @ (8002e14 <_svfiprintf_r+0x1e8>)
|
|
8002d82: f88d 1028 strb.w r1, [sp, #40] @ 0x28
|
|
8002d86: 2206 movs r2, #6
|
|
8002d88: f7fd fa2a bl 80001e0 <memchr>
|
|
8002d8c: 2800 cmp r0, #0
|
|
8002d8e: d036 beq.n 8002dfe <_svfiprintf_r+0x1d2>
|
|
8002d90: 4b21 ldr r3, [pc, #132] @ (8002e18 <_svfiprintf_r+0x1ec>)
|
|
8002d92: bb1b cbnz r3, 8002ddc <_svfiprintf_r+0x1b0>
|
|
8002d94: 9b03 ldr r3, [sp, #12]
|
|
8002d96: 3307 adds r3, #7
|
|
8002d98: f023 0307 bic.w r3, r3, #7
|
|
8002d9c: 3308 adds r3, #8
|
|
8002d9e: 9303 str r3, [sp, #12]
|
|
8002da0: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
8002da2: 4433 add r3, r6
|
|
8002da4: 9309 str r3, [sp, #36] @ 0x24
|
|
8002da6: e76a b.n 8002c7e <_svfiprintf_r+0x52>
|
|
8002da8: fb0c 3202 mla r2, ip, r2, r3
|
|
8002dac: 460c mov r4, r1
|
|
8002dae: 2001 movs r0, #1
|
|
8002db0: e7a8 b.n 8002d04 <_svfiprintf_r+0xd8>
|
|
8002db2: 2300 movs r3, #0
|
|
8002db4: 3401 adds r4, #1
|
|
8002db6: 9305 str r3, [sp, #20]
|
|
8002db8: 4619 mov r1, r3
|
|
8002dba: f04f 0c0a mov.w ip, #10
|
|
8002dbe: 4620 mov r0, r4
|
|
8002dc0: f810 2b01 ldrb.w r2, [r0], #1
|
|
8002dc4: 3a30 subs r2, #48 @ 0x30
|
|
8002dc6: 2a09 cmp r2, #9
|
|
8002dc8: d903 bls.n 8002dd2 <_svfiprintf_r+0x1a6>
|
|
8002dca: 2b00 cmp r3, #0
|
|
8002dcc: d0c6 beq.n 8002d5c <_svfiprintf_r+0x130>
|
|
8002dce: 9105 str r1, [sp, #20]
|
|
8002dd0: e7c4 b.n 8002d5c <_svfiprintf_r+0x130>
|
|
8002dd2: fb0c 2101 mla r1, ip, r1, r2
|
|
8002dd6: 4604 mov r4, r0
|
|
8002dd8: 2301 movs r3, #1
|
|
8002dda: e7f0 b.n 8002dbe <_svfiprintf_r+0x192>
|
|
8002ddc: ab03 add r3, sp, #12
|
|
8002dde: 9300 str r3, [sp, #0]
|
|
8002de0: 462a mov r2, r5
|
|
8002de2: 4b0e ldr r3, [pc, #56] @ (8002e1c <_svfiprintf_r+0x1f0>)
|
|
8002de4: a904 add r1, sp, #16
|
|
8002de6: 4638 mov r0, r7
|
|
8002de8: f3af 8000 nop.w
|
|
8002dec: 1c42 adds r2, r0, #1
|
|
8002dee: 4606 mov r6, r0
|
|
8002df0: d1d6 bne.n 8002da0 <_svfiprintf_r+0x174>
|
|
8002df2: 89ab ldrh r3, [r5, #12]
|
|
8002df4: 065b lsls r3, r3, #25
|
|
8002df6: f53f af2d bmi.w 8002c54 <_svfiprintf_r+0x28>
|
|
8002dfa: 9809 ldr r0, [sp, #36] @ 0x24
|
|
8002dfc: e72c b.n 8002c58 <_svfiprintf_r+0x2c>
|
|
8002dfe: ab03 add r3, sp, #12
|
|
8002e00: 9300 str r3, [sp, #0]
|
|
8002e02: 462a mov r2, r5
|
|
8002e04: 4b05 ldr r3, [pc, #20] @ (8002e1c <_svfiprintf_r+0x1f0>)
|
|
8002e06: a904 add r1, sp, #16
|
|
8002e08: 4638 mov r0, r7
|
|
8002e0a: f000 f879 bl 8002f00 <_printf_i>
|
|
8002e0e: e7ed b.n 8002dec <_svfiprintf_r+0x1c0>
|
|
8002e10: 08005b20 .word 0x08005b20
|
|
8002e14: 08005b2a .word 0x08005b2a
|
|
8002e18: 00000000 .word 0x00000000
|
|
8002e1c: 08002b75 .word 0x08002b75
|
|
8002e20: 08005b26 .word 0x08005b26
|
|
|
|
08002e24 <_printf_common>:
|
|
8002e24: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8002e28: 4616 mov r6, r2
|
|
8002e2a: 4698 mov r8, r3
|
|
8002e2c: 688a ldr r2, [r1, #8]
|
|
8002e2e: 690b ldr r3, [r1, #16]
|
|
8002e30: f8dd 9020 ldr.w r9, [sp, #32]
|
|
8002e34: 4293 cmp r3, r2
|
|
8002e36: bfb8 it lt
|
|
8002e38: 4613 movlt r3, r2
|
|
8002e3a: 6033 str r3, [r6, #0]
|
|
8002e3c: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
|
|
8002e40: 4607 mov r7, r0
|
|
8002e42: 460c mov r4, r1
|
|
8002e44: b10a cbz r2, 8002e4a <_printf_common+0x26>
|
|
8002e46: 3301 adds r3, #1
|
|
8002e48: 6033 str r3, [r6, #0]
|
|
8002e4a: 6823 ldr r3, [r4, #0]
|
|
8002e4c: 0699 lsls r1, r3, #26
|
|
8002e4e: bf42 ittt mi
|
|
8002e50: 6833 ldrmi r3, [r6, #0]
|
|
8002e52: 3302 addmi r3, #2
|
|
8002e54: 6033 strmi r3, [r6, #0]
|
|
8002e56: 6825 ldr r5, [r4, #0]
|
|
8002e58: f015 0506 ands.w r5, r5, #6
|
|
8002e5c: d106 bne.n 8002e6c <_printf_common+0x48>
|
|
8002e5e: f104 0a19 add.w sl, r4, #25
|
|
8002e62: 68e3 ldr r3, [r4, #12]
|
|
8002e64: 6832 ldr r2, [r6, #0]
|
|
8002e66: 1a9b subs r3, r3, r2
|
|
8002e68: 42ab cmp r3, r5
|
|
8002e6a: dc26 bgt.n 8002eba <_printf_common+0x96>
|
|
8002e6c: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
|
|
8002e70: 6822 ldr r2, [r4, #0]
|
|
8002e72: 3b00 subs r3, #0
|
|
8002e74: bf18 it ne
|
|
8002e76: 2301 movne r3, #1
|
|
8002e78: 0692 lsls r2, r2, #26
|
|
8002e7a: d42b bmi.n 8002ed4 <_printf_common+0xb0>
|
|
8002e7c: f104 0243 add.w r2, r4, #67 @ 0x43
|
|
8002e80: 4641 mov r1, r8
|
|
8002e82: 4638 mov r0, r7
|
|
8002e84: 47c8 blx r9
|
|
8002e86: 3001 adds r0, #1
|
|
8002e88: d01e beq.n 8002ec8 <_printf_common+0xa4>
|
|
8002e8a: 6823 ldr r3, [r4, #0]
|
|
8002e8c: 6922 ldr r2, [r4, #16]
|
|
8002e8e: f003 0306 and.w r3, r3, #6
|
|
8002e92: 2b04 cmp r3, #4
|
|
8002e94: bf02 ittt eq
|
|
8002e96: 68e5 ldreq r5, [r4, #12]
|
|
8002e98: 6833 ldreq r3, [r6, #0]
|
|
8002e9a: 1aed subeq r5, r5, r3
|
|
8002e9c: 68a3 ldr r3, [r4, #8]
|
|
8002e9e: bf0c ite eq
|
|
8002ea0: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
|
8002ea4: 2500 movne r5, #0
|
|
8002ea6: 4293 cmp r3, r2
|
|
8002ea8: bfc4 itt gt
|
|
8002eaa: 1a9b subgt r3, r3, r2
|
|
8002eac: 18ed addgt r5, r5, r3
|
|
8002eae: 2600 movs r6, #0
|
|
8002eb0: 341a adds r4, #26
|
|
8002eb2: 42b5 cmp r5, r6
|
|
8002eb4: d11a bne.n 8002eec <_printf_common+0xc8>
|
|
8002eb6: 2000 movs r0, #0
|
|
8002eb8: e008 b.n 8002ecc <_printf_common+0xa8>
|
|
8002eba: 2301 movs r3, #1
|
|
8002ebc: 4652 mov r2, sl
|
|
8002ebe: 4641 mov r1, r8
|
|
8002ec0: 4638 mov r0, r7
|
|
8002ec2: 47c8 blx r9
|
|
8002ec4: 3001 adds r0, #1
|
|
8002ec6: d103 bne.n 8002ed0 <_printf_common+0xac>
|
|
8002ec8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
8002ecc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8002ed0: 3501 adds r5, #1
|
|
8002ed2: e7c6 b.n 8002e62 <_printf_common+0x3e>
|
|
8002ed4: 18e1 adds r1, r4, r3
|
|
8002ed6: 1c5a adds r2, r3, #1
|
|
8002ed8: 2030 movs r0, #48 @ 0x30
|
|
8002eda: f881 0043 strb.w r0, [r1, #67] @ 0x43
|
|
8002ede: 4422 add r2, r4
|
|
8002ee0: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
|
|
8002ee4: f882 1043 strb.w r1, [r2, #67] @ 0x43
|
|
8002ee8: 3302 adds r3, #2
|
|
8002eea: e7c7 b.n 8002e7c <_printf_common+0x58>
|
|
8002eec: 2301 movs r3, #1
|
|
8002eee: 4622 mov r2, r4
|
|
8002ef0: 4641 mov r1, r8
|
|
8002ef2: 4638 mov r0, r7
|
|
8002ef4: 47c8 blx r9
|
|
8002ef6: 3001 adds r0, #1
|
|
8002ef8: d0e6 beq.n 8002ec8 <_printf_common+0xa4>
|
|
8002efa: 3601 adds r6, #1
|
|
8002efc: e7d9 b.n 8002eb2 <_printf_common+0x8e>
|
|
...
|
|
|
|
08002f00 <_printf_i>:
|
|
8002f00: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8002f04: 7e0f ldrb r7, [r1, #24]
|
|
8002f06: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
8002f08: 2f78 cmp r7, #120 @ 0x78
|
|
8002f0a: 4691 mov r9, r2
|
|
8002f0c: 4680 mov r8, r0
|
|
8002f0e: 460c mov r4, r1
|
|
8002f10: 469a mov sl, r3
|
|
8002f12: f101 0243 add.w r2, r1, #67 @ 0x43
|
|
8002f16: d807 bhi.n 8002f28 <_printf_i+0x28>
|
|
8002f18: 2f62 cmp r7, #98 @ 0x62
|
|
8002f1a: d80a bhi.n 8002f32 <_printf_i+0x32>
|
|
8002f1c: 2f00 cmp r7, #0
|
|
8002f1e: f000 80d1 beq.w 80030c4 <_printf_i+0x1c4>
|
|
8002f22: 2f58 cmp r7, #88 @ 0x58
|
|
8002f24: f000 80b8 beq.w 8003098 <_printf_i+0x198>
|
|
8002f28: f104 0642 add.w r6, r4, #66 @ 0x42
|
|
8002f2c: f884 7042 strb.w r7, [r4, #66] @ 0x42
|
|
8002f30: e03a b.n 8002fa8 <_printf_i+0xa8>
|
|
8002f32: f1a7 0363 sub.w r3, r7, #99 @ 0x63
|
|
8002f36: 2b15 cmp r3, #21
|
|
8002f38: d8f6 bhi.n 8002f28 <_printf_i+0x28>
|
|
8002f3a: a101 add r1, pc, #4 @ (adr r1, 8002f40 <_printf_i+0x40>)
|
|
8002f3c: f851 f023 ldr.w pc, [r1, r3, lsl #2]
|
|
8002f40: 08002f99 .word 0x08002f99
|
|
8002f44: 08002fad .word 0x08002fad
|
|
8002f48: 08002f29 .word 0x08002f29
|
|
8002f4c: 08002f29 .word 0x08002f29
|
|
8002f50: 08002f29 .word 0x08002f29
|
|
8002f54: 08002f29 .word 0x08002f29
|
|
8002f58: 08002fad .word 0x08002fad
|
|
8002f5c: 08002f29 .word 0x08002f29
|
|
8002f60: 08002f29 .word 0x08002f29
|
|
8002f64: 08002f29 .word 0x08002f29
|
|
8002f68: 08002f29 .word 0x08002f29
|
|
8002f6c: 080030ab .word 0x080030ab
|
|
8002f70: 08002fd7 .word 0x08002fd7
|
|
8002f74: 08003065 .word 0x08003065
|
|
8002f78: 08002f29 .word 0x08002f29
|
|
8002f7c: 08002f29 .word 0x08002f29
|
|
8002f80: 080030cd .word 0x080030cd
|
|
8002f84: 08002f29 .word 0x08002f29
|
|
8002f88: 08002fd7 .word 0x08002fd7
|
|
8002f8c: 08002f29 .word 0x08002f29
|
|
8002f90: 08002f29 .word 0x08002f29
|
|
8002f94: 0800306d .word 0x0800306d
|
|
8002f98: 6833 ldr r3, [r6, #0]
|
|
8002f9a: 1d1a adds r2, r3, #4
|
|
8002f9c: 681b ldr r3, [r3, #0]
|
|
8002f9e: 6032 str r2, [r6, #0]
|
|
8002fa0: f104 0642 add.w r6, r4, #66 @ 0x42
|
|
8002fa4: f884 3042 strb.w r3, [r4, #66] @ 0x42
|
|
8002fa8: 2301 movs r3, #1
|
|
8002faa: e09c b.n 80030e6 <_printf_i+0x1e6>
|
|
8002fac: 6833 ldr r3, [r6, #0]
|
|
8002fae: 6820 ldr r0, [r4, #0]
|
|
8002fb0: 1d19 adds r1, r3, #4
|
|
8002fb2: 6031 str r1, [r6, #0]
|
|
8002fb4: 0606 lsls r6, r0, #24
|
|
8002fb6: d501 bpl.n 8002fbc <_printf_i+0xbc>
|
|
8002fb8: 681d ldr r5, [r3, #0]
|
|
8002fba: e003 b.n 8002fc4 <_printf_i+0xc4>
|
|
8002fbc: 0645 lsls r5, r0, #25
|
|
8002fbe: d5fb bpl.n 8002fb8 <_printf_i+0xb8>
|
|
8002fc0: f9b3 5000 ldrsh.w r5, [r3]
|
|
8002fc4: 2d00 cmp r5, #0
|
|
8002fc6: da03 bge.n 8002fd0 <_printf_i+0xd0>
|
|
8002fc8: 232d movs r3, #45 @ 0x2d
|
|
8002fca: 426d negs r5, r5
|
|
8002fcc: f884 3043 strb.w r3, [r4, #67] @ 0x43
|
|
8002fd0: 4858 ldr r0, [pc, #352] @ (8003134 <_printf_i+0x234>)
|
|
8002fd2: 230a movs r3, #10
|
|
8002fd4: e011 b.n 8002ffa <_printf_i+0xfa>
|
|
8002fd6: 6821 ldr r1, [r4, #0]
|
|
8002fd8: 6833 ldr r3, [r6, #0]
|
|
8002fda: 0608 lsls r0, r1, #24
|
|
8002fdc: f853 5b04 ldr.w r5, [r3], #4
|
|
8002fe0: d402 bmi.n 8002fe8 <_printf_i+0xe8>
|
|
8002fe2: 0649 lsls r1, r1, #25
|
|
8002fe4: bf48 it mi
|
|
8002fe6: b2ad uxthmi r5, r5
|
|
8002fe8: 2f6f cmp r7, #111 @ 0x6f
|
|
8002fea: 4852 ldr r0, [pc, #328] @ (8003134 <_printf_i+0x234>)
|
|
8002fec: 6033 str r3, [r6, #0]
|
|
8002fee: bf14 ite ne
|
|
8002ff0: 230a movne r3, #10
|
|
8002ff2: 2308 moveq r3, #8
|
|
8002ff4: 2100 movs r1, #0
|
|
8002ff6: f884 1043 strb.w r1, [r4, #67] @ 0x43
|
|
8002ffa: 6866 ldr r6, [r4, #4]
|
|
8002ffc: 60a6 str r6, [r4, #8]
|
|
8002ffe: 2e00 cmp r6, #0
|
|
8003000: db05 blt.n 800300e <_printf_i+0x10e>
|
|
8003002: 6821 ldr r1, [r4, #0]
|
|
8003004: 432e orrs r6, r5
|
|
8003006: f021 0104 bic.w r1, r1, #4
|
|
800300a: 6021 str r1, [r4, #0]
|
|
800300c: d04b beq.n 80030a6 <_printf_i+0x1a6>
|
|
800300e: 4616 mov r6, r2
|
|
8003010: fbb5 f1f3 udiv r1, r5, r3
|
|
8003014: fb03 5711 mls r7, r3, r1, r5
|
|
8003018: 5dc7 ldrb r7, [r0, r7]
|
|
800301a: f806 7d01 strb.w r7, [r6, #-1]!
|
|
800301e: 462f mov r7, r5
|
|
8003020: 42bb cmp r3, r7
|
|
8003022: 460d mov r5, r1
|
|
8003024: d9f4 bls.n 8003010 <_printf_i+0x110>
|
|
8003026: 2b08 cmp r3, #8
|
|
8003028: d10b bne.n 8003042 <_printf_i+0x142>
|
|
800302a: 6823 ldr r3, [r4, #0]
|
|
800302c: 07df lsls r7, r3, #31
|
|
800302e: d508 bpl.n 8003042 <_printf_i+0x142>
|
|
8003030: 6923 ldr r3, [r4, #16]
|
|
8003032: 6861 ldr r1, [r4, #4]
|
|
8003034: 4299 cmp r1, r3
|
|
8003036: bfde ittt le
|
|
8003038: 2330 movle r3, #48 @ 0x30
|
|
800303a: f806 3c01 strble.w r3, [r6, #-1]
|
|
800303e: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff
|
|
8003042: 1b92 subs r2, r2, r6
|
|
8003044: 6122 str r2, [r4, #16]
|
|
8003046: f8cd a000 str.w sl, [sp]
|
|
800304a: 464b mov r3, r9
|
|
800304c: aa03 add r2, sp, #12
|
|
800304e: 4621 mov r1, r4
|
|
8003050: 4640 mov r0, r8
|
|
8003052: f7ff fee7 bl 8002e24 <_printf_common>
|
|
8003056: 3001 adds r0, #1
|
|
8003058: d14a bne.n 80030f0 <_printf_i+0x1f0>
|
|
800305a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
|
|
800305e: b004 add sp, #16
|
|
8003060: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8003064: 6823 ldr r3, [r4, #0]
|
|
8003066: f043 0320 orr.w r3, r3, #32
|
|
800306a: 6023 str r3, [r4, #0]
|
|
800306c: 4832 ldr r0, [pc, #200] @ (8003138 <_printf_i+0x238>)
|
|
800306e: 2778 movs r7, #120 @ 0x78
|
|
8003070: f884 7045 strb.w r7, [r4, #69] @ 0x45
|
|
8003074: 6823 ldr r3, [r4, #0]
|
|
8003076: 6831 ldr r1, [r6, #0]
|
|
8003078: 061f lsls r7, r3, #24
|
|
800307a: f851 5b04 ldr.w r5, [r1], #4
|
|
800307e: d402 bmi.n 8003086 <_printf_i+0x186>
|
|
8003080: 065f lsls r7, r3, #25
|
|
8003082: bf48 it mi
|
|
8003084: b2ad uxthmi r5, r5
|
|
8003086: 6031 str r1, [r6, #0]
|
|
8003088: 07d9 lsls r1, r3, #31
|
|
800308a: bf44 itt mi
|
|
800308c: f043 0320 orrmi.w r3, r3, #32
|
|
8003090: 6023 strmi r3, [r4, #0]
|
|
8003092: b11d cbz r5, 800309c <_printf_i+0x19c>
|
|
8003094: 2310 movs r3, #16
|
|
8003096: e7ad b.n 8002ff4 <_printf_i+0xf4>
|
|
8003098: 4826 ldr r0, [pc, #152] @ (8003134 <_printf_i+0x234>)
|
|
800309a: e7e9 b.n 8003070 <_printf_i+0x170>
|
|
800309c: 6823 ldr r3, [r4, #0]
|
|
800309e: f023 0320 bic.w r3, r3, #32
|
|
80030a2: 6023 str r3, [r4, #0]
|
|
80030a4: e7f6 b.n 8003094 <_printf_i+0x194>
|
|
80030a6: 4616 mov r6, r2
|
|
80030a8: e7bd b.n 8003026 <_printf_i+0x126>
|
|
80030aa: 6833 ldr r3, [r6, #0]
|
|
80030ac: 6825 ldr r5, [r4, #0]
|
|
80030ae: 6961 ldr r1, [r4, #20]
|
|
80030b0: 1d18 adds r0, r3, #4
|
|
80030b2: 6030 str r0, [r6, #0]
|
|
80030b4: 062e lsls r6, r5, #24
|
|
80030b6: 681b ldr r3, [r3, #0]
|
|
80030b8: d501 bpl.n 80030be <_printf_i+0x1be>
|
|
80030ba: 6019 str r1, [r3, #0]
|
|
80030bc: e002 b.n 80030c4 <_printf_i+0x1c4>
|
|
80030be: 0668 lsls r0, r5, #25
|
|
80030c0: d5fb bpl.n 80030ba <_printf_i+0x1ba>
|
|
80030c2: 8019 strh r1, [r3, #0]
|
|
80030c4: 2300 movs r3, #0
|
|
80030c6: 6123 str r3, [r4, #16]
|
|
80030c8: 4616 mov r6, r2
|
|
80030ca: e7bc b.n 8003046 <_printf_i+0x146>
|
|
80030cc: 6833 ldr r3, [r6, #0]
|
|
80030ce: 1d1a adds r2, r3, #4
|
|
80030d0: 6032 str r2, [r6, #0]
|
|
80030d2: 681e ldr r6, [r3, #0]
|
|
80030d4: 6862 ldr r2, [r4, #4]
|
|
80030d6: 2100 movs r1, #0
|
|
80030d8: 4630 mov r0, r6
|
|
80030da: f7fd f881 bl 80001e0 <memchr>
|
|
80030de: b108 cbz r0, 80030e4 <_printf_i+0x1e4>
|
|
80030e0: 1b80 subs r0, r0, r6
|
|
80030e2: 6060 str r0, [r4, #4]
|
|
80030e4: 6863 ldr r3, [r4, #4]
|
|
80030e6: 6123 str r3, [r4, #16]
|
|
80030e8: 2300 movs r3, #0
|
|
80030ea: f884 3043 strb.w r3, [r4, #67] @ 0x43
|
|
80030ee: e7aa b.n 8003046 <_printf_i+0x146>
|
|
80030f0: 6923 ldr r3, [r4, #16]
|
|
80030f2: 4632 mov r2, r6
|
|
80030f4: 4649 mov r1, r9
|
|
80030f6: 4640 mov r0, r8
|
|
80030f8: 47d0 blx sl
|
|
80030fa: 3001 adds r0, #1
|
|
80030fc: d0ad beq.n 800305a <_printf_i+0x15a>
|
|
80030fe: 6823 ldr r3, [r4, #0]
|
|
8003100: 079b lsls r3, r3, #30
|
|
8003102: d413 bmi.n 800312c <_printf_i+0x22c>
|
|
8003104: 68e0 ldr r0, [r4, #12]
|
|
8003106: 9b03 ldr r3, [sp, #12]
|
|
8003108: 4298 cmp r0, r3
|
|
800310a: bfb8 it lt
|
|
800310c: 4618 movlt r0, r3
|
|
800310e: e7a6 b.n 800305e <_printf_i+0x15e>
|
|
8003110: 2301 movs r3, #1
|
|
8003112: 4632 mov r2, r6
|
|
8003114: 4649 mov r1, r9
|
|
8003116: 4640 mov r0, r8
|
|
8003118: 47d0 blx sl
|
|
800311a: 3001 adds r0, #1
|
|
800311c: d09d beq.n 800305a <_printf_i+0x15a>
|
|
800311e: 3501 adds r5, #1
|
|
8003120: 68e3 ldr r3, [r4, #12]
|
|
8003122: 9903 ldr r1, [sp, #12]
|
|
8003124: 1a5b subs r3, r3, r1
|
|
8003126: 42ab cmp r3, r5
|
|
8003128: dcf2 bgt.n 8003110 <_printf_i+0x210>
|
|
800312a: e7eb b.n 8003104 <_printf_i+0x204>
|
|
800312c: 2500 movs r5, #0
|
|
800312e: f104 0619 add.w r6, r4, #25
|
|
8003132: e7f5 b.n 8003120 <_printf_i+0x220>
|
|
8003134: 08005b31 .word 0x08005b31
|
|
8003138: 08005b42 .word 0x08005b42
|
|
|
|
0800313c <memmove>:
|
|
800313c: 4288 cmp r0, r1
|
|
800313e: b510 push {r4, lr}
|
|
8003140: eb01 0402 add.w r4, r1, r2
|
|
8003144: d902 bls.n 800314c <memmove+0x10>
|
|
8003146: 4284 cmp r4, r0
|
|
8003148: 4623 mov r3, r4
|
|
800314a: d807 bhi.n 800315c <memmove+0x20>
|
|
800314c: 1e43 subs r3, r0, #1
|
|
800314e: 42a1 cmp r1, r4
|
|
8003150: d008 beq.n 8003164 <memmove+0x28>
|
|
8003152: f811 2b01 ldrb.w r2, [r1], #1
|
|
8003156: f803 2f01 strb.w r2, [r3, #1]!
|
|
800315a: e7f8 b.n 800314e <memmove+0x12>
|
|
800315c: 4402 add r2, r0
|
|
800315e: 4601 mov r1, r0
|
|
8003160: 428a cmp r2, r1
|
|
8003162: d100 bne.n 8003166 <memmove+0x2a>
|
|
8003164: bd10 pop {r4, pc}
|
|
8003166: f813 4d01 ldrb.w r4, [r3, #-1]!
|
|
800316a: f802 4d01 strb.w r4, [r2, #-1]!
|
|
800316e: e7f7 b.n 8003160 <memmove+0x24>
|
|
|
|
08003170 <_sbrk_r>:
|
|
8003170: b538 push {r3, r4, r5, lr}
|
|
8003172: 4d06 ldr r5, [pc, #24] @ (800318c <_sbrk_r+0x1c>)
|
|
8003174: 2300 movs r3, #0
|
|
8003176: 4604 mov r4, r0
|
|
8003178: 4608 mov r0, r1
|
|
800317a: 602b str r3, [r5, #0]
|
|
800317c: f7ff faec bl 8002758 <_sbrk>
|
|
8003180: 1c43 adds r3, r0, #1
|
|
8003182: d102 bne.n 800318a <_sbrk_r+0x1a>
|
|
8003184: 682b ldr r3, [r5, #0]
|
|
8003186: b103 cbz r3, 800318a <_sbrk_r+0x1a>
|
|
8003188: 6023 str r3, [r4, #0]
|
|
800318a: bd38 pop {r3, r4, r5, pc}
|
|
800318c: 200006a8 .word 0x200006a8
|
|
|
|
08003190 <memcpy>:
|
|
8003190: 440a add r2, r1
|
|
8003192: 4291 cmp r1, r2
|
|
8003194: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff
|
|
8003198: d100 bne.n 800319c <memcpy+0xc>
|
|
800319a: 4770 bx lr
|
|
800319c: b510 push {r4, lr}
|
|
800319e: f811 4b01 ldrb.w r4, [r1], #1
|
|
80031a2: f803 4f01 strb.w r4, [r3, #1]!
|
|
80031a6: 4291 cmp r1, r2
|
|
80031a8: d1f9 bne.n 800319e <memcpy+0xe>
|
|
80031aa: bd10 pop {r4, pc}
|
|
|
|
080031ac <_realloc_r>:
|
|
80031ac: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
80031b0: 4607 mov r7, r0
|
|
80031b2: 4614 mov r4, r2
|
|
80031b4: 460d mov r5, r1
|
|
80031b6: b921 cbnz r1, 80031c2 <_realloc_r+0x16>
|
|
80031b8: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
|
80031bc: 4611 mov r1, r2
|
|
80031be: f7ff bc4d b.w 8002a5c <_malloc_r>
|
|
80031c2: b92a cbnz r2, 80031d0 <_realloc_r+0x24>
|
|
80031c4: f7ff fbde bl 8002984 <_free_r>
|
|
80031c8: 4625 mov r5, r4
|
|
80031ca: 4628 mov r0, r5
|
|
80031cc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
80031d0: f000 f81a bl 8003208 <_malloc_usable_size_r>
|
|
80031d4: 4284 cmp r4, r0
|
|
80031d6: 4606 mov r6, r0
|
|
80031d8: d802 bhi.n 80031e0 <_realloc_r+0x34>
|
|
80031da: ebb4 0f50 cmp.w r4, r0, lsr #1
|
|
80031de: d8f4 bhi.n 80031ca <_realloc_r+0x1e>
|
|
80031e0: 4621 mov r1, r4
|
|
80031e2: 4638 mov r0, r7
|
|
80031e4: f7ff fc3a bl 8002a5c <_malloc_r>
|
|
80031e8: 4680 mov r8, r0
|
|
80031ea: b908 cbnz r0, 80031f0 <_realloc_r+0x44>
|
|
80031ec: 4645 mov r5, r8
|
|
80031ee: e7ec b.n 80031ca <_realloc_r+0x1e>
|
|
80031f0: 42b4 cmp r4, r6
|
|
80031f2: 4622 mov r2, r4
|
|
80031f4: 4629 mov r1, r5
|
|
80031f6: bf28 it cs
|
|
80031f8: 4632 movcs r2, r6
|
|
80031fa: f7ff ffc9 bl 8003190 <memcpy>
|
|
80031fe: 4629 mov r1, r5
|
|
8003200: 4638 mov r0, r7
|
|
8003202: f7ff fbbf bl 8002984 <_free_r>
|
|
8003206: e7f1 b.n 80031ec <_realloc_r+0x40>
|
|
|
|
08003208 <_malloc_usable_size_r>:
|
|
8003208: f851 3c04 ldr.w r3, [r1, #-4]
|
|
800320c: 1f18 subs r0, r3, #4
|
|
800320e: 2b00 cmp r3, #0
|
|
8003210: bfbc itt lt
|
|
8003212: 580b ldrlt r3, [r1, r0]
|
|
8003214: 18c0 addlt r0, r0, r3
|
|
8003216: 4770 bx lr
|
|
|
|
08003218 <_init>:
|
|
8003218: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800321a: bf00 nop
|
|
800321c: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800321e: bc08 pop {r3}
|
|
8003220: 469e mov lr, r3
|
|
8003222: 4770 bx lr
|
|
|
|
08003224 <_fini>:
|
|
8003224: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
8003226: bf00 nop
|
|
8003228: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800322a: bc08 pop {r3}
|
|
800322c: 469e mov lr, r3
|
|
800322e: 4770 bx lr
|